sync with OpenBSD -current
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31 changed files with 641 additions and 476 deletions
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@ -1,4 +1,4 @@
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$OpenBSD: miidevs,v 1.133 2023/07/08 08:18:30 kettenis Exp $
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$OpenBSD: miidevs,v 1.134 2024/07/27 03:26:04 deraadt Exp $
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/* $NetBSD: miidevs,v 1.3 1998/11/05 03:43:43 thorpej Exp $ */
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/*-
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@ -112,221 +112,221 @@ oui xxMARVELL 0x000ac2 Marvell
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* List of known models. Grouped by oui.
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*/
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/* AMD PHYs */
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model xxAMD 79C873 0x0000 Am79C873 10/100 PHY
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model AMD 79C875phy 0x0014 Am79C875 quad PHY
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model AMD 79C873phy 0x0036 Am79C873 internal PHY
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/* AMD */
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model xxAMD 79C873 0x0000 Am79C873
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model AMD 79C875phy 0x0014 Am79C875 quad
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model AMD 79C873phy 0x0036 Am79C873 internal
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/* Agere PHYs */
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model AGERE ET1011 0x0004 ET1011 10/100/1000baseT PHY
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/* Agere */
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model AGERE ET1011 0x0004 ET1011
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/* Atheros PHYs */
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model ATHEROS F1 0x0001 F1 10/100/1000 PHY
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model ATHEROS F2 0x0002 F2 10/100 PHY
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model ATHEROS AR8035 0x0007 AR8035 10/100/1000 PHY
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/* Atheros */
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model ATHEROS F1 0x0001 F1
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model ATHEROS F2 0x0002 F2
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model ATHEROS AR8035 0x0007 AR8035
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/* Altima PHYs */
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model xxALTIMA AC_UNKNOWN 0x0001 AC_UNKNOWN 10/100 PHY
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model xxALTIMA AC101L 0x0012 AC101L 10/100 PHY
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model xxALTIMA AC101 0x0021 AC101 10/100 PHY
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/* Altima */
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model xxALTIMA AC_UNKNOWN 0x0001 AC_UNKNOWN
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model xxALTIMA AC101L 0x0012 AC101L
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model xxALTIMA AC101 0x0021 AC101
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/* Broadcom PHYs */
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model xxBROADCOM BCM5400 0x0004 BCM5400 1000baseT PHY
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model xxBROADCOM BCM5401 0x0005 BCM5401 10/100/1000baseT PHY
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model xxBROADCOM BCM5411 0x0007 BCM5411 10/100/1000baseT PHY
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model xxBROADCOM BCM5464 0x000b BCM5464 10/100/1000baseT PHY
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model xxBROADCOM BCM5461 0x000c BCM5461 10/100/1000baseT PHY
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model xxBROADCOM BCM5462 0x000d BCM5462 10/100/1000baseT PHY
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model xxBROADCOM BCM5421 0x000e BCM5421 10/100/1000baseT PHY
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model xxBROADCOM BCM5752 0x0010 BCM5752 10/100/1000baseT PHY
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model xxBROADCOM BCM5701 0x0011 BCM5701 10/100/1000baseT PHY
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model xxBROADCOM BCM5706 0x0015 BCM5706 10/100/1000baseT/SX PHY
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model xxBROADCOM BCM5703 0x0016 BCM5703 10/100/1000baseT PHY
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model xxBROADCOM BCM5750 0x0018 BCM5750 10/100/1000baseT PHY
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model xxBROADCOM BCM5704 0x0019 BCM5704 10/100/1000baseT PHY
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model xxBROADCOM BCM5705 0x001a BCM5705 10/100/1000baseT PHY
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model xxBROADCOM BCM54K2 0x002e BCM54K2 10/100/1000baseT PHY
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model xxBROADCOM BCM5714 0x0034 BCM5714 10/100/1000baseT/SX PHY
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model xxBROADCOM BCM5780 0x0035 BCM5780 10/100/1000baseT/SX PHY
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model xxBROADCOM BCM5708C 0x0036 BCM5708C 10/100/1000baseT PHY
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model xxBROADCOM2 BCM54XX 0x0007 BCM54XX 10/100/1000baseT PHY
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model xxBROADCOM2 BCM5481 0x000a BCM5481 10/100/1000baseT PHY
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model xxBROADCOM2 BCM5482 0x000b BCM5482 10/100/1000baseT PHY
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model xxBROADCOM2 BCM5755 0x000c BCM5755 10/100/1000baseT PHY
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model xxBROADCOM2 BCM5787 0x000e BCM5787 10/100/1000baseT PHY
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model xxBROADCOM2 BCM5708S 0x0015 BCM5708S 1000/2500baseSX PHY
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model xxBROADCOM2 BCM5709CAX 0x002c BCM5709CAX 10/100/1000baseT PHY
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model xxBROADCOM2 BCM5722 0x002d BCM5722 10/100/1000baseT PHY
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model xxBROADCOM2 BCM5784 0x003a BCM5784 10/100/1000baseT PHY
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model xxBROADCOM2 BCM5709C 0x003c BCM5709 10/100/1000baseT PHY
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model xxBROADCOM2 BCM5761 0x003d BCM5761 10/100/1000baseT PHY
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model xxBROADCOM2 BCM5709S 0x003f BCM5709S 1000/2500baseSX PHY
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model xxBROADCOM2 BCM53115 0x0038 BCM53115 10/100/1000baseT PHY
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model xxBROADCOM3 BCM57780 0x0019 BCM57780 10/100/1000baseT PHY
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model xxBROADCOM3 BCM5717C 0x0020 BCM5717C 10/100/1000baseT PHY
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model xxBROADCOM3 BCM5719C 0x0022 BCM5719C 10/100/1000baseT PHY
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model xxBROADCOM3 BCM57765 0x0024 BCM57765 10/100/1000baseT PHY
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model xxBROADCOM3 BCM5720C 0x0036 BCM5720C 10/100/1000baseT PHY
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model xxBROADCOM4 BCM54210E 0x000a BCM54210E 10/100/1000baseT PHY
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model xxBROADCOM4 BCM5725 0x0038 BCM5725 10/100/1000baseT PHY
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model BROADCOM BCM5400 0x0004 BCM5400 1000baseT PHY
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model BROADCOM BCM5401 0x0005 BCM5401 1000baseT PHY
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model BROADCOM BCM5411 0x0007 BCM5411 1000baseT PHY
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model BROADCOM 3C905B 0x0012 3C905B internal PHY
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model BROADCOM 3C905C 0x0017 3C905C internal PHY
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model BROADCOM BCM5221 0x001e BCM5221 100baseTX PHY
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model BROADCOM BCM5201 0x0021 BCM5201 10/100 PHY
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model BROADCOM BCM5214 0x0028 BCM5214 Quad 10/100 PHY
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model BROADCOM BCM5222 0x0032 BCM5222 Dual 10/100 PHY
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model BROADCOM BCM5220 0x0033 BCM5220 10/100 PHY
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model BROADCOM BCM4401 0x0036 BCM4401 10/100baseTX PHY
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model BROADCOM2 BCM5906 0x0004 BCM5906 10/100baseTX PHY
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/* Broadcom */
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model xxBROADCOM BCM5400 0x0004 BCM5400
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model xxBROADCOM BCM5401 0x0005 BCM5401
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model xxBROADCOM BCM5411 0x0007 BCM5411
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model xxBROADCOM BCM5464 0x000b BCM5464
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model xxBROADCOM BCM5461 0x000c BCM5461
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model xxBROADCOM BCM5462 0x000d BCM5462
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model xxBROADCOM BCM5421 0x000e BCM5421
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model xxBROADCOM BCM5752 0x0010 BCM5752
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model xxBROADCOM BCM5701 0x0011 BCM5701
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model xxBROADCOM BCM5706 0x0015 BCM5706
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model xxBROADCOM BCM5703 0x0016 BCM5703
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model xxBROADCOM BCM5750 0x0018 BCM5750
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model xxBROADCOM BCM5704 0x0019 BCM5704
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model xxBROADCOM BCM5705 0x001a BCM5705
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model xxBROADCOM BCM54K2 0x002e BCM54K2
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model xxBROADCOM BCM5714 0x0034 BCM5714
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model xxBROADCOM BCM5780 0x0035 BCM5780
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model xxBROADCOM BCM5708C 0x0036 BCM5708C
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model xxBROADCOM2 BCM54XX 0x0007 BCM54XX
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model xxBROADCOM2 BCM5481 0x000a BCM5481
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model xxBROADCOM2 BCM5482 0x000b BCM5482
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model xxBROADCOM2 BCM5755 0x000c BCM5755
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model xxBROADCOM2 BCM5787 0x000e BCM5787
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model xxBROADCOM2 BCM5708S 0x0015 BCM5708S
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model xxBROADCOM2 BCM5709CAX 0x002c BCM5709CAX
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model xxBROADCOM2 BCM5722 0x002d BCM5722
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model xxBROADCOM2 BCM5784 0x003a BCM5784
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model xxBROADCOM2 BCM5709C 0x003c BCM5709
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model xxBROADCOM2 BCM5761 0x003d BCM5761
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model xxBROADCOM2 BCM5709S 0x003f BCM5709S
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model xxBROADCOM2 BCM53115 0x0038 BCM53115
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model xxBROADCOM3 BCM57780 0x0019 BCM57780
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model xxBROADCOM3 BCM5717C 0x0020 BCM5717C
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model xxBROADCOM3 BCM5719C 0x0022 BCM5719C
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model xxBROADCOM3 BCM57765 0x0024 BCM57765
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model xxBROADCOM3 BCM5720C 0x0036 BCM5720C
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model xxBROADCOM4 BCM54210E 0x000a BCM54210E
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model xxBROADCOM4 BCM5725 0x0038 BCM5725
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model BROADCOM BCM5400 0x0004 BCM5400
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model BROADCOM BCM5401 0x0005 BCM5401
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model BROADCOM BCM5411 0x0007 BCM5411
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model BROADCOM 3C905B 0x0012 3C905B internal
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model BROADCOM 3C905C 0x0017 3C905C internal
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model BROADCOM BCM5221 0x001e BCM5221
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model BROADCOM BCM5201 0x0021 BCM5201
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model BROADCOM BCM5214 0x0028 BCM5214 Quad
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model BROADCOM BCM5222 0x0032 BCM5222 Dual
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model BROADCOM BCM5220 0x0033 BCM5220
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model BROADCOM BCM4401 0x0036 BCM4401
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model BROADCOM2 BCM5906 0x0004 BCM5906
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/* Cicada PHYs (now owned by Vitesse) */
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model xxCICADA CS8201B 0x0021 CS8201 10/100/1000TX PHY
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model CICADA CS8201 0x0001 CS8201 10/100/1000TX PHY
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model CICADA CS8204 0x0004 CS8204 10/100/1000TX PHY
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model CICADA VSC8211 0x000b VSC8211 10/100/1000 PHY
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model CICADA CS8201A 0x0020 CS8201 10/100/1000TX PHY
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model CICADA CS8201B 0x0021 CS8201 10/100/1000TX PHY
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model CICADA CS8244 0x002c CS8244 10/100/1000TX PHY
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/* Cicada (now owned by Vitesse) */
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model xxCICADA CS8201B 0x0021 CS8201
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model CICADA CS8201 0x0001 CS8201
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model CICADA CS8204 0x0004 CS8204
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model CICADA VSC8211 0x000b VSC8211
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model CICADA CS8201A 0x0020 CS8201
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model CICADA CS8201B 0x0021 CS8201
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model CICADA CS8244 0x002c CS8244
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/* Davicom PHYs */
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model xxDAVICOM DM9101 0x0000 DM9101 10/100 PHY
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model DAVICOM DM9102 0x0004 DM9102 10/100 PHY
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model DAVICOM DM9601 0x000c DM9601 10/100 PHY
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/* Davicom */
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model xxDAVICOM DM9101 0x0000 DM9101
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model DAVICOM DM9102 0x0004 DM9102
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model DAVICOM DM9601 0x000c DM9601
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/* Contrived vendor/model for dcphy */
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model xxDEC xxDC 0x0001 DC
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/* Enable Semi. PHYs (Agere) */
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/* Enable Semi. (Agere) */
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model ENABLESEMI LU3X31FT 0x0001 LU3X31FT
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model ENABLESEMI LU3X31T2 0x0002 LU3X31T2
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model ENABLESEMI 88E1000S 0x0004 88E1000S
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model ENABLESEMI 88E1000 0x0005 88E1000
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/* IC Plus PHYs */
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model ICPLUS IP100 0x0004 IP100 10/100 PHY
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model ICPLUS IP101 0x0005 IP101 10/100 PHY
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model ICPLUS IP1000A 0x0008 IP1000A 10/100/1000 PHY
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model ICPLUS IP1001 0x0019 IP1001 10/100/1000 PHY
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/* IC Plus */
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model ICPLUS IP100 0x0004 IP100
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model ICPLUS IP101 0x0005 IP101
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model ICPLUS IP1000A 0x0008 IP1000A
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model ICPLUS IP1001 0x0019 IP1001
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/* Integrated Circuit Systems PHYs */
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model xxICS 1890 0x0002 ICS1890 10/100 PHY
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model xxICS 1892 0x0003 ICS1892 10/100 PHY
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model xxICS 1893 0x0004 ICS1893 10/100 PHY
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/* Integrated Circuit Systems */
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model xxICS 1890 0x0002 ICS1890
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model xxICS 1892 0x0003 ICS1892
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model xxICS 1893 0x0004 ICS1893
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/* Intel PHYs */
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model xxINTEL I82553 0x0000 i82553 10/100 PHY
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model INTEL I82555 0x0015 i82555 10/100 PHY
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model INTEL I82562G 0x0031 i82562G 10/100 PHY
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model INTEL I82562EM 0x0032 i82562EM 10/100 PHY
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model INTEL I82562ET 0x0033 i82562ET 10/100 PHY
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model INTEL I82553 0x0035 i82553 10/100 PHY
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/* Intel */
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model xxINTEL I82553 0x0000 i82553
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model INTEL I82555 0x0015 i82555
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model INTEL I82562G 0x0031 i82562G
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model INTEL I82562EM 0x0032 i82562EM
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model INTEL I82562ET 0x0033 i82562ET
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model INTEL I82553 0x0035 i82553
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/* Jato Technologies PHYs */
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model JATO BASEX 0x0000 Jato 1000baseX PHY
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/* Jato Technologies */
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model JATO BASEX 0x0000 Jato
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/* JMicron PHYs */
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model JMICRON JMP211 0x0021 JMP211 10/100/1000 PHY
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model JMICRON JMP202 0x0022 JMP202 10/100 PHY
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/* JMicron */
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model JMICRON JMP211 0x0021 JMP211
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model JMICRON JMP202 0x0022 JMP202
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/* Level 1 PHYs */
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model xxLEVEL1 LXT970 0x0000 LXT970 10/100 PHY
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model xxLEVEL1a LXT971 0x000e LXT971 10/100 PHY
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model LEVEL1 LXT1000_OLD 0x0003 LXT1000 10/100/1000 PHY
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model LEVEL1 LXT1000 0x000c LXT1000 10/100/1000 PHY
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/* Level 1 */
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model xxLEVEL1 LXT970 0x0000 LXT970
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model xxLEVEL1a LXT971 0x000e LXT971
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model LEVEL1 LXT1000_OLD 0x0003 LXT1000
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model LEVEL1 LXT1000 0x000c LXT1000
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/* Lucent PHYs */
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model LUCENT LU6612 0x000c LU6612 10/100 PHY
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model LUCENT LU3X51FT 0x0033 LU3X51FT 10/100 PHY
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model LUCENT LU3X54FT 0x0036 LU3X54FT 10/100 PHY
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/* Lucent */
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model LUCENT LU6612 0x000c LU6612
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model LUCENT LU3X51FT 0x0033 LU3X51FT
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model LUCENT LU3X54FT 0x0036 LU3X54FT
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/* Marvell PHYs */
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model xxMARVELL E1000_5 0x0002 88E1000 5 Gigabit PHY
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model xxMARVELL E1000_6 0x0003 88E1000 6 Gigabit PHY
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model xxMARVELL E1000_7 0x0005 88E1000 7 Gigabit PHY
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model xxMARVELL E1111 0x000c 88E1111 Gigabit PHY
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model MARVELL E1000_1 0x0000 88E1000 1 Gigabit PHY
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model MARVELL E1011 0x0002 88E1011 Gigabit PHY
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model MARVELL E1000_2 0x0003 88E1000 2 Gigabit PHY
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model MARVELL E1000S 0x0004 88E1000S Gigabit PHY
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model MARVELL E1000_3 0x0005 88E1000 3 Gigabit PHY
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model MARVELL E1000_4 0x0006 88E1000 4 Gigabit PHY
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model MARVELL E3082 0x0008 88E3082 10/100 PHY
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model MARVELL E1112 0x0009 88E1112 Gigabit PHY
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model MARVELL E1149 0x000b 88E1149 Gigabit PHY
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model MARVELL E1111 0x000c 88E1111 Gigabit PHY
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model MARVELL E1512 0x001d 88E1512 10/100/1000 PHY
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model MARVELL E1116 0x0021 88E1116 Gigabit PHY
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model MARVELL E1118 0x0022 88E1118 Gigabit PHY
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model MARVELL E1116R 0x0024 88E1116R Gigabit PHY
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model MARVELL E3016 0x0026 88E3016 10/100 PHY
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model MARVELL PHYG65G 0x0027 PHYG65G Gigabit PHY
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model MARVELL E1545 0x002a 88E1545 Quad 10/100/1000 PHY
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/* Marvell */
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model xxMARVELL E1000_5 0x0002 88E1000 5
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model xxMARVELL E1000_6 0x0003 88E1000 6
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model xxMARVELL E1000_7 0x0005 88E1000 7
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model xxMARVELL E1111 0x000c 88E1111
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model MARVELL E1000_1 0x0000 88E1000 1
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model MARVELL E1011 0x0002 88E1011
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model MARVELL E1000_2 0x0003 88E1000 2
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model MARVELL E1000S 0x0004 88E1000S
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model MARVELL E1000_3 0x0005 88E1000 3
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model MARVELL E1000_4 0x0006 88E1000 4
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model MARVELL E3082 0x0008 88E3082
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model MARVELL E1112 0x0009 88E1112
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model MARVELL E1149 0x000b 88E1149
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model MARVELL E1111 0x000c 88E1111
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model MARVELL E1512 0x001d 88E1512
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model MARVELL E1116 0x0021 88E1116
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model MARVELL E1118 0x0022 88E1118
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model MARVELL E1116R 0x0024 88E1116R
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model MARVELL E3016 0x0026 88E3016
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model MARVELL PHYG65G 0x0027 PHYG65G
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model MARVELL E1545 0x002a 88E1545 Quad
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/* Micrel PHYs */
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model MICREL KSZ9021 0x0021 KSZ9021 10/100/1000 PHY
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model MICREL KSZ9031 0x0022 KSZ9031 10/100/1000 PHY
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/* Micrel */
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model MICREL KSZ9021 0x0021 KSZ9021
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model MICREL KSZ9031 0x0022 KSZ9031
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/* Motorcomm PHYs */
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model MOTORCOMM YT8531 0x0011 YT8531 10/100/1000 PHY
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/* Motorcomm */
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model MOTORCOMM YT8531 0x0011 YT8531
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/* Myson PHYs */
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model MYSON MTD972 0x0000 MTD972 10/100 PHY
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/* Myson */
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model MYSON MTD972 0x0000 MTD972
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/* National Semi. PHYs */
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model NATSEMI DP83840 0x0000 DP83840 10/100 PHY
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model NATSEMI DP83843 0x0001 DP83843 10/100 PHY
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model NATSEMI DP83815 0x0002 DP83815 10/100 PHY
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model NATSEMI DP83847 0x0003 DP83847 10/100 PHY
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model NATSEMI DP83891 0x0005 DP83891 10/100/1000 PHY
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model NATSEMI DP83861 0x0006 DP83861 10/100/1000 PHY
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model NATSEMI DP83865 0x0007 DP83865 10/100/1000 PHY
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/* National Semi. */
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model NATSEMI DP83840 0x0000 DP83840
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model NATSEMI DP83843 0x0001 DP83843
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model NATSEMI DP83815 0x0002 DP83815
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model NATSEMI DP83847 0x0003 DP83847
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model NATSEMI DP83891 0x0005 DP83891
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model NATSEMI DP83861 0x0006 DP83861
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model NATSEMI DP83865 0x0007 DP83865
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/* Plessey Semi. PHYs */
|
||||
model PLESSEY NWK914 0x0000 NWK914 10/100 PHY
|
||||
/* Plessey Semi. */
|
||||
model PLESSEY NWK914 0x0000 NWK914
|
||||
|
||||
/* Quality Semi. PHYs */
|
||||
model QUALITYSEMI QS6612 0x0000 QS6612 10/100 PHY
|
||||
/* Quality Semi. */
|
||||
model QUALITYSEMI QS6612 0x0000 QS6612
|
||||
|
||||
/* RDC Semi. PHYs */
|
||||
model RDC R6040 0x0003 R6040 10/100 PHY
|
||||
model RDC R6040_2 0x0005 R6040 10/100 PHY
|
||||
/* RDC Semi. */
|
||||
model RDC R6040 0x0003 R6040
|
||||
model RDC R6040_2 0x0005 R6040
|
||||
|
||||
/* Realtek PHYs */
|
||||
model xxREALTEK RTL8251 0x0000 RTL8251 PHY
|
||||
model xxREALTEK RTL8211FVD 0x0007 RTL8211F-VD PHY
|
||||
model xxREALTEK RTL8201E 0x0008 RTL8201E 10/100 PHY
|
||||
model xxREALTEK RTL8169S 0x0011 RTL8169S/8110S/8211 PHY
|
||||
model REALTEK RTL8201L 0x0020 RTL8201L 10/100 PHY
|
||||
/* Realtek */
|
||||
model xxREALTEK RTL8251 0x0000 RTL8251
|
||||
model xxREALTEK RTL8211FVD 0x0007 RTL8211F-VD
|
||||
model xxREALTEK RTL8201E 0x0008 RTL8201E
|
||||
model xxREALTEK RTL8169S 0x0011 RTL8169S/8110S/8211
|
||||
model REALTEK RTL8201L 0x0020 RTL8201L
|
||||
|
||||
/* Seeq PHYs */
|
||||
model xxSEEQ 80220 0x0003 80220 10/100 PHY
|
||||
model xxSEEQ 84220 0x0004 84220 10/100 PHY
|
||||
model xxSEEQ 80225 0x0008 80225 10/100 PHY
|
||||
/* Seeq */
|
||||
model xxSEEQ 80220 0x0003 80220
|
||||
model xxSEEQ 84220 0x0004 84220
|
||||
model xxSEEQ 80225 0x0008 80225
|
||||
|
||||
/* Silicon Integrated Systems PHYs */
|
||||
model xxSIS 900 0x0000 900 10/100 PHY
|
||||
/* Silicon Integrated Systems */
|
||||
model xxSIS 900 0x0000 900
|
||||
|
||||
/* Standard Microsystems PHYs */
|
||||
model SMSC LAN83C185 0x000a LAN83C185 10/100 PHY
|
||||
/* Standard Microsystems */
|
||||
model SMSC LAN83C185 0x000a LAN83C185
|
||||
|
||||
/* Texas Instruments PHYs */
|
||||
model xxTI TLAN10T 0x0001 ThunderLAN 10baseT PHY
|
||||
model xxTI 100VGPMI 0x0002 ThunderLAN 100VG-AnyLan PHY
|
||||
model xxTI TNETE2101 0x0003 TNETE2101 PHY
|
||||
/* Texas Instruments */
|
||||
model xxTI TLAN10T 0x0001 ThunderLAN
|
||||
model xxTI 100VGPMI 0x0002 ThunderLAN
|
||||
model xxTI TNETE2101 0x0003 TNETE2101
|
||||
|
||||
/* TDK PHYs */
|
||||
model TDK 78Q2120 0x0014 78Q2120 10/100 PHY
|
||||
model TDK 78Q2121 0x0015 78Q2121 100baseTX PHY
|
||||
/* TDK */
|
||||
model TDK 78Q2120 0x0014 78Q2120
|
||||
model TDK 78Q2121 0x0015 78Q2121
|
||||
|
||||
/* VIA Networking PHYs */
|
||||
model VIA VT6103 0x0032 VT6103 10/100 PHY
|
||||
model VIA VT6103_2 0x0034 VT6103 10/100 PHY
|
||||
/* VIA Networking */
|
||||
model VIA VT6103 0x0032 VT6103
|
||||
model VIA VT6103_2 0x0034 VT6103
|
||||
|
||||
/* Vitesse PHYs */
|
||||
model VITESSE VSC8601 0x0002 VSC8601 10/100/1000 PHY
|
||||
/* Vitesse */
|
||||
model VITESSE VSC8601 0x0002 VSC8601
|
||||
|
||||
/* XaQti PHYs */
|
||||
model XAQTI XMACII 0x0000 XMAC II Gigabit PHY
|
||||
/* XaQti */
|
||||
model XAQTI XMACII 0x0000 XMAC II
|
||||
|
|
|
|||
|
|
@ -1,10 +1,10 @@
|
|||
/* $OpenBSD: miidevs.h,v 1.137 2023/07/08 08:13:31 kettenis Exp $ */
|
||||
/* $OpenBSD: miidevs.h,v 1.138 2024/07/27 03:26:12 deraadt Exp $ */
|
||||
|
||||
/*
|
||||
* THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT.
|
||||
*
|
||||
* generated from:
|
||||
* OpenBSD: miidevs,v 1.132 2023/03/31 13:37:02 kettenis Exp
|
||||
* OpenBSD: miidevs,v 1.134 2024/07/27 03:26:04 deraadt Exp
|
||||
*/
|
||||
/* $NetBSD: miidevs,v 1.3 1998/11/05 03:43:43 thorpej Exp $ */
|
||||
|
||||
|
|
@ -119,165 +119,165 @@
|
|||
* List of known models. Grouped by oui.
|
||||
*/
|
||||
|
||||
/* AMD PHYs */
|
||||
/* AMD */
|
||||
#define MII_MODEL_xxAMD_79C873 0x0000
|
||||
#define MII_STR_xxAMD_79C873 "Am79C873 10/100 PHY"
|
||||
#define MII_STR_xxAMD_79C873 "Am79C873"
|
||||
#define MII_MODEL_AMD_79C875phy 0x0014
|
||||
#define MII_STR_AMD_79C875phy "Am79C875 quad PHY"
|
||||
#define MII_STR_AMD_79C875phy "Am79C875 quad"
|
||||
#define MII_MODEL_AMD_79C873phy 0x0036
|
||||
#define MII_STR_AMD_79C873phy "Am79C873 internal PHY"
|
||||
#define MII_STR_AMD_79C873phy "Am79C873 internal"
|
||||
|
||||
/* Agere PHYs */
|
||||
/* Agere */
|
||||
#define MII_MODEL_AGERE_ET1011 0x0004
|
||||
#define MII_STR_AGERE_ET1011 "ET1011 10/100/1000baseT PHY"
|
||||
#define MII_STR_AGERE_ET1011 "ET1011"
|
||||
|
||||
/* Atheros PHYs */
|
||||
/* Atheros */
|
||||
#define MII_MODEL_ATHEROS_F1 0x0001
|
||||
#define MII_STR_ATHEROS_F1 "F1 10/100/1000 PHY"
|
||||
#define MII_STR_ATHEROS_F1 "F1"
|
||||
#define MII_MODEL_ATHEROS_F2 0x0002
|
||||
#define MII_STR_ATHEROS_F2 "F2 10/100 PHY"
|
||||
#define MII_STR_ATHEROS_F2 "F2"
|
||||
#define MII_MODEL_ATHEROS_AR8035 0x0007
|
||||
#define MII_STR_ATHEROS_AR8035 "AR8035 10/100/1000 PHY"
|
||||
#define MII_STR_ATHEROS_AR8035 "AR8035"
|
||||
|
||||
/* Altima PHYs */
|
||||
/* Altima */
|
||||
#define MII_MODEL_xxALTIMA_AC_UNKNOWN 0x0001
|
||||
#define MII_STR_xxALTIMA_AC_UNKNOWN "AC_UNKNOWN 10/100 PHY"
|
||||
#define MII_STR_xxALTIMA_AC_UNKNOWN "AC_UNKNOWN"
|
||||
#define MII_MODEL_xxALTIMA_AC101L 0x0012
|
||||
#define MII_STR_xxALTIMA_AC101L "AC101L 10/100 PHY"
|
||||
#define MII_STR_xxALTIMA_AC101L "AC101L"
|
||||
#define MII_MODEL_xxALTIMA_AC101 0x0021
|
||||
#define MII_STR_xxALTIMA_AC101 "AC101 10/100 PHY"
|
||||
#define MII_STR_xxALTIMA_AC101 "AC101"
|
||||
|
||||
/* Broadcom PHYs */
|
||||
/* Broadcom */
|
||||
#define MII_MODEL_xxBROADCOM_BCM5400 0x0004
|
||||
#define MII_STR_xxBROADCOM_BCM5400 "BCM5400 1000baseT PHY"
|
||||
#define MII_STR_xxBROADCOM_BCM5400 "BCM5400"
|
||||
#define MII_MODEL_xxBROADCOM_BCM5401 0x0005
|
||||
#define MII_STR_xxBROADCOM_BCM5401 "BCM5401 10/100/1000baseT PHY"
|
||||
#define MII_STR_xxBROADCOM_BCM5401 "BCM5401"
|
||||
#define MII_MODEL_xxBROADCOM_BCM5411 0x0007
|
||||
#define MII_STR_xxBROADCOM_BCM5411 "BCM5411 10/100/1000baseT PHY"
|
||||
#define MII_STR_xxBROADCOM_BCM5411 "BCM5411"
|
||||
#define MII_MODEL_xxBROADCOM_BCM5464 0x000b
|
||||
#define MII_STR_xxBROADCOM_BCM5464 "BCM5464 10/100/1000baseT PHY"
|
||||
#define MII_STR_xxBROADCOM_BCM5464 "BCM5464"
|
||||
#define MII_MODEL_xxBROADCOM_BCM5461 0x000c
|
||||
#define MII_STR_xxBROADCOM_BCM5461 "BCM5461 10/100/1000baseT PHY"
|
||||
#define MII_STR_xxBROADCOM_BCM5461 "BCM5461"
|
||||
#define MII_MODEL_xxBROADCOM_BCM5462 0x000d
|
||||
#define MII_STR_xxBROADCOM_BCM5462 "BCM5462 10/100/1000baseT PHY"
|
||||
#define MII_STR_xxBROADCOM_BCM5462 "BCM5462"
|
||||
#define MII_MODEL_xxBROADCOM_BCM5421 0x000e
|
||||
#define MII_STR_xxBROADCOM_BCM5421 "BCM5421 10/100/1000baseT PHY"
|
||||
#define MII_STR_xxBROADCOM_BCM5421 "BCM5421"
|
||||
#define MII_MODEL_xxBROADCOM_BCM5752 0x0010
|
||||
#define MII_STR_xxBROADCOM_BCM5752 "BCM5752 10/100/1000baseT PHY"
|
||||
#define MII_STR_xxBROADCOM_BCM5752 "BCM5752"
|
||||
#define MII_MODEL_xxBROADCOM_BCM5701 0x0011
|
||||
#define MII_STR_xxBROADCOM_BCM5701 "BCM5701 10/100/1000baseT PHY"
|
||||
#define MII_STR_xxBROADCOM_BCM5701 "BCM5701"
|
||||
#define MII_MODEL_xxBROADCOM_BCM5706 0x0015
|
||||
#define MII_STR_xxBROADCOM_BCM5706 "BCM5706 10/100/1000baseT/SX PHY"
|
||||
#define MII_STR_xxBROADCOM_BCM5706 "BCM5706"
|
||||
#define MII_MODEL_xxBROADCOM_BCM5703 0x0016
|
||||
#define MII_STR_xxBROADCOM_BCM5703 "BCM5703 10/100/1000baseT PHY"
|
||||
#define MII_STR_xxBROADCOM_BCM5703 "BCM5703"
|
||||
#define MII_MODEL_xxBROADCOM_BCM5750 0x0018
|
||||
#define MII_STR_xxBROADCOM_BCM5750 "BCM5750 10/100/1000baseT PHY"
|
||||
#define MII_STR_xxBROADCOM_BCM5750 "BCM5750"
|
||||
#define MII_MODEL_xxBROADCOM_BCM5704 0x0019
|
||||
#define MII_STR_xxBROADCOM_BCM5704 "BCM5704 10/100/1000baseT PHY"
|
||||
#define MII_STR_xxBROADCOM_BCM5704 "BCM5704"
|
||||
#define MII_MODEL_xxBROADCOM_BCM5705 0x001a
|
||||
#define MII_STR_xxBROADCOM_BCM5705 "BCM5705 10/100/1000baseT PHY"
|
||||
#define MII_STR_xxBROADCOM_BCM5705 "BCM5705"
|
||||
#define MII_MODEL_xxBROADCOM_BCM54K2 0x002e
|
||||
#define MII_STR_xxBROADCOM_BCM54K2 "BCM54K2 10/100/1000baseT PHY"
|
||||
#define MII_STR_xxBROADCOM_BCM54K2 "BCM54K2"
|
||||
#define MII_MODEL_xxBROADCOM_BCM5714 0x0034
|
||||
#define MII_STR_xxBROADCOM_BCM5714 "BCM5714 10/100/1000baseT/SX PHY"
|
||||
#define MII_STR_xxBROADCOM_BCM5714 "BCM5714"
|
||||
#define MII_MODEL_xxBROADCOM_BCM5780 0x0035
|
||||
#define MII_STR_xxBROADCOM_BCM5780 "BCM5780 10/100/1000baseT/SX PHY"
|
||||
#define MII_STR_xxBROADCOM_BCM5780 "BCM5780"
|
||||
#define MII_MODEL_xxBROADCOM_BCM5708C 0x0036
|
||||
#define MII_STR_xxBROADCOM_BCM5708C "BCM5708C 10/100/1000baseT PHY"
|
||||
#define MII_STR_xxBROADCOM_BCM5708C "BCM5708C"
|
||||
#define MII_MODEL_xxBROADCOM2_BCM54XX 0x0007
|
||||
#define MII_STR_xxBROADCOM2_BCM54XX "BCM54XX 10/100/1000baseT PHY"
|
||||
#define MII_STR_xxBROADCOM2_BCM54XX "BCM54XX"
|
||||
#define MII_MODEL_xxBROADCOM2_BCM5481 0x000a
|
||||
#define MII_STR_xxBROADCOM2_BCM5481 "BCM5481 10/100/1000baseT PHY"
|
||||
#define MII_STR_xxBROADCOM2_BCM5481 "BCM5481"
|
||||
#define MII_MODEL_xxBROADCOM2_BCM5482 0x000b
|
||||
#define MII_STR_xxBROADCOM2_BCM5482 "BCM5482 10/100/1000baseT PHY"
|
||||
#define MII_STR_xxBROADCOM2_BCM5482 "BCM5482"
|
||||
#define MII_MODEL_xxBROADCOM2_BCM5755 0x000c
|
||||
#define MII_STR_xxBROADCOM2_BCM5755 "BCM5755 10/100/1000baseT PHY"
|
||||
#define MII_STR_xxBROADCOM2_BCM5755 "BCM5755"
|
||||
#define MII_MODEL_xxBROADCOM2_BCM5787 0x000e
|
||||
#define MII_STR_xxBROADCOM2_BCM5787 "BCM5787 10/100/1000baseT PHY"
|
||||
#define MII_STR_xxBROADCOM2_BCM5787 "BCM5787"
|
||||
#define MII_MODEL_xxBROADCOM2_BCM5708S 0x0015
|
||||
#define MII_STR_xxBROADCOM2_BCM5708S "BCM5708S 1000/2500baseSX PHY"
|
||||
#define MII_STR_xxBROADCOM2_BCM5708S "BCM5708S"
|
||||
#define MII_MODEL_xxBROADCOM2_BCM5709CAX 0x002c
|
||||
#define MII_STR_xxBROADCOM2_BCM5709CAX "BCM5709CAX 10/100/1000baseT PHY"
|
||||
#define MII_STR_xxBROADCOM2_BCM5709CAX "BCM5709CAX"
|
||||
#define MII_MODEL_xxBROADCOM2_BCM5722 0x002d
|
||||
#define MII_STR_xxBROADCOM2_BCM5722 "BCM5722 10/100/1000baseT PHY"
|
||||
#define MII_STR_xxBROADCOM2_BCM5722 "BCM5722"
|
||||
#define MII_MODEL_xxBROADCOM2_BCM5784 0x003a
|
||||
#define MII_STR_xxBROADCOM2_BCM5784 "BCM5784 10/100/1000baseT PHY"
|
||||
#define MII_STR_xxBROADCOM2_BCM5784 "BCM5784"
|
||||
#define MII_MODEL_xxBROADCOM2_BCM5709C 0x003c
|
||||
#define MII_STR_xxBROADCOM2_BCM5709C "BCM5709 10/100/1000baseT PHY"
|
||||
#define MII_STR_xxBROADCOM2_BCM5709C "BCM5709"
|
||||
#define MII_MODEL_xxBROADCOM2_BCM5761 0x003d
|
||||
#define MII_STR_xxBROADCOM2_BCM5761 "BCM5761 10/100/1000baseT PHY"
|
||||
#define MII_STR_xxBROADCOM2_BCM5761 "BCM5761"
|
||||
#define MII_MODEL_xxBROADCOM2_BCM5709S 0x003f
|
||||
#define MII_STR_xxBROADCOM2_BCM5709S "BCM5709S 1000/2500baseSX PHY"
|
||||
#define MII_STR_xxBROADCOM2_BCM5709S "BCM5709S"
|
||||
#define MII_MODEL_xxBROADCOM2_BCM53115 0x0038
|
||||
#define MII_STR_xxBROADCOM2_BCM53115 "BCM53115 10/100/1000baseT PHY"
|
||||
#define MII_STR_xxBROADCOM2_BCM53115 "BCM53115"
|
||||
#define MII_MODEL_xxBROADCOM3_BCM57780 0x0019
|
||||
#define MII_STR_xxBROADCOM3_BCM57780 "BCM57780 10/100/1000baseT PHY"
|
||||
#define MII_STR_xxBROADCOM3_BCM57780 "BCM57780"
|
||||
#define MII_MODEL_xxBROADCOM3_BCM5717C 0x0020
|
||||
#define MII_STR_xxBROADCOM3_BCM5717C "BCM5717C 10/100/1000baseT PHY"
|
||||
#define MII_STR_xxBROADCOM3_BCM5717C "BCM5717C"
|
||||
#define MII_MODEL_xxBROADCOM3_BCM5719C 0x0022
|
||||
#define MII_STR_xxBROADCOM3_BCM5719C "BCM5719C 10/100/1000baseT PHY"
|
||||
#define MII_STR_xxBROADCOM3_BCM5719C "BCM5719C"
|
||||
#define MII_MODEL_xxBROADCOM3_BCM57765 0x0024
|
||||
#define MII_STR_xxBROADCOM3_BCM57765 "BCM57765 10/100/1000baseT PHY"
|
||||
#define MII_STR_xxBROADCOM3_BCM57765 "BCM57765"
|
||||
#define MII_MODEL_xxBROADCOM3_BCM5720C 0x0036
|
||||
#define MII_STR_xxBROADCOM3_BCM5720C "BCM5720C 10/100/1000baseT PHY"
|
||||
#define MII_STR_xxBROADCOM3_BCM5720C "BCM5720C"
|
||||
#define MII_MODEL_xxBROADCOM4_BCM54210E 0x000a
|
||||
#define MII_STR_xxBROADCOM4_BCM54210E "BCM54210E 10/100/1000baseT PHY"
|
||||
#define MII_STR_xxBROADCOM4_BCM54210E "BCM54210E"
|
||||
#define MII_MODEL_xxBROADCOM4_BCM5725 0x0038
|
||||
#define MII_STR_xxBROADCOM4_BCM5725 "BCM5725 10/100/1000baseT PHY"
|
||||
#define MII_STR_xxBROADCOM4_BCM5725 "BCM5725"
|
||||
#define MII_MODEL_BROADCOM_BCM5400 0x0004
|
||||
#define MII_STR_BROADCOM_BCM5400 "BCM5400 1000baseT PHY"
|
||||
#define MII_STR_BROADCOM_BCM5400 "BCM5400"
|
||||
#define MII_MODEL_BROADCOM_BCM5401 0x0005
|
||||
#define MII_STR_BROADCOM_BCM5401 "BCM5401 1000baseT PHY"
|
||||
#define MII_STR_BROADCOM_BCM5401 "BCM5401"
|
||||
#define MII_MODEL_BROADCOM_BCM5411 0x0007
|
||||
#define MII_STR_BROADCOM_BCM5411 "BCM5411 1000baseT PHY"
|
||||
#define MII_STR_BROADCOM_BCM5411 "BCM5411"
|
||||
#define MII_MODEL_BROADCOM_3C905B 0x0012
|
||||
#define MII_STR_BROADCOM_3C905B "3C905B internal PHY"
|
||||
#define MII_STR_BROADCOM_3C905B "3C905B internal"
|
||||
#define MII_MODEL_BROADCOM_3C905C 0x0017
|
||||
#define MII_STR_BROADCOM_3C905C "3C905C internal PHY"
|
||||
#define MII_STR_BROADCOM_3C905C "3C905C internal"
|
||||
#define MII_MODEL_BROADCOM_BCM5221 0x001e
|
||||
#define MII_STR_BROADCOM_BCM5221 "BCM5221 100baseTX PHY"
|
||||
#define MII_STR_BROADCOM_BCM5221 "BCM5221"
|
||||
#define MII_MODEL_BROADCOM_BCM5201 0x0021
|
||||
#define MII_STR_BROADCOM_BCM5201 "BCM5201 10/100 PHY"
|
||||
#define MII_STR_BROADCOM_BCM5201 "BCM5201"
|
||||
#define MII_MODEL_BROADCOM_BCM5214 0x0028
|
||||
#define MII_STR_BROADCOM_BCM5214 "BCM5214 Quad 10/100 PHY"
|
||||
#define MII_STR_BROADCOM_BCM5214 "BCM5214 Quad"
|
||||
#define MII_MODEL_BROADCOM_BCM5222 0x0032
|
||||
#define MII_STR_BROADCOM_BCM5222 "BCM5222 Dual 10/100 PHY"
|
||||
#define MII_STR_BROADCOM_BCM5222 "BCM5222 Dual"
|
||||
#define MII_MODEL_BROADCOM_BCM5220 0x0033
|
||||
#define MII_STR_BROADCOM_BCM5220 "BCM5220 10/100 PHY"
|
||||
#define MII_STR_BROADCOM_BCM5220 "BCM5220"
|
||||
#define MII_MODEL_BROADCOM_BCM4401 0x0036
|
||||
#define MII_STR_BROADCOM_BCM4401 "BCM4401 10/100baseTX PHY"
|
||||
#define MII_STR_BROADCOM_BCM4401 "BCM4401"
|
||||
#define MII_MODEL_BROADCOM2_BCM5906 0x0004
|
||||
#define MII_STR_BROADCOM2_BCM5906 "BCM5906 10/100baseTX PHY"
|
||||
#define MII_STR_BROADCOM2_BCM5906 "BCM5906"
|
||||
|
||||
/* Cicada PHYs (now owned by Vitesse) */
|
||||
/* Cicada (now owned by Vitesse) */
|
||||
#define MII_MODEL_xxCICADA_CS8201B 0x0021
|
||||
#define MII_STR_xxCICADA_CS8201B "CS8201 10/100/1000TX PHY"
|
||||
#define MII_STR_xxCICADA_CS8201B "CS8201"
|
||||
#define MII_MODEL_CICADA_CS8201 0x0001
|
||||
#define MII_STR_CICADA_CS8201 "CS8201 10/100/1000TX PHY"
|
||||
#define MII_STR_CICADA_CS8201 "CS8201"
|
||||
#define MII_MODEL_CICADA_CS8204 0x0004
|
||||
#define MII_STR_CICADA_CS8204 "CS8204 10/100/1000TX PHY"
|
||||
#define MII_STR_CICADA_CS8204 "CS8204"
|
||||
#define MII_MODEL_CICADA_VSC8211 0x000b
|
||||
#define MII_STR_CICADA_VSC8211 "VSC8211 10/100/1000 PHY"
|
||||
#define MII_STR_CICADA_VSC8211 "VSC8211"
|
||||
#define MII_MODEL_CICADA_CS8201A 0x0020
|
||||
#define MII_STR_CICADA_CS8201A "CS8201 10/100/1000TX PHY"
|
||||
#define MII_STR_CICADA_CS8201A "CS8201"
|
||||
#define MII_MODEL_CICADA_CS8201B 0x0021
|
||||
#define MII_STR_CICADA_CS8201B "CS8201 10/100/1000TX PHY"
|
||||
#define MII_STR_CICADA_CS8201B "CS8201"
|
||||
#define MII_MODEL_CICADA_CS8244 0x002c
|
||||
#define MII_STR_CICADA_CS8244 "CS8244 10/100/1000TX PHY"
|
||||
#define MII_STR_CICADA_CS8244 "CS8244"
|
||||
|
||||
/* Davicom PHYs */
|
||||
/* Davicom */
|
||||
#define MII_MODEL_xxDAVICOM_DM9101 0x0000
|
||||
#define MII_STR_xxDAVICOM_DM9101 "DM9101 10/100 PHY"
|
||||
#define MII_STR_xxDAVICOM_DM9101 "DM9101"
|
||||
#define MII_MODEL_DAVICOM_DM9102 0x0004
|
||||
#define MII_STR_DAVICOM_DM9102 "DM9102 10/100 PHY"
|
||||
#define MII_STR_DAVICOM_DM9102 "DM9102"
|
||||
#define MII_MODEL_DAVICOM_DM9601 0x000c
|
||||
#define MII_STR_DAVICOM_DM9601 "DM9601 10/100 PHY"
|
||||
#define MII_STR_DAVICOM_DM9601 "DM9601"
|
||||
|
||||
/* Contrived vendor/model for dcphy */
|
||||
#define MII_MODEL_xxDEC_xxDC 0x0001
|
||||
#define MII_STR_xxDEC_xxDC "DC"
|
||||
|
||||
/* Enable Semi. PHYs (Agere) */
|
||||
/* Enable Semi. (Agere) */
|
||||
#define MII_MODEL_ENABLESEMI_LU3X31FT 0x0001
|
||||
#define MII_STR_ENABLESEMI_LU3X31FT "LU3X31FT"
|
||||
#define MII_MODEL_ENABLESEMI_LU3X31T2 0x0002
|
||||
|
|
@ -287,206 +287,206 @@
|
|||
#define MII_MODEL_ENABLESEMI_88E1000 0x0005
|
||||
#define MII_STR_ENABLESEMI_88E1000 "88E1000"
|
||||
|
||||
/* IC Plus PHYs */
|
||||
/* IC Plus */
|
||||
#define MII_MODEL_ICPLUS_IP100 0x0004
|
||||
#define MII_STR_ICPLUS_IP100 "IP100 10/100 PHY"
|
||||
#define MII_STR_ICPLUS_IP100 "IP100"
|
||||
#define MII_MODEL_ICPLUS_IP101 0x0005
|
||||
#define MII_STR_ICPLUS_IP101 "IP101 10/100 PHY"
|
||||
#define MII_STR_ICPLUS_IP101 "IP101"
|
||||
#define MII_MODEL_ICPLUS_IP1000A 0x0008
|
||||
#define MII_STR_ICPLUS_IP1000A "IP1000A 10/100/1000 PHY"
|
||||
#define MII_STR_ICPLUS_IP1000A "IP1000A"
|
||||
#define MII_MODEL_ICPLUS_IP1001 0x0019
|
||||
#define MII_STR_ICPLUS_IP1001 "IP1001 10/100/1000 PHY"
|
||||
#define MII_STR_ICPLUS_IP1001 "IP1001"
|
||||
|
||||
/* Integrated Circuit Systems PHYs */
|
||||
/* Integrated Circuit Systems */
|
||||
#define MII_MODEL_xxICS_1890 0x0002
|
||||
#define MII_STR_xxICS_1890 "ICS1890 10/100 PHY"
|
||||
#define MII_STR_xxICS_1890 "ICS1890"
|
||||
#define MII_MODEL_xxICS_1892 0x0003
|
||||
#define MII_STR_xxICS_1892 "ICS1892 10/100 PHY"
|
||||
#define MII_STR_xxICS_1892 "ICS1892"
|
||||
#define MII_MODEL_xxICS_1893 0x0004
|
||||
#define MII_STR_xxICS_1893 "ICS1893 10/100 PHY"
|
||||
#define MII_STR_xxICS_1893 "ICS1893"
|
||||
|
||||
/* Intel PHYs */
|
||||
/* Intel */
|
||||
#define MII_MODEL_xxINTEL_I82553 0x0000
|
||||
#define MII_STR_xxINTEL_I82553 "i82553 10/100 PHY"
|
||||
#define MII_STR_xxINTEL_I82553 "i82553"
|
||||
#define MII_MODEL_INTEL_I82555 0x0015
|
||||
#define MII_STR_INTEL_I82555 "i82555 10/100 PHY"
|
||||
#define MII_STR_INTEL_I82555 "i82555"
|
||||
#define MII_MODEL_INTEL_I82562G 0x0031
|
||||
#define MII_STR_INTEL_I82562G "i82562G 10/100 PHY"
|
||||
#define MII_STR_INTEL_I82562G "i82562G"
|
||||
#define MII_MODEL_INTEL_I82562EM 0x0032
|
||||
#define MII_STR_INTEL_I82562EM "i82562EM 10/100 PHY"
|
||||
#define MII_STR_INTEL_I82562EM "i82562EM"
|
||||
#define MII_MODEL_INTEL_I82562ET 0x0033
|
||||
#define MII_STR_INTEL_I82562ET "i82562ET 10/100 PHY"
|
||||
#define MII_STR_INTEL_I82562ET "i82562ET"
|
||||
#define MII_MODEL_INTEL_I82553 0x0035
|
||||
#define MII_STR_INTEL_I82553 "i82553 10/100 PHY"
|
||||
#define MII_STR_INTEL_I82553 "i82553"
|
||||
|
||||
/* Jato Technologies PHYs */
|
||||
/* Jato Technologies */
|
||||
#define MII_MODEL_JATO_BASEX 0x0000
|
||||
#define MII_STR_JATO_BASEX "Jato 1000baseX PHY"
|
||||
#define MII_STR_JATO_BASEX "Jato"
|
||||
|
||||
/* JMicron PHYs */
|
||||
/* JMicron */
|
||||
#define MII_MODEL_JMICRON_JMP211 0x0021
|
||||
#define MII_STR_JMICRON_JMP211 "JMP211 10/100/1000 PHY"
|
||||
#define MII_STR_JMICRON_JMP211 "JMP211"
|
||||
#define MII_MODEL_JMICRON_JMP202 0x0022
|
||||
#define MII_STR_JMICRON_JMP202 "JMP202 10/100 PHY"
|
||||
#define MII_STR_JMICRON_JMP202 "JMP202"
|
||||
|
||||
/* Level 1 PHYs */
|
||||
/* Level 1 */
|
||||
#define MII_MODEL_xxLEVEL1_LXT970 0x0000
|
||||
#define MII_STR_xxLEVEL1_LXT970 "LXT970 10/100 PHY"
|
||||
#define MII_STR_xxLEVEL1_LXT970 "LXT970"
|
||||
#define MII_MODEL_xxLEVEL1a_LXT971 0x000e
|
||||
#define MII_STR_xxLEVEL1a_LXT971 "LXT971 10/100 PHY"
|
||||
#define MII_STR_xxLEVEL1a_LXT971 "LXT971"
|
||||
#define MII_MODEL_LEVEL1_LXT1000_OLD 0x0003
|
||||
#define MII_STR_LEVEL1_LXT1000_OLD "LXT1000 10/100/1000 PHY"
|
||||
#define MII_STR_LEVEL1_LXT1000_OLD "LXT1000"
|
||||
#define MII_MODEL_LEVEL1_LXT1000 0x000c
|
||||
#define MII_STR_LEVEL1_LXT1000 "LXT1000 10/100/1000 PHY"
|
||||
#define MII_STR_LEVEL1_LXT1000 "LXT1000"
|
||||
|
||||
/* Lucent PHYs */
|
||||
/* Lucent */
|
||||
#define MII_MODEL_LUCENT_LU6612 0x000c
|
||||
#define MII_STR_LUCENT_LU6612 "LU6612 10/100 PHY"
|
||||
#define MII_STR_LUCENT_LU6612 "LU6612"
|
||||
#define MII_MODEL_LUCENT_LU3X51FT 0x0033
|
||||
#define MII_STR_LUCENT_LU3X51FT "LU3X51FT 10/100 PHY"
|
||||
#define MII_STR_LUCENT_LU3X51FT "LU3X51FT"
|
||||
#define MII_MODEL_LUCENT_LU3X54FT 0x0036
|
||||
#define MII_STR_LUCENT_LU3X54FT "LU3X54FT 10/100 PHY"
|
||||
#define MII_STR_LUCENT_LU3X54FT "LU3X54FT"
|
||||
|
||||
/* Marvell PHYs */
|
||||
/* Marvell */
|
||||
#define MII_MODEL_xxMARVELL_E1000_5 0x0002
|
||||
#define MII_STR_xxMARVELL_E1000_5 "88E1000 5 Gigabit PHY"
|
||||
#define MII_STR_xxMARVELL_E1000_5 "88E1000 5"
|
||||
#define MII_MODEL_xxMARVELL_E1000_6 0x0003
|
||||
#define MII_STR_xxMARVELL_E1000_6 "88E1000 6 Gigabit PHY"
|
||||
#define MII_STR_xxMARVELL_E1000_6 "88E1000 6"
|
||||
#define MII_MODEL_xxMARVELL_E1000_7 0x0005
|
||||
#define MII_STR_xxMARVELL_E1000_7 "88E1000 7 Gigabit PHY"
|
||||
#define MII_STR_xxMARVELL_E1000_7 "88E1000 7"
|
||||
#define MII_MODEL_xxMARVELL_E1111 0x000c
|
||||
#define MII_STR_xxMARVELL_E1111 "88E1111 Gigabit PHY"
|
||||
#define MII_STR_xxMARVELL_E1111 "88E1111"
|
||||
#define MII_MODEL_MARVELL_E1000_1 0x0000
|
||||
#define MII_STR_MARVELL_E1000_1 "88E1000 1 Gigabit PHY"
|
||||
#define MII_STR_MARVELL_E1000_1 "88E1000 1"
|
||||
#define MII_MODEL_MARVELL_E1011 0x0002
|
||||
#define MII_STR_MARVELL_E1011 "88E1011 Gigabit PHY"
|
||||
#define MII_STR_MARVELL_E1011 "88E1011"
|
||||
#define MII_MODEL_MARVELL_E1000_2 0x0003
|
||||
#define MII_STR_MARVELL_E1000_2 "88E1000 2 Gigabit PHY"
|
||||
#define MII_STR_MARVELL_E1000_2 "88E1000 2"
|
||||
#define MII_MODEL_MARVELL_E1000S 0x0004
|
||||
#define MII_STR_MARVELL_E1000S "88E1000S Gigabit PHY"
|
||||
#define MII_STR_MARVELL_E1000S "88E1000S"
|
||||
#define MII_MODEL_MARVELL_E1000_3 0x0005
|
||||
#define MII_STR_MARVELL_E1000_3 "88E1000 3 Gigabit PHY"
|
||||
#define MII_STR_MARVELL_E1000_3 "88E1000 3"
|
||||
#define MII_MODEL_MARVELL_E1000_4 0x0006
|
||||
#define MII_STR_MARVELL_E1000_4 "88E1000 4 Gigabit PHY"
|
||||
#define MII_STR_MARVELL_E1000_4 "88E1000 4"
|
||||
#define MII_MODEL_MARVELL_E3082 0x0008
|
||||
#define MII_STR_MARVELL_E3082 "88E3082 10/100 PHY"
|
||||
#define MII_STR_MARVELL_E3082 "88E3082"
|
||||
#define MII_MODEL_MARVELL_E1112 0x0009
|
||||
#define MII_STR_MARVELL_E1112 "88E1112 Gigabit PHY"
|
||||
#define MII_STR_MARVELL_E1112 "88E1112"
|
||||
#define MII_MODEL_MARVELL_E1149 0x000b
|
||||
#define MII_STR_MARVELL_E1149 "88E1149 Gigabit PHY"
|
||||
#define MII_STR_MARVELL_E1149 "88E1149"
|
||||
#define MII_MODEL_MARVELL_E1111 0x000c
|
||||
#define MII_STR_MARVELL_E1111 "88E1111 Gigabit PHY"
|
||||
#define MII_STR_MARVELL_E1111 "88E1111"
|
||||
#define MII_MODEL_MARVELL_E1512 0x001d
|
||||
#define MII_STR_MARVELL_E1512 "88E1512 10/100/1000 PHY"
|
||||
#define MII_STR_MARVELL_E1512 "88E1512"
|
||||
#define MII_MODEL_MARVELL_E1116 0x0021
|
||||
#define MII_STR_MARVELL_E1116 "88E1116 Gigabit PHY"
|
||||
#define MII_STR_MARVELL_E1116 "88E1116"
|
||||
#define MII_MODEL_MARVELL_E1118 0x0022
|
||||
#define MII_STR_MARVELL_E1118 "88E1118 Gigabit PHY"
|
||||
#define MII_STR_MARVELL_E1118 "88E1118"
|
||||
#define MII_MODEL_MARVELL_E1116R 0x0024
|
||||
#define MII_STR_MARVELL_E1116R "88E1116R Gigabit PHY"
|
||||
#define MII_STR_MARVELL_E1116R "88E1116R"
|
||||
#define MII_MODEL_MARVELL_E3016 0x0026
|
||||
#define MII_STR_MARVELL_E3016 "88E3016 10/100 PHY"
|
||||
#define MII_STR_MARVELL_E3016 "88E3016"
|
||||
#define MII_MODEL_MARVELL_PHYG65G 0x0027
|
||||
#define MII_STR_MARVELL_PHYG65G "PHYG65G Gigabit PHY"
|
||||
#define MII_STR_MARVELL_PHYG65G "PHYG65G"
|
||||
#define MII_MODEL_MARVELL_E1545 0x002a
|
||||
#define MII_STR_MARVELL_E1545 "88E1545 Quad 10/100/1000 PHY"
|
||||
#define MII_STR_MARVELL_E1545 "88E1545 Quad"
|
||||
|
||||
/* Micrel PHYs */
|
||||
/* Micrel */
|
||||
#define MII_MODEL_MICREL_KSZ9021 0x0021
|
||||
#define MII_STR_MICREL_KSZ9021 "KSZ9021 10/100/1000 PHY"
|
||||
#define MII_STR_MICREL_KSZ9021 "KSZ9021"
|
||||
#define MII_MODEL_MICREL_KSZ9031 0x0022
|
||||
#define MII_STR_MICREL_KSZ9031 "KSZ9031 10/100/1000 PHY"
|
||||
#define MII_STR_MICREL_KSZ9031 "KSZ9031"
|
||||
|
||||
/* Motorcomm PHYs */
|
||||
/* Motorcomm */
|
||||
#define MII_MODEL_MOTORCOMM_YT8531 0x0011
|
||||
#define MII_STR_MOTORCOMM_YT8531 "YT8531 10/100/1000 PHY"
|
||||
#define MII_STR_MOTORCOMM_YT8531 "YT8531"
|
||||
|
||||
/* Myson PHYs */
|
||||
/* Myson */
|
||||
#define MII_MODEL_MYSON_MTD972 0x0000
|
||||
#define MII_STR_MYSON_MTD972 "MTD972 10/100 PHY"
|
||||
#define MII_STR_MYSON_MTD972 "MTD972"
|
||||
|
||||
/* National Semi. PHYs */
|
||||
/* National Semi. */
|
||||
#define MII_MODEL_NATSEMI_DP83840 0x0000
|
||||
#define MII_STR_NATSEMI_DP83840 "DP83840 10/100 PHY"
|
||||
#define MII_STR_NATSEMI_DP83840 "DP83840"
|
||||
#define MII_MODEL_NATSEMI_DP83843 0x0001
|
||||
#define MII_STR_NATSEMI_DP83843 "DP83843 10/100 PHY"
|
||||
#define MII_STR_NATSEMI_DP83843 "DP83843"
|
||||
#define MII_MODEL_NATSEMI_DP83815 0x0002
|
||||
#define MII_STR_NATSEMI_DP83815 "DP83815 10/100 PHY"
|
||||
#define MII_STR_NATSEMI_DP83815 "DP83815"
|
||||
#define MII_MODEL_NATSEMI_DP83847 0x0003
|
||||
#define MII_STR_NATSEMI_DP83847 "DP83847 10/100 PHY"
|
||||
#define MII_STR_NATSEMI_DP83847 "DP83847"
|
||||
#define MII_MODEL_NATSEMI_DP83891 0x0005
|
||||
#define MII_STR_NATSEMI_DP83891 "DP83891 10/100/1000 PHY"
|
||||
#define MII_STR_NATSEMI_DP83891 "DP83891"
|
||||
#define MII_MODEL_NATSEMI_DP83861 0x0006
|
||||
#define MII_STR_NATSEMI_DP83861 "DP83861 10/100/1000 PHY"
|
||||
#define MII_STR_NATSEMI_DP83861 "DP83861"
|
||||
#define MII_MODEL_NATSEMI_DP83865 0x0007
|
||||
#define MII_STR_NATSEMI_DP83865 "DP83865 10/100/1000 PHY"
|
||||
#define MII_STR_NATSEMI_DP83865 "DP83865"
|
||||
|
||||
/* Plessey Semi. PHYs */
|
||||
/* Plessey Semi. */
|
||||
#define MII_MODEL_PLESSEY_NWK914 0x0000
|
||||
#define MII_STR_PLESSEY_NWK914 "NWK914 10/100 PHY"
|
||||
#define MII_STR_PLESSEY_NWK914 "NWK914"
|
||||
|
||||
/* Quality Semi. PHYs */
|
||||
/* Quality Semi. */
|
||||
#define MII_MODEL_QUALITYSEMI_QS6612 0x0000
|
||||
#define MII_STR_QUALITYSEMI_QS6612 "QS6612 10/100 PHY"
|
||||
#define MII_STR_QUALITYSEMI_QS6612 "QS6612"
|
||||
|
||||
/* RDC Semi. PHYs */
|
||||
/* RDC Semi. */
|
||||
#define MII_MODEL_RDC_R6040 0x0003
|
||||
#define MII_STR_RDC_R6040 "R6040 10/100 PHY"
|
||||
#define MII_STR_RDC_R6040 "R6040"
|
||||
#define MII_MODEL_RDC_R6040_2 0x0005
|
||||
#define MII_STR_RDC_R6040_2 "R6040 10/100 PHY"
|
||||
#define MII_STR_RDC_R6040_2 "R6040"
|
||||
|
||||
/* Realtek PHYs */
|
||||
/* Realtek */
|
||||
#define MII_MODEL_xxREALTEK_RTL8251 0x0000
|
||||
#define MII_STR_xxREALTEK_RTL8251 "RTL8251 PHY"
|
||||
#define MII_STR_xxREALTEK_RTL8251 "RTL8251"
|
||||
#define MII_MODEL_xxREALTEK_RTL8211FVD 0x0007
|
||||
#define MII_STR_xxREALTEK_RTL8211FVD "RTL8211F-VD PHY"
|
||||
#define MII_STR_xxREALTEK_RTL8211FVD "RTL8211F-VD"
|
||||
#define MII_MODEL_xxREALTEK_RTL8201E 0x0008
|
||||
#define MII_STR_xxREALTEK_RTL8201E "RTL8201E 10/100 PHY"
|
||||
#define MII_STR_xxREALTEK_RTL8201E "RTL8201E"
|
||||
#define MII_MODEL_xxREALTEK_RTL8169S 0x0011
|
||||
#define MII_STR_xxREALTEK_RTL8169S "RTL8169S/8110S/8211 PHY"
|
||||
#define MII_STR_xxREALTEK_RTL8169S "RTL8169S/8110S/8211"
|
||||
#define MII_MODEL_REALTEK_RTL8201L 0x0020
|
||||
#define MII_STR_REALTEK_RTL8201L "RTL8201L 10/100 PHY"
|
||||
#define MII_STR_REALTEK_RTL8201L "RTL8201L"
|
||||
|
||||
/* Seeq PHYs */
|
||||
/* Seeq */
|
||||
#define MII_MODEL_xxSEEQ_80220 0x0003
|
||||
#define MII_STR_xxSEEQ_80220 "80220 10/100 PHY"
|
||||
#define MII_STR_xxSEEQ_80220 "80220"
|
||||
#define MII_MODEL_xxSEEQ_84220 0x0004
|
||||
#define MII_STR_xxSEEQ_84220 "84220 10/100 PHY"
|
||||
#define MII_STR_xxSEEQ_84220 "84220"
|
||||
#define MII_MODEL_xxSEEQ_80225 0x0008
|
||||
#define MII_STR_xxSEEQ_80225 "80225 10/100 PHY"
|
||||
#define MII_STR_xxSEEQ_80225 "80225"
|
||||
|
||||
/* Silicon Integrated Systems PHYs */
|
||||
/* Silicon Integrated Systems */
|
||||
#define MII_MODEL_xxSIS_900 0x0000
|
||||
#define MII_STR_xxSIS_900 "900 10/100 PHY"
|
||||
#define MII_STR_xxSIS_900 "900"
|
||||
|
||||
/* Standard Microsystems PHYs */
|
||||
/* Standard Microsystems */
|
||||
#define MII_MODEL_SMSC_LAN83C185 0x000a
|
||||
#define MII_STR_SMSC_LAN83C185 "LAN83C185 10/100 PHY"
|
||||
#define MII_STR_SMSC_LAN83C185 "LAN83C185"
|
||||
|
||||
/* Texas Instruments PHYs */
|
||||
/* Texas Instruments */
|
||||
#define MII_MODEL_xxTI_TLAN10T 0x0001
|
||||
#define MII_STR_xxTI_TLAN10T "ThunderLAN 10baseT PHY"
|
||||
#define MII_STR_xxTI_TLAN10T "ThunderLAN"
|
||||
#define MII_MODEL_xxTI_100VGPMI 0x0002
|
||||
#define MII_STR_xxTI_100VGPMI "ThunderLAN 100VG-AnyLan PHY"
|
||||
#define MII_STR_xxTI_100VGPMI "ThunderLAN"
|
||||
#define MII_MODEL_xxTI_TNETE2101 0x0003
|
||||
#define MII_STR_xxTI_TNETE2101 "TNETE2101 PHY"
|
||||
#define MII_STR_xxTI_TNETE2101 "TNETE2101"
|
||||
|
||||
/* TDK PHYs */
|
||||
/* TDK */
|
||||
#define MII_MODEL_TDK_78Q2120 0x0014
|
||||
#define MII_STR_TDK_78Q2120 "78Q2120 10/100 PHY"
|
||||
#define MII_STR_TDK_78Q2120 "78Q2120"
|
||||
#define MII_MODEL_TDK_78Q2121 0x0015
|
||||
#define MII_STR_TDK_78Q2121 "78Q2121 100baseTX PHY"
|
||||
#define MII_STR_TDK_78Q2121 "78Q2121"
|
||||
|
||||
/* VIA Networking PHYs */
|
||||
/* VIA Networking */
|
||||
#define MII_MODEL_VIA_VT6103 0x0032
|
||||
#define MII_STR_VIA_VT6103 "VT6103 10/100 PHY"
|
||||
#define MII_STR_VIA_VT6103 "VT6103"
|
||||
#define MII_MODEL_VIA_VT6103_2 0x0034
|
||||
#define MII_STR_VIA_VT6103_2 "VT6103 10/100 PHY"
|
||||
#define MII_STR_VIA_VT6103_2 "VT6103"
|
||||
|
||||
/* Vitesse PHYs */
|
||||
/* Vitesse */
|
||||
#define MII_MODEL_VITESSE_VSC8601 0x0002
|
||||
#define MII_STR_VITESSE_VSC8601 "VSC8601 10/100/1000 PHY"
|
||||
#define MII_STR_VITESSE_VSC8601 "VSC8601"
|
||||
|
||||
/* XaQti PHYs */
|
||||
/* XaQti */
|
||||
#define MII_MODEL_XAQTI_XMACII 0x0000
|
||||
#define MII_STR_XAQTI_XMACII "XMAC II Gigabit PHY"
|
||||
#define MII_STR_XAQTI_XMACII "XMAC II"
|
||||
|
|
|
|||
|
|
@ -4290,9 +4290,10 @@ static u32 gfx_v9_4_3_get_cu_active_bitmap(struct amdgpu_device *adev, int xcc_i
|
|||
static int gfx_v9_4_3_get_cu_info(struct amdgpu_device *adev,
|
||||
struct amdgpu_cu_info *cu_info)
|
||||
{
|
||||
int i, j, k, counter, xcc_id, active_cu_number = 0;
|
||||
u32 mask, bitmap, ao_bitmap, ao_cu_mask = 0;
|
||||
int i, j, k, prev_counter, counter, xcc_id, active_cu_number = 0;
|
||||
u32 mask, bitmap, ao_bitmap, ao_cu_mask = 0, tmp;
|
||||
unsigned disable_masks[4 * 4];
|
||||
bool is_symmetric_cus;
|
||||
|
||||
if (!adev || !cu_info)
|
||||
return -EINVAL;
|
||||
|
|
@ -4310,6 +4311,7 @@ static int gfx_v9_4_3_get_cu_info(struct amdgpu_device *adev,
|
|||
|
||||
mutex_lock(&adev->grbm_idx_mutex);
|
||||
for (xcc_id = 0; xcc_id < NUM_XCC(adev->gfx.xcc_mask); xcc_id++) {
|
||||
is_symmetric_cus = true;
|
||||
for (i = 0; i < adev->gfx.config.max_shader_engines; i++) {
|
||||
for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) {
|
||||
mask = 1;
|
||||
|
|
@ -4337,6 +4339,15 @@ static int gfx_v9_4_3_get_cu_info(struct amdgpu_device *adev,
|
|||
ao_cu_mask |= (ao_bitmap << (i * 16 + j * 8));
|
||||
cu_info->ao_cu_bitmap[i][j] = ao_bitmap;
|
||||
}
|
||||
if (i && is_symmetric_cus && prev_counter != counter)
|
||||
is_symmetric_cus = false;
|
||||
prev_counter = counter;
|
||||
}
|
||||
if (is_symmetric_cus) {
|
||||
tmp = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_CPC_DEBUG);
|
||||
tmp = REG_SET_FIELD(tmp, CP_CPC_DEBUG, CPC_HARVESTING_RELAUNCH_DISABLE, 1);
|
||||
tmp = REG_SET_FIELD(tmp, CP_CPC_DEBUG, CPC_HARVESTING_DISPATCH_DISABLE, 1);
|
||||
WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_CPC_DEBUG, tmp);
|
||||
}
|
||||
gfx_v9_4_3_xcc_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff,
|
||||
xcc_id);
|
||||
|
|
|
|||
|
|
@ -10637,6 +10637,49 @@ static bool parse_edid_cea(struct amdgpu_dm_connector *aconnector,
|
|||
return ret;
|
||||
}
|
||||
|
||||
static void parse_edid_displayid_vrr(struct drm_connector *connector,
|
||||
struct edid *edid)
|
||||
{
|
||||
u8 *edid_ext = NULL;
|
||||
int i;
|
||||
int j = 0;
|
||||
u16 min_vfreq;
|
||||
u16 max_vfreq;
|
||||
|
||||
if (edid == NULL || edid->extensions == 0)
|
||||
return;
|
||||
|
||||
/* Find DisplayID extension */
|
||||
for (i = 0; i < edid->extensions; i++) {
|
||||
edid_ext = (void *)(edid + (i + 1));
|
||||
if (edid_ext[0] == DISPLAYID_EXT)
|
||||
break;
|
||||
}
|
||||
|
||||
if (edid_ext == NULL)
|
||||
return;
|
||||
|
||||
while (j < EDID_LENGTH) {
|
||||
/* Get dynamic video timing range from DisplayID if available */
|
||||
if (EDID_LENGTH - j > 13 && edid_ext[j] == 0x25 &&
|
||||
(edid_ext[j+1] & 0xFE) == 0 && (edid_ext[j+2] == 9)) {
|
||||
min_vfreq = edid_ext[j+9];
|
||||
if (edid_ext[j+1] & 7)
|
||||
max_vfreq = edid_ext[j+10] + ((edid_ext[j+11] & 3) << 8);
|
||||
else
|
||||
max_vfreq = edid_ext[j+10];
|
||||
|
||||
if (max_vfreq && min_vfreq) {
|
||||
connector->display_info.monitor_range.max_vfreq = max_vfreq;
|
||||
connector->display_info.monitor_range.min_vfreq = min_vfreq;
|
||||
|
||||
return;
|
||||
}
|
||||
}
|
||||
j++;
|
||||
}
|
||||
}
|
||||
|
||||
static int parse_amd_vsdb(struct amdgpu_dm_connector *aconnector,
|
||||
struct edid *edid, struct amdgpu_hdmi_vsdb_info *vsdb_info)
|
||||
{
|
||||
|
|
@ -10759,6 +10802,11 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector,
|
|||
if (!adev->dm.freesync_module)
|
||||
goto update;
|
||||
|
||||
/* Some eDP panels only have the refresh rate range info in DisplayID */
|
||||
if ((connector->display_info.monitor_range.min_vfreq == 0 ||
|
||||
connector->display_info.monitor_range.max_vfreq == 0))
|
||||
parse_edid_displayid_vrr(connector, edid);
|
||||
|
||||
if (edid && (sink->sink_signal == SIGNAL_TYPE_DISPLAY_PORT ||
|
||||
sink->sink_signal == SIGNAL_TYPE_EDP)) {
|
||||
bool edid_check_required = false;
|
||||
|
|
@ -10766,9 +10814,11 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector,
|
|||
if (is_dp_capable_without_timing_msa(adev->dm.dc,
|
||||
amdgpu_dm_connector)) {
|
||||
if (edid->features & DRM_EDID_FEATURE_CONTINUOUS_FREQ) {
|
||||
freesync_capable = true;
|
||||
amdgpu_dm_connector->min_vfreq = connector->display_info.monitor_range.min_vfreq;
|
||||
amdgpu_dm_connector->max_vfreq = connector->display_info.monitor_range.max_vfreq;
|
||||
if (amdgpu_dm_connector->max_vfreq -
|
||||
amdgpu_dm_connector->min_vfreq > 10)
|
||||
freesync_capable = true;
|
||||
} else {
|
||||
edid_check_required = edid->version > 1 ||
|
||||
(edid->version == 1 &&
|
||||
|
|
|
|||
|
|
@ -3364,6 +3364,9 @@ void dml32_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l
|
|||
&mode_lib->vba.UrgentBurstFactorLumaPre[k],
|
||||
&mode_lib->vba.UrgentBurstFactorChromaPre[k],
|
||||
&mode_lib->vba.NotUrgentLatencyHidingPre[k]);
|
||||
|
||||
v->cursor_bw_pre[k] = mode_lib->vba.NumberOfCursors[k] * mode_lib->vba.CursorWidth[k][0] * mode_lib->vba.CursorBPP[k][0] /
|
||||
8.0 / (mode_lib->vba.HTotal[k] / mode_lib->vba.PixelClock[k]) * v->VRatioPreY[i][j][k];
|
||||
}
|
||||
|
||||
{
|
||||
|
|
|
|||
|
|
@ -202,6 +202,12 @@ static const struct dmi_system_id orientation_data[] = {
|
|||
DMI_MATCH(DMI_BOARD_NAME, "NEXT"),
|
||||
},
|
||||
.driver_data = (void *)&lcd800x1280_rightside_up,
|
||||
}, { /* AYA NEO KUN */
|
||||
.matches = {
|
||||
DMI_EXACT_MATCH(DMI_BOARD_VENDOR, "AYANEO"),
|
||||
DMI_MATCH(DMI_BOARD_NAME, "KUN"),
|
||||
},
|
||||
.driver_data = (void *)&lcd1600x2560_rightside_up,
|
||||
}, { /* Chuwi HiBook (CWI514) */
|
||||
.matches = {
|
||||
DMI_MATCH(DMI_BOARD_VENDOR, "Hampoo"),
|
||||
|
|
|
|||
|
|
@ -734,7 +734,7 @@ static void radeon_gem_va_update_vm(struct radeon_device *rdev,
|
|||
if (r)
|
||||
goto error_unlock;
|
||||
|
||||
if (bo_va->it.start)
|
||||
if (bo_va->it.start && bo_va->bo)
|
||||
r = radeon_vm_bo_update(rdev, bo_va, bo_va->bo->tbo.resource);
|
||||
|
||||
error_unlock:
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $OpenBSD: if_vio.c,v 1.42 2024/06/28 14:46:31 jan Exp $ */
|
||||
/* $OpenBSD: if_vio.c,v 1.44 2024/07/26 07:55:23 sf Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2012 Stefan Fritsch, Alexander Fiveg.
|
||||
|
|
@ -90,7 +90,13 @@
|
|||
#define VIRTIO_NET_F_GUEST_ANNOUNCE (1ULL<<21)
|
||||
#define VIRTIO_NET_F_MQ (1ULL<<22)
|
||||
#define VIRTIO_NET_F_CTRL_MAC_ADDR (1ULL<<23)
|
||||
|
||||
#define VIRTIO_NET_F_HOST_USO (1ULL<<56)
|
||||
#define VIRTIO_NET_F_HASH_REPORT (1ULL<<57)
|
||||
#define VIRTIO_NET_F_GUEST_HDRLEN (1ULL<<59)
|
||||
#define VIRTIO_NET_F_RSS (1ULL<<60)
|
||||
#define VIRTIO_NET_F_RSC_EXT (1ULL<<61)
|
||||
#define VIRTIO_NET_F_STANDBY (1ULL<<62)
|
||||
#define VIRTIO_NET_F_SPEED_DUPLEX (1ULL<<63)
|
||||
/*
|
||||
* Config(8) flags. The lowest byte is reserved for generic virtio stuff.
|
||||
*/
|
||||
|
|
@ -123,6 +129,13 @@ static const struct virtio_feature_name virtio_net_feature_names[] = {
|
|||
{ VIRTIO_NET_F_GUEST_ANNOUNCE, "GuestAnnounce" },
|
||||
{ VIRTIO_NET_F_MQ, "MQ" },
|
||||
{ VIRTIO_NET_F_CTRL_MAC_ADDR, "CtrlMAC" },
|
||||
{ VIRTIO_NET_F_HOST_USO, "HostUso" },
|
||||
{ VIRTIO_NET_F_HASH_REPORT, "HashRpt" },
|
||||
{ VIRTIO_NET_F_GUEST_HDRLEN, "GuestHdrlen" },
|
||||
{ VIRTIO_NET_F_RSS, "RSS" },
|
||||
{ VIRTIO_NET_F_RSC_EXT, "RSSExt" },
|
||||
{ VIRTIO_NET_F_STANDBY, "Stdby" },
|
||||
{ VIRTIO_NET_F_SPEED_DUPLEX, "SpdDplx" },
|
||||
#endif
|
||||
{ 0, NULL }
|
||||
};
|
||||
|
|
@ -731,7 +744,8 @@ vio_init(struct ifnet *ifp)
|
|||
if (virtio_has_feature(vsc, VIRTIO_NET_F_CTRL_GUEST_OFFLOADS)) {
|
||||
uint64_t features = 0;
|
||||
|
||||
SET(features, VIRTIO_NET_F_GUEST_CSUM);
|
||||
if (virtio_has_feature(vsc, VIRTIO_NET_F_GUEST_CSUM))
|
||||
SET(features, VIRTIO_NET_F_GUEST_CSUM);
|
||||
|
||||
if (ISSET(ifp->if_xflags, IFXF_LRO)) {
|
||||
if (virtio_has_feature(vsc, VIRTIO_NET_F_GUEST_TSO4))
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $OpenBSD: vioblk.c,v 1.39 2024/06/26 01:40:49 jsg Exp $ */
|
||||
/* $OpenBSD: vioblk.c,v 1.40 2024/07/26 07:55:23 sf Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2012 Stefan Fritsch.
|
||||
|
|
@ -79,8 +79,11 @@ struct virtio_feature_name vioblk_feature_names[] = {
|
|||
{ VIRTIO_BLK_F_FLUSH, "Flush" },
|
||||
{ VIRTIO_BLK_F_TOPOLOGY, "Topology" },
|
||||
{ VIRTIO_BLK_F_CONFIG_WCE, "ConfigWCE" },
|
||||
{ VIRTIO_BLK_F_MQ, "MQ" },
|
||||
{ VIRTIO_BLK_F_DISCARD, "Discard" },
|
||||
{ VIRTIO_BLK_F_WRITE_ZEROES, "Write0s" },
|
||||
{ VIRTIO_BLK_F_LIFETIME, "Lifetime" },
|
||||
{ VIRTIO_BLK_F_SECURE_ERASE, "SecErase" },
|
||||
#endif
|
||||
{ 0, NULL }
|
||||
};
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $OpenBSD: vioblkreg.h,v 1.4 2019/03/24 18:22:36 sf Exp $ */
|
||||
/* $OpenBSD: vioblkreg.h,v 1.5 2024/07/26 07:55:23 sf Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2012 Stefan Fritsch.
|
||||
|
|
@ -50,8 +50,11 @@
|
|||
#define VIRTIO_BLK_F_FLUSH (1ULL<<9)
|
||||
#define VIRTIO_BLK_F_TOPOLOGY (1ULL<<10)
|
||||
#define VIRTIO_BLK_F_CONFIG_WCE (1ULL<<11)
|
||||
#define VIRTIO_BLK_F_DISCARD (1ULL<<12)
|
||||
#define VIRTIO_BLK_F_WRITE_ZEROES (1ULL<<13)
|
||||
#define VIRTIO_BLK_F_MQ (1ULL<<12)
|
||||
#define VIRTIO_BLK_F_DISCARD (1ULL<<13)
|
||||
#define VIRTIO_BLK_F_WRITE_ZEROES (1ULL<<14)
|
||||
#define VIRTIO_BLK_F_LIFETIME (1ULL<<15)
|
||||
#define VIRTIO_BLK_F_SECURE_ERASE (1ULL<<16)
|
||||
|
||||
/* Command */
|
||||
#define VIRTIO_BLK_T_IN 0
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $OpenBSD: virtio.c,v 1.27 2024/07/25 08:35:40 sf Exp $ */
|
||||
/* $OpenBSD: virtio.c,v 1.28 2024/07/26 07:55:23 sf Exp $ */
|
||||
/* $NetBSD: virtio.c,v 1.3 2011/11/02 23:05:52 njoly Exp $ */
|
||||
|
||||
/*
|
||||
|
|
@ -81,10 +81,19 @@ virtio_device_string(int id)
|
|||
#if VIRTIO_DEBUG
|
||||
static const struct virtio_feature_name transport_feature_names[] = {
|
||||
{ VIRTIO_F_NOTIFY_ON_EMPTY, "NotifyOnEmpty"},
|
||||
{ VIRTIO_F_ANY_LAYOUT, "AnyLayout"},
|
||||
{ VIRTIO_F_RING_INDIRECT_DESC, "RingIndirectDesc"},
|
||||
{ VIRTIO_F_RING_EVENT_IDX, "RingEventIdx"},
|
||||
{ VIRTIO_F_BAD_FEATURE, "BadFeature"},
|
||||
{ VIRTIO_F_VERSION_1, "Version1"},
|
||||
{ VIRTIO_F_ACCESS_PLATFORM, "AccessPlatf"},
|
||||
{ VIRTIO_F_RING_PACKED, "RingPacked"},
|
||||
{ VIRTIO_F_IN_ORDER, "InOrder"},
|
||||
{ VIRTIO_F_ORDER_PLATFORM, "OrderPlatf"},
|
||||
{ VIRTIO_F_SR_IOV, "SrIov"},
|
||||
{ VIRTIO_F_NOTIFICATION_DATA, "NotifData"},
|
||||
{ VIRTIO_F_NOTIF_CONFIG_DATA, "NotifConfData"},
|
||||
{ VIRTIO_F_RING_RESET, "RingReset"},
|
||||
{ 0, NULL}
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $OpenBSD: virtioreg.h,v 1.5 2023/04/20 19:28:31 jcs Exp $ */
|
||||
/* $OpenBSD: virtioreg.h,v 1.6 2024/07/26 07:55:23 sf Exp $ */
|
||||
/* $NetBSD: virtioreg.h,v 1.1 2011/10/30 12:12:21 hannken Exp $ */
|
||||
|
||||
/*
|
||||
|
|
@ -85,10 +85,19 @@
|
|||
|
||||
/* device-independent feature bits */
|
||||
#define VIRTIO_F_NOTIFY_ON_EMPTY (1ULL<<24)
|
||||
#define VIRTIO_F_ANY_LAYOUT (1ULL<<27)
|
||||
#define VIRTIO_F_RING_INDIRECT_DESC (1ULL<<28)
|
||||
#define VIRTIO_F_RING_EVENT_IDX (1ULL<<29)
|
||||
#define VIRTIO_F_BAD_FEATURE (1ULL<<30)
|
||||
#define VIRTIO_F_VERSION_1 (1ULL<<32)
|
||||
#define VIRTIO_F_ACCESS_PLATFORM (1ULL<<33)
|
||||
#define VIRTIO_F_RING_PACKED (1ULL<<34)
|
||||
#define VIRTIO_F_IN_ORDER (1ULL<<35)
|
||||
#define VIRTIO_F_ORDER_PLATFORM (1ULL<<36)
|
||||
#define VIRTIO_F_SR_IOV (1ULL<<37)
|
||||
#define VIRTIO_F_NOTIFICATION_DATA (1ULL<<38)
|
||||
#define VIRTIO_F_NOTIF_CONFIG_DATA (1ULL<<39)
|
||||
#define VIRTIO_F_RING_RESET (1ULL<<40)
|
||||
|
||||
/* device status bits */
|
||||
#define VIRTIO_CONFIG_DEVICE_STATUS_RESET 0
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $OpenBSD: ugold.c,v 1.28 2024/05/23 03:21:09 jsg Exp $ */
|
||||
/* $OpenBSD: ugold.c,v 1.29 2024/07/27 17:31:49 miod Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2013 Takayoshi SASANO <uaa@openbsd.org>
|
||||
|
|
@ -453,7 +453,8 @@ ugold_si700x_type(struct ugold_softc *sc)
|
|||
if (sc->sc_model_len >= 9 &&
|
||||
memcmp(sc->sc_model, "TEMPerHUM", 9) == 0) {
|
||||
if (memcmp(sc->sc_model + 9, "_V3.9 ", 16 - 9) == 0 ||
|
||||
memcmp(sc->sc_model + 9, "_V4.0 ", 16 - 9) == 0) {
|
||||
memcmp(sc->sc_model + 9, "_V4.0 ", 16 - 9) == 0 ||
|
||||
memcmp(sc->sc_model + 9, "_V4.1\0\0", 16 - 9) == 0) {
|
||||
sc->sc_type = UGOLD_TYPE_TEMPERX;
|
||||
descr = "temperx (temperature and humidity)";
|
||||
goto identified;
|
||||
|
|
@ -484,7 +485,7 @@ ugold_si700x_type(struct ugold_softc *sc)
|
|||
sc->sc_type = UGOLD_TYPE_GOLD;
|
||||
/*
|
||||
* TEMPer1F devices lack the internal sensor, but will never
|
||||
* report data for it, so it will never gets marked as valid.
|
||||
* report data for it, so it will never get marked as valid.
|
||||
* We thus keep the value of sc_num_sensors unchanged at 2,
|
||||
* and make sure we will only report one single sensor below.
|
||||
*/
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue