From f4c73361e2714997bac475a1ee8509b4b81ac63a Mon Sep 17 00:00:00 2001 From: purplerain Date: Sat, 27 Jul 2024 19:47:41 +0000 Subject: [PATCH] sync with OpenBSD -current --- distrib/sets/lists/base/mi | 2 +- lib/libcrypto/cms/cms_att.c | 14 +- lib/libcrypto/hidden/openssl/x509.h | 8 +- lib/libcrypto/man/ERR_load_strings.3 | 7 +- lib/libcrypto/x509/x509_att.c | 21 +- lib/libcrypto/x509/x509_req.c | 8 +- share/man/man4/ugold.4 | 5 +- sys/arch/amd64/amd64/vmm_machdep.c | 9 +- sys/arch/arm64/arm64/locore.S | 8 +- sys/dev/mii/miidevs | 362 ++++++++--------- sys/dev/mii/miidevs.h | 364 +++++++++--------- sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c | 15 +- .../pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 52 ++- .../dc/dml/dcn32/display_mode_vba_32.c | 3 + .../pci/drm/drm_panel_orientation_quirks.c | 6 + sys/dev/pci/drm/radeon/radeon_gem.c | 2 +- sys/dev/pv/if_vio.c | 20 +- sys/dev/pv/vioblk.c | 5 +- sys/dev/pv/vioblkreg.h | 9 +- sys/dev/pv/virtio.c | 11 +- sys/dev/pv/virtioreg.h | 11 +- sys/dev/usb/ugold.c | 7 +- sys/kern/kern_time.c | 25 +- sys/net/pipex.c | 10 +- sys/net/pipex_local.h | 4 +- sys/netinet/in_proto.c | 4 +- sys/netinet6/in6_proto.c | 4 +- sys/sys/ktrace.h | 76 ++-- usr.bin/kdump/ktrstruct.c | 21 +- usr.bin/ssh/sshd_config.5 | 6 +- usr.sbin/smtpd/smtpd.conf.5 | 18 +- 31 files changed, 641 insertions(+), 476 deletions(-) diff --git a/distrib/sets/lists/base/mi b/distrib/sets/lists/base/mi index 45a9467e8..f243784ff 100644 --- a/distrib/sets/lists/base/mi +++ b/distrib/sets/lists/base/mi @@ -753,7 +753,7 @@ ./usr/lib/libpcap.so.9.0 ./usr/lib/libperl.so.24.0 ./usr/lib/libpthread.so.27.1 -./usr/lib/libradius.so.1.0 +./usr/lib/libradius.so.2.0 ./usr/lib/libreadline.so.5.0 ./usr/lib/librpcsvc.so.3.0 ./usr/lib/libskey.so.6.0 diff --git a/lib/libcrypto/cms/cms_att.c b/lib/libcrypto/cms/cms_att.c index 62362ad3f..390ad6e74 100644 --- a/lib/libcrypto/cms/cms_att.c +++ b/lib/libcrypto/cms/cms_att.c @@ -1,4 +1,4 @@ -/* $OpenBSD: cms_att.c,v 1.11 2023/07/08 08:26:26 beck Exp $ */ +/* $OpenBSD: cms_att.c,v 1.12 2024/07/26 13:23:52 tb Exp $ */ /* * Written by Dr Stephen N Henson (steve@openssl.org) for the OpenSSL * project. @@ -64,7 +64,7 @@ int CMS_signed_get_attr_count(const CMS_SignerInfo *si) { - return X509at_get_attr_count(si->signedAttrs); + return sk_X509_ATTRIBUTE_num(si->signedAttrs); } LCRYPTO_ALIAS(CMS_signed_get_attr_count); @@ -86,14 +86,14 @@ LCRYPTO_ALIAS(CMS_signed_get_attr_by_OBJ); X509_ATTRIBUTE * CMS_signed_get_attr(const CMS_SignerInfo *si, int loc) { - return X509at_get_attr(si->signedAttrs, loc); + return sk_X509_ATTRIBUTE_value(si->signedAttrs, loc); } LCRYPTO_ALIAS(CMS_signed_get_attr); X509_ATTRIBUTE * CMS_signed_delete_attr(CMS_SignerInfo *si, int loc) { - return X509at_delete_attr(si->signedAttrs, loc); + return sk_X509_ATTRIBUTE_delete(si->signedAttrs, loc); } LCRYPTO_ALIAS(CMS_signed_delete_attr); @@ -147,7 +147,7 @@ LCRYPTO_ALIAS(CMS_signed_get0_data_by_OBJ); int CMS_unsigned_get_attr_count(const CMS_SignerInfo *si) { - return X509at_get_attr_count(si->unsignedAttrs); + return sk_X509_ATTRIBUTE_num(si->unsignedAttrs); } LCRYPTO_ALIAS(CMS_unsigned_get_attr_count); @@ -169,14 +169,14 @@ LCRYPTO_ALIAS(CMS_unsigned_get_attr_by_OBJ); X509_ATTRIBUTE * CMS_unsigned_get_attr(const CMS_SignerInfo *si, int loc) { - return X509at_get_attr(si->unsignedAttrs, loc); + return sk_X509_ATTRIBUTE_value(si->unsignedAttrs, loc); } LCRYPTO_ALIAS(CMS_unsigned_get_attr); X509_ATTRIBUTE * CMS_unsigned_delete_attr(CMS_SignerInfo *si, int loc) { - return X509at_delete_attr(si->unsignedAttrs, loc); + return sk_X509_ATTRIBUTE_delete(si->unsignedAttrs, loc); } LCRYPTO_ALIAS(CMS_unsigned_delete_attr); diff --git a/lib/libcrypto/hidden/openssl/x509.h b/lib/libcrypto/hidden/openssl/x509.h index 29abbc5c0..87ee4e5ed 100644 --- a/lib/libcrypto/hidden/openssl/x509.h +++ b/lib/libcrypto/hidden/openssl/x509.h @@ -1,4 +1,4 @@ -/* $OpenBSD: x509.h,v 1.8 2024/07/15 18:50:42 tb Exp $ */ +/* $OpenBSD: x509.h,v 1.9 2024/07/26 13:34:56 tb Exp $ */ /* * Copyright (c) 2022 Bob Beck * @@ -243,11 +243,11 @@ LCRYPTO_USED(X509_EXTENSION_set_data); LCRYPTO_USED(X509_EXTENSION_get_object); LCRYPTO_USED(X509_EXTENSION_get_data); LCRYPTO_USED(X509_EXTENSION_get_critical); -LCRYPTO_USED(X509at_get_attr_count); +LCRYPTO_UNUSED(X509at_get_attr_count); LCRYPTO_USED(X509at_get_attr_by_NID); LCRYPTO_USED(X509at_get_attr_by_OBJ); -LCRYPTO_USED(X509at_get_attr); -LCRYPTO_USED(X509at_delete_attr); +LCRYPTO_UNUSED(X509at_get_attr); +LCRYPTO_UNUSED(X509at_delete_attr); LCRYPTO_USED(X509at_add1_attr); LCRYPTO_USED(X509at_add1_attr_by_OBJ); LCRYPTO_USED(X509at_add1_attr_by_NID); diff --git a/lib/libcrypto/man/ERR_load_strings.3 b/lib/libcrypto/man/ERR_load_strings.3 index 44fde08c9..102074395 100644 --- a/lib/libcrypto/man/ERR_load_strings.3 +++ b/lib/libcrypto/man/ERR_load_strings.3 @@ -1,4 +1,4 @@ -.\" $OpenBSD: ERR_load_strings.3,v 1.7 2018/03/27 17:35:50 schwarze Exp $ +.\" $OpenBSD: ERR_load_strings.3,v 1.8 2024/07/26 03:40:43 tb Exp $ .\" OpenSSL 05ea606a May 20 20:52:46 2016 -0400 .\" .\" This file was written by Ulf Moeller . @@ -48,7 +48,7 @@ .\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED .\" OF THE POSSIBILITY OF SUCH DAMAGE. .\" -.Dd $Mdocdate: March 27 2018 $ +.Dd $Mdocdate: July 26 2024 $ .Dt ERR_LOAD_STRINGS 3 .Os .Sh NAME @@ -79,8 +79,7 @@ registers error strings for library number .Fa str is an array of error string data: .Bd -literal -offset indent -typedef struct ERR_string_data_st -{ +typedef struct ERR_string_data_st { unsigned long error; char *string; } ERR_STRING_DATA; diff --git a/lib/libcrypto/x509/x509_att.c b/lib/libcrypto/x509/x509_att.c index 0c9d55f74..21b47ce96 100644 --- a/lib/libcrypto/x509/x509_att.c +++ b/lib/libcrypto/x509/x509_att.c @@ -1,4 +1,4 @@ -/* $OpenBSD: x509_att.c,v 1.22 2023/02/16 08:38:17 tb Exp $ */ +/* $OpenBSD: x509_att.c,v 1.24 2024/07/26 13:33:39 tb Exp $ */ /* Copyright (C) 1995-1998 Eric Young (eay@cryptsoft.com) * All rights reserved. * @@ -71,7 +71,8 @@ int X509at_get_attr_count(const STACK_OF(X509_ATTRIBUTE) *x) { - return sk_X509_ATTRIBUTE_num(x); + X509error(ERR_R_DISABLED); + return 0; } LCRYPTO_ALIAS(X509at_get_attr_count); @@ -112,22 +113,16 @@ LCRYPTO_ALIAS(X509at_get_attr_by_OBJ); X509_ATTRIBUTE * X509at_get_attr(const STACK_OF(X509_ATTRIBUTE) *x, int loc) { - if (x == NULL || sk_X509_ATTRIBUTE_num(x) <= loc || loc < 0) - return NULL; - else - return sk_X509_ATTRIBUTE_value(x, loc); + X509error(ERR_R_DISABLED); + return NULL; } LCRYPTO_ALIAS(X509at_get_attr); X509_ATTRIBUTE * X509at_delete_attr(STACK_OF(X509_ATTRIBUTE) *x, int loc) { - X509_ATTRIBUTE *ret; - - if (x == NULL || sk_X509_ATTRIBUTE_num(x) <= loc || loc < 0) - return (NULL); - ret = sk_X509_ATTRIBUTE_delete(x, loc); - return (ret); + X509error(ERR_R_DISABLED); + return NULL; } LCRYPTO_ALIAS(X509at_delete_attr); @@ -227,7 +222,7 @@ X509at_get0_data_by_OBJ(STACK_OF(X509_ATTRIBUTE) *x, const ASN1_OBJECT *obj, return NULL; if ((lastpos <= -2) && (X509at_get_attr_by_OBJ(x, obj, i) != -1)) return NULL; - at = X509at_get_attr(x, i); + at = sk_X509_ATTRIBUTE_value(x, i); if (lastpos <= -3 && (X509_ATTRIBUTE_count(at) != 1)) return NULL; return X509_ATTRIBUTE_get0_data(at, 0, type, NULL); diff --git a/lib/libcrypto/x509/x509_req.c b/lib/libcrypto/x509/x509_req.c index a21542c3b..256501497 100644 --- a/lib/libcrypto/x509/x509_req.c +++ b/lib/libcrypto/x509/x509_req.c @@ -1,4 +1,4 @@ -/* $OpenBSD: x509_req.c,v 1.41 2024/05/09 14:29:08 tb Exp $ */ +/* $OpenBSD: x509_req.c,v 1.42 2024/07/26 13:24:39 tb Exp $ */ /* Copyright (C) 1995-1998 Eric Young (eay@cryptsoft.com) * All rights reserved. * @@ -236,7 +236,7 @@ LCRYPTO_ALIAS(X509_REQ_add_extensions); int X509_REQ_get_attr_count(const X509_REQ *req) { - return X509at_get_attr_count(req->req_info->attributes); + return sk_X509_ATTRIBUTE_num(req->req_info->attributes); } LCRYPTO_ALIAS(X509_REQ_get_attr_count); @@ -258,14 +258,14 @@ LCRYPTO_ALIAS(X509_REQ_get_attr_by_OBJ); X509_ATTRIBUTE * X509_REQ_get_attr(const X509_REQ *req, int loc) { - return X509at_get_attr(req->req_info->attributes, loc); + return sk_X509_ATTRIBUTE_value(req->req_info->attributes, loc); } LCRYPTO_ALIAS(X509_REQ_get_attr); X509_ATTRIBUTE * X509_REQ_delete_attr(X509_REQ *req, int loc) { - return X509at_delete_attr(req->req_info->attributes, loc); + return sk_X509_ATTRIBUTE_delete(req->req_info->attributes, loc); } LCRYPTO_ALIAS(X509_REQ_delete_attr); diff --git a/share/man/man4/ugold.4 b/share/man/man4/ugold.4 index abf6b6875..1868b7ff1 100644 --- a/share/man/man4/ugold.4 +++ b/share/man/man4/ugold.4 @@ -1,4 +1,4 @@ -.\" $OpenBSD: ugold.4,v 1.10 2023/12/21 19:40:47 miod Exp $ +.\" $OpenBSD: ugold.4,v 1.11 2024/07/27 17:31:49 miod Exp $ .\" .\" Copyright (c) 2013 Takayoshi SASANO .\" Copyright (c) 2013 Martin Pieuchot @@ -16,7 +16,7 @@ .\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF .\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. .\" -.Dd $Mdocdate: December 21 2023 $ +.Dd $Mdocdate: July 27 2024 $ .Dt UGOLD 4 .Os .Sh NAME @@ -44,6 +44,7 @@ driver: .It Li "RDing TEMPerHum1V1.2" Ta "1 Temperature and 1 Humidity" .It Li "RDing TEMPerHUM_V3.9" Ta "1 Temperature and 1 Humidity" .It Li "RDing TEMPerHUM_V4.0" Ta "1 Temperature and 1 Humidity" +.It Li "RDing TEMPerHUM_V4.1" Ta "1 Temperature and 1 Humidity" .It Li "RDing TEMPer1F_H1V1.5F" Ta "1 Temperature and 1 Humidity" .It Li "RDing TEMPerX_V3.1" Ta "1 Temperature and 1 Humidity" .It Li "RDing TEMPerX_V3.3" Ta "1 Temperature and 1 Humidity" diff --git a/sys/arch/amd64/amd64/vmm_machdep.c b/sys/arch/amd64/amd64/vmm_machdep.c index bfb748aad..22c16005c 100644 --- a/sys/arch/amd64/amd64/vmm_machdep.c +++ b/sys/arch/amd64/amd64/vmm_machdep.c @@ -1,4 +1,4 @@ -/* $OpenBSD: vmm_machdep.c,v 1.30 2024/07/24 21:04:12 dv Exp $ */ +/* $OpenBSD: vmm_machdep.c,v 1.31 2024/07/26 15:59:04 bluhm Exp $ */ /* * Copyright (c) 2014 Mike Larkin * @@ -1905,6 +1905,7 @@ vcpu_reset_regs_svm(struct vcpu *vcpu, struct vcpu_reg_state *vrs) * I/O instructions (SVM_INTERCEPT_INOUT) * MSR access (SVM_INTERCEPT_MSR) * shutdown events (SVM_INTERCEPT_SHUTDOWN) + * INVLPGA instruction (SVM_INTERCEPT_INVLPGA) * * VMRUN instruction (SVM_INTERCEPT_VMRUN) * VMMCALL instruction (SVM_INTERCEPT_VMMCALL) @@ -1918,19 +1919,17 @@ vcpu_reset_regs_svm(struct vcpu *vcpu, struct vcpu_reg_state *vrs) * MWAIT instruction (SVM_INTERCEPT_MWAIT_COND) * MONITOR instruction (SVM_INTERCEPT_MONITOR) * RDTSCP instruction (SVM_INTERCEPT_RDTSCP) - * INVLPGA instruction (SVM_INTERCEPT_INVLPGA) * XSETBV instruction (SVM_INTERCEPT_XSETBV) (if available) */ vmcb->v_intercept1 = SVM_INTERCEPT_INTR | SVM_INTERCEPT_NMI | SVM_INTERCEPT_CPUID | SVM_INTERCEPT_HLT | SVM_INTERCEPT_INOUT | - SVM_INTERCEPT_MSR | SVM_INTERCEPT_SHUTDOWN; + SVM_INTERCEPT_MSR | SVM_INTERCEPT_SHUTDOWN | SVM_INTERCEPT_INVLPGA; vmcb->v_intercept2 = SVM_INTERCEPT_VMRUN | SVM_INTERCEPT_VMMCALL | SVM_INTERCEPT_VMLOAD | SVM_INTERCEPT_VMSAVE | SVM_INTERCEPT_STGI | SVM_INTERCEPT_CLGI | SVM_INTERCEPT_SKINIT | SVM_INTERCEPT_ICEBP | SVM_INTERCEPT_MWAIT_UNCOND | SVM_INTERCEPT_MONITOR | - SVM_INTERCEPT_MWAIT_COND | SVM_INTERCEPT_RDTSCP | - SVM_INTERCEPT_INVLPGA; + SVM_INTERCEPT_MWAIT_COND | SVM_INTERCEPT_RDTSCP; if (xsave_mask) vmcb->v_intercept2 |= SVM_INTERCEPT_XSETBV; diff --git a/sys/arch/arm64/arm64/locore.S b/sys/arch/arm64/arm64/locore.S index c426d3238..304da2df3 100644 --- a/sys/arch/arm64/arm64/locore.S +++ b/sys/arch/arm64/arm64/locore.S @@ -1,4 +1,4 @@ -/* $OpenBSD: locore.S,v 1.46 2024/03/16 20:46:28 kettenis Exp $ */ +/* $OpenBSD: locore.S,v 1.47 2024/07/27 13:31:26 kettenis Exp $ */ /*- * Copyright (c) 2012-2014 Andrew Turner * All rights reserved. @@ -315,6 +315,9 @@ initstack: .globl initstack_end initstack_end: +/* The signal trampoline saves and restores the floating-point registers. */ +.arch_extension fp + .text .globl sigcode .type sigcode,@function @@ -387,6 +390,9 @@ esigfill: sigfillsiz: .word esigfill - sigfill +/* Back to normal kernel code. */ +.arch_extension nofp + .text #ifdef MULTIPROCESSOR diff --git a/sys/dev/mii/miidevs b/sys/dev/mii/miidevs index 0741f60fd..2e3b039c7 100644 --- a/sys/dev/mii/miidevs +++ b/sys/dev/mii/miidevs @@ -1,4 +1,4 @@ -$OpenBSD: miidevs,v 1.133 2023/07/08 08:18:30 kettenis Exp $ +$OpenBSD: miidevs,v 1.134 2024/07/27 03:26:04 deraadt Exp $ /* $NetBSD: miidevs,v 1.3 1998/11/05 03:43:43 thorpej Exp $ */ /*- @@ -112,221 +112,221 @@ oui xxMARVELL 0x000ac2 Marvell * List of known models. Grouped by oui. */ -/* AMD PHYs */ -model xxAMD 79C873 0x0000 Am79C873 10/100 PHY -model AMD 79C875phy 0x0014 Am79C875 quad PHY -model AMD 79C873phy 0x0036 Am79C873 internal PHY +/* AMD */ +model xxAMD 79C873 0x0000 Am79C873 +model AMD 79C875phy 0x0014 Am79C875 quad +model AMD 79C873phy 0x0036 Am79C873 internal -/* Agere PHYs */ -model AGERE ET1011 0x0004 ET1011 10/100/1000baseT PHY +/* Agere */ +model AGERE ET1011 0x0004 ET1011 -/* Atheros PHYs */ -model ATHEROS F1 0x0001 F1 10/100/1000 PHY -model ATHEROS F2 0x0002 F2 10/100 PHY -model ATHEROS AR8035 0x0007 AR8035 10/100/1000 PHY +/* Atheros */ +model ATHEROS F1 0x0001 F1 +model ATHEROS F2 0x0002 F2 +model ATHEROS AR8035 0x0007 AR8035 -/* Altima PHYs */ -model xxALTIMA AC_UNKNOWN 0x0001 AC_UNKNOWN 10/100 PHY -model xxALTIMA AC101L 0x0012 AC101L 10/100 PHY -model xxALTIMA AC101 0x0021 AC101 10/100 PHY +/* Altima */ +model xxALTIMA AC_UNKNOWN 0x0001 AC_UNKNOWN +model xxALTIMA AC101L 0x0012 AC101L +model xxALTIMA AC101 0x0021 AC101 -/* Broadcom PHYs */ -model xxBROADCOM BCM5400 0x0004 BCM5400 1000baseT PHY -model xxBROADCOM BCM5401 0x0005 BCM5401 10/100/1000baseT PHY -model xxBROADCOM BCM5411 0x0007 BCM5411 10/100/1000baseT PHY -model xxBROADCOM BCM5464 0x000b BCM5464 10/100/1000baseT PHY -model xxBROADCOM BCM5461 0x000c BCM5461 10/100/1000baseT PHY -model xxBROADCOM BCM5462 0x000d BCM5462 10/100/1000baseT PHY -model xxBROADCOM BCM5421 0x000e BCM5421 10/100/1000baseT PHY -model xxBROADCOM BCM5752 0x0010 BCM5752 10/100/1000baseT PHY -model xxBROADCOM BCM5701 0x0011 BCM5701 10/100/1000baseT PHY -model xxBROADCOM BCM5706 0x0015 BCM5706 10/100/1000baseT/SX PHY -model xxBROADCOM BCM5703 0x0016 BCM5703 10/100/1000baseT PHY -model xxBROADCOM BCM5750 0x0018 BCM5750 10/100/1000baseT PHY -model xxBROADCOM BCM5704 0x0019 BCM5704 10/100/1000baseT PHY -model xxBROADCOM BCM5705 0x001a BCM5705 10/100/1000baseT PHY -model xxBROADCOM BCM54K2 0x002e BCM54K2 10/100/1000baseT PHY -model xxBROADCOM BCM5714 0x0034 BCM5714 10/100/1000baseT/SX PHY -model xxBROADCOM BCM5780 0x0035 BCM5780 10/100/1000baseT/SX PHY -model xxBROADCOM BCM5708C 0x0036 BCM5708C 10/100/1000baseT PHY -model xxBROADCOM2 BCM54XX 0x0007 BCM54XX 10/100/1000baseT PHY -model xxBROADCOM2 BCM5481 0x000a BCM5481 10/100/1000baseT PHY -model xxBROADCOM2 BCM5482 0x000b BCM5482 10/100/1000baseT PHY -model xxBROADCOM2 BCM5755 0x000c BCM5755 10/100/1000baseT PHY -model xxBROADCOM2 BCM5787 0x000e BCM5787 10/100/1000baseT PHY -model xxBROADCOM2 BCM5708S 0x0015 BCM5708S 1000/2500baseSX PHY -model xxBROADCOM2 BCM5709CAX 0x002c BCM5709CAX 10/100/1000baseT PHY -model xxBROADCOM2 BCM5722 0x002d BCM5722 10/100/1000baseT PHY -model xxBROADCOM2 BCM5784 0x003a BCM5784 10/100/1000baseT PHY -model xxBROADCOM2 BCM5709C 0x003c BCM5709 10/100/1000baseT PHY -model xxBROADCOM2 BCM5761 0x003d BCM5761 10/100/1000baseT PHY -model xxBROADCOM2 BCM5709S 0x003f BCM5709S 1000/2500baseSX PHY -model xxBROADCOM2 BCM53115 0x0038 BCM53115 10/100/1000baseT PHY -model xxBROADCOM3 BCM57780 0x0019 BCM57780 10/100/1000baseT PHY -model xxBROADCOM3 BCM5717C 0x0020 BCM5717C 10/100/1000baseT PHY -model xxBROADCOM3 BCM5719C 0x0022 BCM5719C 10/100/1000baseT PHY -model xxBROADCOM3 BCM57765 0x0024 BCM57765 10/100/1000baseT PHY -model xxBROADCOM3 BCM5720C 0x0036 BCM5720C 10/100/1000baseT PHY -model xxBROADCOM4 BCM54210E 0x000a BCM54210E 10/100/1000baseT PHY -model xxBROADCOM4 BCM5725 0x0038 BCM5725 10/100/1000baseT PHY -model BROADCOM BCM5400 0x0004 BCM5400 1000baseT PHY -model BROADCOM BCM5401 0x0005 BCM5401 1000baseT PHY -model BROADCOM BCM5411 0x0007 BCM5411 1000baseT PHY -model BROADCOM 3C905B 0x0012 3C905B internal PHY -model BROADCOM 3C905C 0x0017 3C905C internal PHY -model BROADCOM BCM5221 0x001e BCM5221 100baseTX PHY -model BROADCOM BCM5201 0x0021 BCM5201 10/100 PHY -model BROADCOM BCM5214 0x0028 BCM5214 Quad 10/100 PHY -model BROADCOM BCM5222 0x0032 BCM5222 Dual 10/100 PHY -model BROADCOM BCM5220 0x0033 BCM5220 10/100 PHY -model BROADCOM BCM4401 0x0036 BCM4401 10/100baseTX PHY -model BROADCOM2 BCM5906 0x0004 BCM5906 10/100baseTX PHY +/* Broadcom */ +model xxBROADCOM BCM5400 0x0004 BCM5400 +model xxBROADCOM BCM5401 0x0005 BCM5401 +model xxBROADCOM BCM5411 0x0007 BCM5411 +model xxBROADCOM BCM5464 0x000b BCM5464 +model xxBROADCOM BCM5461 0x000c BCM5461 +model xxBROADCOM BCM5462 0x000d BCM5462 +model xxBROADCOM BCM5421 0x000e BCM5421 +model xxBROADCOM BCM5752 0x0010 BCM5752 +model xxBROADCOM BCM5701 0x0011 BCM5701 +model xxBROADCOM BCM5706 0x0015 BCM5706 +model xxBROADCOM BCM5703 0x0016 BCM5703 +model xxBROADCOM BCM5750 0x0018 BCM5750 +model xxBROADCOM BCM5704 0x0019 BCM5704 +model xxBROADCOM BCM5705 0x001a BCM5705 +model xxBROADCOM BCM54K2 0x002e BCM54K2 +model xxBROADCOM BCM5714 0x0034 BCM5714 +model xxBROADCOM BCM5780 0x0035 BCM5780 +model xxBROADCOM BCM5708C 0x0036 BCM5708C +model xxBROADCOM2 BCM54XX 0x0007 BCM54XX +model xxBROADCOM2 BCM5481 0x000a BCM5481 +model xxBROADCOM2 BCM5482 0x000b BCM5482 +model xxBROADCOM2 BCM5755 0x000c BCM5755 +model xxBROADCOM2 BCM5787 0x000e BCM5787 +model xxBROADCOM2 BCM5708S 0x0015 BCM5708S +model xxBROADCOM2 BCM5709CAX 0x002c BCM5709CAX +model xxBROADCOM2 BCM5722 0x002d BCM5722 +model xxBROADCOM2 BCM5784 0x003a BCM5784 +model xxBROADCOM2 BCM5709C 0x003c BCM5709 +model xxBROADCOM2 BCM5761 0x003d BCM5761 +model xxBROADCOM2 BCM5709S 0x003f BCM5709S +model xxBROADCOM2 BCM53115 0x0038 BCM53115 +model xxBROADCOM3 BCM57780 0x0019 BCM57780 +model xxBROADCOM3 BCM5717C 0x0020 BCM5717C +model xxBROADCOM3 BCM5719C 0x0022 BCM5719C +model xxBROADCOM3 BCM57765 0x0024 BCM57765 +model xxBROADCOM3 BCM5720C 0x0036 BCM5720C +model xxBROADCOM4 BCM54210E 0x000a BCM54210E +model xxBROADCOM4 BCM5725 0x0038 BCM5725 +model BROADCOM BCM5400 0x0004 BCM5400 +model BROADCOM BCM5401 0x0005 BCM5401 +model BROADCOM BCM5411 0x0007 BCM5411 +model BROADCOM 3C905B 0x0012 3C905B internal +model BROADCOM 3C905C 0x0017 3C905C internal +model BROADCOM BCM5221 0x001e BCM5221 +model BROADCOM BCM5201 0x0021 BCM5201 +model BROADCOM BCM5214 0x0028 BCM5214 Quad +model BROADCOM BCM5222 0x0032 BCM5222 Dual +model BROADCOM BCM5220 0x0033 BCM5220 +model BROADCOM BCM4401 0x0036 BCM4401 +model BROADCOM2 BCM5906 0x0004 BCM5906 -/* Cicada PHYs (now owned by Vitesse) */ -model xxCICADA CS8201B 0x0021 CS8201 10/100/1000TX PHY -model CICADA CS8201 0x0001 CS8201 10/100/1000TX PHY -model CICADA CS8204 0x0004 CS8204 10/100/1000TX PHY -model CICADA VSC8211 0x000b VSC8211 10/100/1000 PHY -model CICADA CS8201A 0x0020 CS8201 10/100/1000TX PHY -model CICADA CS8201B 0x0021 CS8201 10/100/1000TX PHY -model CICADA CS8244 0x002c CS8244 10/100/1000TX PHY +/* Cicada (now owned by Vitesse) */ +model xxCICADA CS8201B 0x0021 CS8201 +model CICADA CS8201 0x0001 CS8201 +model CICADA CS8204 0x0004 CS8204 +model CICADA VSC8211 0x000b VSC8211 +model CICADA CS8201A 0x0020 CS8201 +model CICADA CS8201B 0x0021 CS8201 +model CICADA CS8244 0x002c CS8244 -/* Davicom PHYs */ -model xxDAVICOM DM9101 0x0000 DM9101 10/100 PHY -model DAVICOM DM9102 0x0004 DM9102 10/100 PHY -model DAVICOM DM9601 0x000c DM9601 10/100 PHY +/* Davicom */ +model xxDAVICOM DM9101 0x0000 DM9101 +model DAVICOM DM9102 0x0004 DM9102 +model DAVICOM DM9601 0x000c DM9601 /* Contrived vendor/model for dcphy */ model xxDEC xxDC 0x0001 DC -/* Enable Semi. PHYs (Agere) */ +/* Enable Semi. (Agere) */ model ENABLESEMI LU3X31FT 0x0001 LU3X31FT model ENABLESEMI LU3X31T2 0x0002 LU3X31T2 model ENABLESEMI 88E1000S 0x0004 88E1000S model ENABLESEMI 88E1000 0x0005 88E1000 -/* IC Plus PHYs */ -model ICPLUS IP100 0x0004 IP100 10/100 PHY -model ICPLUS IP101 0x0005 IP101 10/100 PHY -model ICPLUS IP1000A 0x0008 IP1000A 10/100/1000 PHY -model ICPLUS IP1001 0x0019 IP1001 10/100/1000 PHY +/* IC Plus */ +model ICPLUS IP100 0x0004 IP100 +model ICPLUS IP101 0x0005 IP101 +model ICPLUS IP1000A 0x0008 IP1000A +model ICPLUS IP1001 0x0019 IP1001 -/* Integrated Circuit Systems PHYs */ -model xxICS 1890 0x0002 ICS1890 10/100 PHY -model xxICS 1892 0x0003 ICS1892 10/100 PHY -model xxICS 1893 0x0004 ICS1893 10/100 PHY +/* Integrated Circuit Systems */ +model xxICS 1890 0x0002 ICS1890 +model xxICS 1892 0x0003 ICS1892 +model xxICS 1893 0x0004 ICS1893 -/* Intel PHYs */ -model xxINTEL I82553 0x0000 i82553 10/100 PHY -model INTEL I82555 0x0015 i82555 10/100 PHY -model INTEL I82562G 0x0031 i82562G 10/100 PHY -model INTEL I82562EM 0x0032 i82562EM 10/100 PHY -model INTEL I82562ET 0x0033 i82562ET 10/100 PHY -model INTEL I82553 0x0035 i82553 10/100 PHY +/* Intel */ +model xxINTEL I82553 0x0000 i82553 +model INTEL I82555 0x0015 i82555 +model INTEL I82562G 0x0031 i82562G +model INTEL I82562EM 0x0032 i82562EM +model INTEL I82562ET 0x0033 i82562ET +model INTEL I82553 0x0035 i82553 -/* Jato Technologies PHYs */ -model JATO BASEX 0x0000 Jato 1000baseX PHY +/* Jato Technologies */ +model JATO BASEX 0x0000 Jato -/* JMicron PHYs */ -model JMICRON JMP211 0x0021 JMP211 10/100/1000 PHY -model JMICRON JMP202 0x0022 JMP202 10/100 PHY +/* JMicron */ +model JMICRON JMP211 0x0021 JMP211 +model JMICRON JMP202 0x0022 JMP202 -/* Level 1 PHYs */ -model xxLEVEL1 LXT970 0x0000 LXT970 10/100 PHY -model xxLEVEL1a LXT971 0x000e LXT971 10/100 PHY -model LEVEL1 LXT1000_OLD 0x0003 LXT1000 10/100/1000 PHY -model LEVEL1 LXT1000 0x000c LXT1000 10/100/1000 PHY +/* Level 1 */ +model xxLEVEL1 LXT970 0x0000 LXT970 +model xxLEVEL1a LXT971 0x000e LXT971 +model LEVEL1 LXT1000_OLD 0x0003 LXT1000 +model LEVEL1 LXT1000 0x000c LXT1000 -/* Lucent PHYs */ -model LUCENT LU6612 0x000c LU6612 10/100 PHY -model LUCENT LU3X51FT 0x0033 LU3X51FT 10/100 PHY -model LUCENT LU3X54FT 0x0036 LU3X54FT 10/100 PHY +/* Lucent */ +model LUCENT LU6612 0x000c LU6612 +model LUCENT LU3X51FT 0x0033 LU3X51FT +model LUCENT LU3X54FT 0x0036 LU3X54FT -/* Marvell PHYs */ -model xxMARVELL E1000_5 0x0002 88E1000 5 Gigabit PHY -model xxMARVELL E1000_6 0x0003 88E1000 6 Gigabit PHY -model xxMARVELL E1000_7 0x0005 88E1000 7 Gigabit PHY -model xxMARVELL E1111 0x000c 88E1111 Gigabit PHY -model MARVELL E1000_1 0x0000 88E1000 1 Gigabit PHY -model MARVELL E1011 0x0002 88E1011 Gigabit PHY -model MARVELL E1000_2 0x0003 88E1000 2 Gigabit PHY -model MARVELL E1000S 0x0004 88E1000S Gigabit PHY -model MARVELL E1000_3 0x0005 88E1000 3 Gigabit PHY -model MARVELL E1000_4 0x0006 88E1000 4 Gigabit PHY -model MARVELL E3082 0x0008 88E3082 10/100 PHY -model MARVELL E1112 0x0009 88E1112 Gigabit PHY -model MARVELL E1149 0x000b 88E1149 Gigabit PHY -model MARVELL E1111 0x000c 88E1111 Gigabit PHY -model MARVELL E1512 0x001d 88E1512 10/100/1000 PHY -model MARVELL E1116 0x0021 88E1116 Gigabit PHY -model MARVELL E1118 0x0022 88E1118 Gigabit PHY -model MARVELL E1116R 0x0024 88E1116R Gigabit PHY -model MARVELL E3016 0x0026 88E3016 10/100 PHY -model MARVELL PHYG65G 0x0027 PHYG65G Gigabit PHY -model MARVELL E1545 0x002a 88E1545 Quad 10/100/1000 PHY +/* Marvell */ +model xxMARVELL E1000_5 0x0002 88E1000 5 +model xxMARVELL E1000_6 0x0003 88E1000 6 +model xxMARVELL E1000_7 0x0005 88E1000 7 +model xxMARVELL E1111 0x000c 88E1111 +model MARVELL E1000_1 0x0000 88E1000 1 +model MARVELL E1011 0x0002 88E1011 +model MARVELL E1000_2 0x0003 88E1000 2 +model MARVELL E1000S 0x0004 88E1000S +model MARVELL E1000_3 0x0005 88E1000 3 +model MARVELL E1000_4 0x0006 88E1000 4 +model MARVELL E3082 0x0008 88E3082 +model MARVELL E1112 0x0009 88E1112 +model MARVELL E1149 0x000b 88E1149 +model MARVELL E1111 0x000c 88E1111 +model MARVELL E1512 0x001d 88E1512 +model MARVELL E1116 0x0021 88E1116 +model MARVELL E1118 0x0022 88E1118 +model MARVELL E1116R 0x0024 88E1116R +model MARVELL E3016 0x0026 88E3016 +model MARVELL PHYG65G 0x0027 PHYG65G +model MARVELL E1545 0x002a 88E1545 Quad -/* Micrel PHYs */ -model MICREL KSZ9021 0x0021 KSZ9021 10/100/1000 PHY -model MICREL KSZ9031 0x0022 KSZ9031 10/100/1000 PHY +/* Micrel */ +model MICREL KSZ9021 0x0021 KSZ9021 +model MICREL KSZ9031 0x0022 KSZ9031 -/* Motorcomm PHYs */ -model MOTORCOMM YT8531 0x0011 YT8531 10/100/1000 PHY +/* Motorcomm */ +model MOTORCOMM YT8531 0x0011 YT8531 -/* Myson PHYs */ -model MYSON MTD972 0x0000 MTD972 10/100 PHY +/* Myson */ +model MYSON MTD972 0x0000 MTD972 -/* National Semi. PHYs */ -model NATSEMI DP83840 0x0000 DP83840 10/100 PHY -model NATSEMI DP83843 0x0001 DP83843 10/100 PHY -model NATSEMI DP83815 0x0002 DP83815 10/100 PHY -model NATSEMI DP83847 0x0003 DP83847 10/100 PHY -model NATSEMI DP83891 0x0005 DP83891 10/100/1000 PHY -model NATSEMI DP83861 0x0006 DP83861 10/100/1000 PHY -model NATSEMI DP83865 0x0007 DP83865 10/100/1000 PHY +/* National Semi. */ +model NATSEMI DP83840 0x0000 DP83840 +model NATSEMI DP83843 0x0001 DP83843 +model NATSEMI DP83815 0x0002 DP83815 +model NATSEMI DP83847 0x0003 DP83847 +model NATSEMI DP83891 0x0005 DP83891 +model NATSEMI DP83861 0x0006 DP83861 +model NATSEMI DP83865 0x0007 DP83865 -/* Plessey Semi. PHYs */ -model PLESSEY NWK914 0x0000 NWK914 10/100 PHY +/* Plessey Semi. */ +model PLESSEY NWK914 0x0000 NWK914 -/* Quality Semi. PHYs */ -model QUALITYSEMI QS6612 0x0000 QS6612 10/100 PHY +/* Quality Semi. */ +model QUALITYSEMI QS6612 0x0000 QS6612 -/* RDC Semi. PHYs */ -model RDC R6040 0x0003 R6040 10/100 PHY -model RDC R6040_2 0x0005 R6040 10/100 PHY +/* RDC Semi. */ +model RDC R6040 0x0003 R6040 +model RDC R6040_2 0x0005 R6040 -/* Realtek PHYs */ -model xxREALTEK RTL8251 0x0000 RTL8251 PHY -model xxREALTEK RTL8211FVD 0x0007 RTL8211F-VD PHY -model xxREALTEK RTL8201E 0x0008 RTL8201E 10/100 PHY -model xxREALTEK RTL8169S 0x0011 RTL8169S/8110S/8211 PHY -model REALTEK RTL8201L 0x0020 RTL8201L 10/100 PHY +/* Realtek */ +model xxREALTEK RTL8251 0x0000 RTL8251 +model xxREALTEK RTL8211FVD 0x0007 RTL8211F-VD +model xxREALTEK RTL8201E 0x0008 RTL8201E +model xxREALTEK RTL8169S 0x0011 RTL8169S/8110S/8211 +model REALTEK RTL8201L 0x0020 RTL8201L -/* Seeq PHYs */ -model xxSEEQ 80220 0x0003 80220 10/100 PHY -model xxSEEQ 84220 0x0004 84220 10/100 PHY -model xxSEEQ 80225 0x0008 80225 10/100 PHY +/* Seeq */ +model xxSEEQ 80220 0x0003 80220 +model xxSEEQ 84220 0x0004 84220 +model xxSEEQ 80225 0x0008 80225 -/* Silicon Integrated Systems PHYs */ -model xxSIS 900 0x0000 900 10/100 PHY +/* Silicon Integrated Systems */ +model xxSIS 900 0x0000 900 -/* Standard Microsystems PHYs */ -model SMSC LAN83C185 0x000a LAN83C185 10/100 PHY +/* Standard Microsystems */ +model SMSC LAN83C185 0x000a LAN83C185 -/* Texas Instruments PHYs */ -model xxTI TLAN10T 0x0001 ThunderLAN 10baseT PHY -model xxTI 100VGPMI 0x0002 ThunderLAN 100VG-AnyLan PHY -model xxTI TNETE2101 0x0003 TNETE2101 PHY +/* Texas Instruments */ +model xxTI TLAN10T 0x0001 ThunderLAN +model xxTI 100VGPMI 0x0002 ThunderLAN +model xxTI TNETE2101 0x0003 TNETE2101 -/* TDK PHYs */ -model TDK 78Q2120 0x0014 78Q2120 10/100 PHY -model TDK 78Q2121 0x0015 78Q2121 100baseTX PHY +/* TDK */ +model TDK 78Q2120 0x0014 78Q2120 +model TDK 78Q2121 0x0015 78Q2121 -/* VIA Networking PHYs */ -model VIA VT6103 0x0032 VT6103 10/100 PHY -model VIA VT6103_2 0x0034 VT6103 10/100 PHY +/* VIA Networking */ +model VIA VT6103 0x0032 VT6103 +model VIA VT6103_2 0x0034 VT6103 -/* Vitesse PHYs */ -model VITESSE VSC8601 0x0002 VSC8601 10/100/1000 PHY +/* Vitesse */ +model VITESSE VSC8601 0x0002 VSC8601 -/* XaQti PHYs */ -model XAQTI XMACII 0x0000 XMAC II Gigabit PHY +/* XaQti */ +model XAQTI XMACII 0x0000 XMAC II diff --git a/sys/dev/mii/miidevs.h b/sys/dev/mii/miidevs.h index 57dfc113e..7b4671fb3 100644 --- a/sys/dev/mii/miidevs.h +++ b/sys/dev/mii/miidevs.h @@ -1,10 +1,10 @@ -/* $OpenBSD: miidevs.h,v 1.137 2023/07/08 08:13:31 kettenis Exp $ */ +/* $OpenBSD: miidevs.h,v 1.138 2024/07/27 03:26:12 deraadt Exp $ */ /* * THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT. * * generated from: - * OpenBSD: miidevs,v 1.132 2023/03/31 13:37:02 kettenis Exp + * OpenBSD: miidevs,v 1.134 2024/07/27 03:26:04 deraadt Exp */ /* $NetBSD: miidevs,v 1.3 1998/11/05 03:43:43 thorpej Exp $ */ @@ -119,165 +119,165 @@ * List of known models. Grouped by oui. */ -/* AMD PHYs */ +/* AMD */ #define MII_MODEL_xxAMD_79C873 0x0000 -#define MII_STR_xxAMD_79C873 "Am79C873 10/100 PHY" +#define MII_STR_xxAMD_79C873 "Am79C873" #define MII_MODEL_AMD_79C875phy 0x0014 -#define MII_STR_AMD_79C875phy "Am79C875 quad PHY" +#define MII_STR_AMD_79C875phy "Am79C875 quad" #define MII_MODEL_AMD_79C873phy 0x0036 -#define MII_STR_AMD_79C873phy "Am79C873 internal PHY" +#define MII_STR_AMD_79C873phy "Am79C873 internal" -/* Agere PHYs */ +/* Agere */ #define MII_MODEL_AGERE_ET1011 0x0004 -#define MII_STR_AGERE_ET1011 "ET1011 10/100/1000baseT PHY" +#define MII_STR_AGERE_ET1011 "ET1011" -/* Atheros PHYs */ +/* Atheros */ #define MII_MODEL_ATHEROS_F1 0x0001 -#define MII_STR_ATHEROS_F1 "F1 10/100/1000 PHY" +#define MII_STR_ATHEROS_F1 "F1" #define MII_MODEL_ATHEROS_F2 0x0002 -#define MII_STR_ATHEROS_F2 "F2 10/100 PHY" +#define MII_STR_ATHEROS_F2 "F2" #define MII_MODEL_ATHEROS_AR8035 0x0007 -#define MII_STR_ATHEROS_AR8035 "AR8035 10/100/1000 PHY" +#define MII_STR_ATHEROS_AR8035 "AR8035" -/* Altima PHYs */ +/* Altima */ #define MII_MODEL_xxALTIMA_AC_UNKNOWN 0x0001 -#define MII_STR_xxALTIMA_AC_UNKNOWN "AC_UNKNOWN 10/100 PHY" +#define MII_STR_xxALTIMA_AC_UNKNOWN "AC_UNKNOWN" #define MII_MODEL_xxALTIMA_AC101L 0x0012 -#define MII_STR_xxALTIMA_AC101L "AC101L 10/100 PHY" +#define MII_STR_xxALTIMA_AC101L "AC101L" #define MII_MODEL_xxALTIMA_AC101 0x0021 -#define MII_STR_xxALTIMA_AC101 "AC101 10/100 PHY" +#define MII_STR_xxALTIMA_AC101 "AC101" -/* Broadcom PHYs */ +/* Broadcom */ #define MII_MODEL_xxBROADCOM_BCM5400 0x0004 -#define MII_STR_xxBROADCOM_BCM5400 "BCM5400 1000baseT PHY" +#define MII_STR_xxBROADCOM_BCM5400 "BCM5400" #define MII_MODEL_xxBROADCOM_BCM5401 0x0005 -#define MII_STR_xxBROADCOM_BCM5401 "BCM5401 10/100/1000baseT PHY" +#define MII_STR_xxBROADCOM_BCM5401 "BCM5401" #define MII_MODEL_xxBROADCOM_BCM5411 0x0007 -#define MII_STR_xxBROADCOM_BCM5411 "BCM5411 10/100/1000baseT PHY" +#define MII_STR_xxBROADCOM_BCM5411 "BCM5411" #define MII_MODEL_xxBROADCOM_BCM5464 0x000b -#define MII_STR_xxBROADCOM_BCM5464 "BCM5464 10/100/1000baseT PHY" +#define MII_STR_xxBROADCOM_BCM5464 "BCM5464" #define MII_MODEL_xxBROADCOM_BCM5461 0x000c -#define MII_STR_xxBROADCOM_BCM5461 "BCM5461 10/100/1000baseT PHY" +#define MII_STR_xxBROADCOM_BCM5461 "BCM5461" #define MII_MODEL_xxBROADCOM_BCM5462 0x000d -#define MII_STR_xxBROADCOM_BCM5462 "BCM5462 10/100/1000baseT PHY" +#define MII_STR_xxBROADCOM_BCM5462 "BCM5462" #define MII_MODEL_xxBROADCOM_BCM5421 0x000e -#define MII_STR_xxBROADCOM_BCM5421 "BCM5421 10/100/1000baseT PHY" +#define MII_STR_xxBROADCOM_BCM5421 "BCM5421" #define MII_MODEL_xxBROADCOM_BCM5752 0x0010 -#define MII_STR_xxBROADCOM_BCM5752 "BCM5752 10/100/1000baseT PHY" +#define MII_STR_xxBROADCOM_BCM5752 "BCM5752" #define MII_MODEL_xxBROADCOM_BCM5701 0x0011 -#define MII_STR_xxBROADCOM_BCM5701 "BCM5701 10/100/1000baseT PHY" +#define MII_STR_xxBROADCOM_BCM5701 "BCM5701" #define MII_MODEL_xxBROADCOM_BCM5706 0x0015 -#define MII_STR_xxBROADCOM_BCM5706 "BCM5706 10/100/1000baseT/SX PHY" +#define MII_STR_xxBROADCOM_BCM5706 "BCM5706" #define MII_MODEL_xxBROADCOM_BCM5703 0x0016 -#define MII_STR_xxBROADCOM_BCM5703 "BCM5703 10/100/1000baseT PHY" +#define MII_STR_xxBROADCOM_BCM5703 "BCM5703" #define MII_MODEL_xxBROADCOM_BCM5750 0x0018 -#define MII_STR_xxBROADCOM_BCM5750 "BCM5750 10/100/1000baseT PHY" +#define MII_STR_xxBROADCOM_BCM5750 "BCM5750" #define MII_MODEL_xxBROADCOM_BCM5704 0x0019 -#define MII_STR_xxBROADCOM_BCM5704 "BCM5704 10/100/1000baseT PHY" +#define MII_STR_xxBROADCOM_BCM5704 "BCM5704" #define MII_MODEL_xxBROADCOM_BCM5705 0x001a -#define MII_STR_xxBROADCOM_BCM5705 "BCM5705 10/100/1000baseT PHY" +#define MII_STR_xxBROADCOM_BCM5705 "BCM5705" #define MII_MODEL_xxBROADCOM_BCM54K2 0x002e -#define MII_STR_xxBROADCOM_BCM54K2 "BCM54K2 10/100/1000baseT PHY" +#define MII_STR_xxBROADCOM_BCM54K2 "BCM54K2" #define MII_MODEL_xxBROADCOM_BCM5714 0x0034 -#define MII_STR_xxBROADCOM_BCM5714 "BCM5714 10/100/1000baseT/SX PHY" +#define MII_STR_xxBROADCOM_BCM5714 "BCM5714" #define MII_MODEL_xxBROADCOM_BCM5780 0x0035 -#define MII_STR_xxBROADCOM_BCM5780 "BCM5780 10/100/1000baseT/SX PHY" +#define MII_STR_xxBROADCOM_BCM5780 "BCM5780" #define MII_MODEL_xxBROADCOM_BCM5708C 0x0036 -#define MII_STR_xxBROADCOM_BCM5708C "BCM5708C 10/100/1000baseT PHY" +#define MII_STR_xxBROADCOM_BCM5708C "BCM5708C" #define MII_MODEL_xxBROADCOM2_BCM54XX 0x0007 -#define MII_STR_xxBROADCOM2_BCM54XX "BCM54XX 10/100/1000baseT PHY" +#define MII_STR_xxBROADCOM2_BCM54XX "BCM54XX" #define MII_MODEL_xxBROADCOM2_BCM5481 0x000a -#define MII_STR_xxBROADCOM2_BCM5481 "BCM5481 10/100/1000baseT PHY" +#define MII_STR_xxBROADCOM2_BCM5481 "BCM5481" #define MII_MODEL_xxBROADCOM2_BCM5482 0x000b -#define MII_STR_xxBROADCOM2_BCM5482 "BCM5482 10/100/1000baseT PHY" +#define MII_STR_xxBROADCOM2_BCM5482 "BCM5482" #define MII_MODEL_xxBROADCOM2_BCM5755 0x000c -#define MII_STR_xxBROADCOM2_BCM5755 "BCM5755 10/100/1000baseT PHY" +#define MII_STR_xxBROADCOM2_BCM5755 "BCM5755" #define MII_MODEL_xxBROADCOM2_BCM5787 0x000e -#define MII_STR_xxBROADCOM2_BCM5787 "BCM5787 10/100/1000baseT PHY" +#define MII_STR_xxBROADCOM2_BCM5787 "BCM5787" #define MII_MODEL_xxBROADCOM2_BCM5708S 0x0015 -#define MII_STR_xxBROADCOM2_BCM5708S "BCM5708S 1000/2500baseSX PHY" +#define MII_STR_xxBROADCOM2_BCM5708S "BCM5708S" #define MII_MODEL_xxBROADCOM2_BCM5709CAX 0x002c -#define MII_STR_xxBROADCOM2_BCM5709CAX "BCM5709CAX 10/100/1000baseT PHY" +#define MII_STR_xxBROADCOM2_BCM5709CAX "BCM5709CAX" #define MII_MODEL_xxBROADCOM2_BCM5722 0x002d -#define MII_STR_xxBROADCOM2_BCM5722 "BCM5722 10/100/1000baseT PHY" +#define MII_STR_xxBROADCOM2_BCM5722 "BCM5722" #define MII_MODEL_xxBROADCOM2_BCM5784 0x003a -#define MII_STR_xxBROADCOM2_BCM5784 "BCM5784 10/100/1000baseT PHY" +#define MII_STR_xxBROADCOM2_BCM5784 "BCM5784" #define MII_MODEL_xxBROADCOM2_BCM5709C 0x003c -#define MII_STR_xxBROADCOM2_BCM5709C "BCM5709 10/100/1000baseT PHY" +#define MII_STR_xxBROADCOM2_BCM5709C "BCM5709" #define MII_MODEL_xxBROADCOM2_BCM5761 0x003d -#define MII_STR_xxBROADCOM2_BCM5761 "BCM5761 10/100/1000baseT PHY" +#define MII_STR_xxBROADCOM2_BCM5761 "BCM5761" #define MII_MODEL_xxBROADCOM2_BCM5709S 0x003f -#define MII_STR_xxBROADCOM2_BCM5709S "BCM5709S 1000/2500baseSX PHY" +#define MII_STR_xxBROADCOM2_BCM5709S "BCM5709S" #define MII_MODEL_xxBROADCOM2_BCM53115 0x0038 -#define MII_STR_xxBROADCOM2_BCM53115 "BCM53115 10/100/1000baseT PHY" +#define MII_STR_xxBROADCOM2_BCM53115 "BCM53115" #define MII_MODEL_xxBROADCOM3_BCM57780 0x0019 -#define MII_STR_xxBROADCOM3_BCM57780 "BCM57780 10/100/1000baseT PHY" +#define MII_STR_xxBROADCOM3_BCM57780 "BCM57780" #define MII_MODEL_xxBROADCOM3_BCM5717C 0x0020 -#define MII_STR_xxBROADCOM3_BCM5717C "BCM5717C 10/100/1000baseT PHY" +#define MII_STR_xxBROADCOM3_BCM5717C "BCM5717C" #define MII_MODEL_xxBROADCOM3_BCM5719C 0x0022 -#define MII_STR_xxBROADCOM3_BCM5719C "BCM5719C 10/100/1000baseT PHY" +#define MII_STR_xxBROADCOM3_BCM5719C "BCM5719C" #define MII_MODEL_xxBROADCOM3_BCM57765 0x0024 -#define MII_STR_xxBROADCOM3_BCM57765 "BCM57765 10/100/1000baseT PHY" +#define MII_STR_xxBROADCOM3_BCM57765 "BCM57765" #define MII_MODEL_xxBROADCOM3_BCM5720C 0x0036 -#define MII_STR_xxBROADCOM3_BCM5720C "BCM5720C 10/100/1000baseT PHY" +#define MII_STR_xxBROADCOM3_BCM5720C "BCM5720C" #define MII_MODEL_xxBROADCOM4_BCM54210E 0x000a -#define MII_STR_xxBROADCOM4_BCM54210E "BCM54210E 10/100/1000baseT PHY" +#define MII_STR_xxBROADCOM4_BCM54210E "BCM54210E" #define MII_MODEL_xxBROADCOM4_BCM5725 0x0038 -#define MII_STR_xxBROADCOM4_BCM5725 "BCM5725 10/100/1000baseT PHY" +#define MII_STR_xxBROADCOM4_BCM5725 "BCM5725" #define MII_MODEL_BROADCOM_BCM5400 0x0004 -#define MII_STR_BROADCOM_BCM5400 "BCM5400 1000baseT PHY" +#define MII_STR_BROADCOM_BCM5400 "BCM5400" #define MII_MODEL_BROADCOM_BCM5401 0x0005 -#define MII_STR_BROADCOM_BCM5401 "BCM5401 1000baseT PHY" +#define MII_STR_BROADCOM_BCM5401 "BCM5401" #define MII_MODEL_BROADCOM_BCM5411 0x0007 -#define MII_STR_BROADCOM_BCM5411 "BCM5411 1000baseT PHY" +#define MII_STR_BROADCOM_BCM5411 "BCM5411" #define MII_MODEL_BROADCOM_3C905B 0x0012 -#define MII_STR_BROADCOM_3C905B "3C905B internal PHY" +#define MII_STR_BROADCOM_3C905B "3C905B internal" #define MII_MODEL_BROADCOM_3C905C 0x0017 -#define MII_STR_BROADCOM_3C905C "3C905C internal PHY" +#define MII_STR_BROADCOM_3C905C "3C905C internal" #define MII_MODEL_BROADCOM_BCM5221 0x001e -#define MII_STR_BROADCOM_BCM5221 "BCM5221 100baseTX PHY" +#define MII_STR_BROADCOM_BCM5221 "BCM5221" #define MII_MODEL_BROADCOM_BCM5201 0x0021 -#define MII_STR_BROADCOM_BCM5201 "BCM5201 10/100 PHY" +#define MII_STR_BROADCOM_BCM5201 "BCM5201" #define MII_MODEL_BROADCOM_BCM5214 0x0028 -#define MII_STR_BROADCOM_BCM5214 "BCM5214 Quad 10/100 PHY" +#define MII_STR_BROADCOM_BCM5214 "BCM5214 Quad" #define MII_MODEL_BROADCOM_BCM5222 0x0032 -#define MII_STR_BROADCOM_BCM5222 "BCM5222 Dual 10/100 PHY" +#define MII_STR_BROADCOM_BCM5222 "BCM5222 Dual" #define MII_MODEL_BROADCOM_BCM5220 0x0033 -#define MII_STR_BROADCOM_BCM5220 "BCM5220 10/100 PHY" +#define MII_STR_BROADCOM_BCM5220 "BCM5220" #define MII_MODEL_BROADCOM_BCM4401 0x0036 -#define MII_STR_BROADCOM_BCM4401 "BCM4401 10/100baseTX PHY" +#define MII_STR_BROADCOM_BCM4401 "BCM4401" #define MII_MODEL_BROADCOM2_BCM5906 0x0004 -#define MII_STR_BROADCOM2_BCM5906 "BCM5906 10/100baseTX PHY" +#define MII_STR_BROADCOM2_BCM5906 "BCM5906" -/* Cicada PHYs (now owned by Vitesse) */ +/* Cicada (now owned by Vitesse) */ #define MII_MODEL_xxCICADA_CS8201B 0x0021 -#define MII_STR_xxCICADA_CS8201B "CS8201 10/100/1000TX PHY" +#define MII_STR_xxCICADA_CS8201B "CS8201" #define MII_MODEL_CICADA_CS8201 0x0001 -#define MII_STR_CICADA_CS8201 "CS8201 10/100/1000TX PHY" +#define MII_STR_CICADA_CS8201 "CS8201" #define MII_MODEL_CICADA_CS8204 0x0004 -#define MII_STR_CICADA_CS8204 "CS8204 10/100/1000TX PHY" +#define MII_STR_CICADA_CS8204 "CS8204" #define MII_MODEL_CICADA_VSC8211 0x000b -#define MII_STR_CICADA_VSC8211 "VSC8211 10/100/1000 PHY" +#define MII_STR_CICADA_VSC8211 "VSC8211" #define MII_MODEL_CICADA_CS8201A 0x0020 -#define MII_STR_CICADA_CS8201A "CS8201 10/100/1000TX PHY" +#define MII_STR_CICADA_CS8201A "CS8201" #define MII_MODEL_CICADA_CS8201B 0x0021 -#define MII_STR_CICADA_CS8201B "CS8201 10/100/1000TX PHY" +#define MII_STR_CICADA_CS8201B "CS8201" #define MII_MODEL_CICADA_CS8244 0x002c -#define MII_STR_CICADA_CS8244 "CS8244 10/100/1000TX PHY" +#define MII_STR_CICADA_CS8244 "CS8244" -/* Davicom PHYs */ +/* Davicom */ #define MII_MODEL_xxDAVICOM_DM9101 0x0000 -#define MII_STR_xxDAVICOM_DM9101 "DM9101 10/100 PHY" +#define MII_STR_xxDAVICOM_DM9101 "DM9101" #define MII_MODEL_DAVICOM_DM9102 0x0004 -#define MII_STR_DAVICOM_DM9102 "DM9102 10/100 PHY" +#define MII_STR_DAVICOM_DM9102 "DM9102" #define MII_MODEL_DAVICOM_DM9601 0x000c -#define MII_STR_DAVICOM_DM9601 "DM9601 10/100 PHY" +#define MII_STR_DAVICOM_DM9601 "DM9601" /* Contrived vendor/model for dcphy */ #define MII_MODEL_xxDEC_xxDC 0x0001 #define MII_STR_xxDEC_xxDC "DC" -/* Enable Semi. PHYs (Agere) */ +/* Enable Semi. (Agere) */ #define MII_MODEL_ENABLESEMI_LU3X31FT 0x0001 #define MII_STR_ENABLESEMI_LU3X31FT "LU3X31FT" #define MII_MODEL_ENABLESEMI_LU3X31T2 0x0002 @@ -287,206 +287,206 @@ #define MII_MODEL_ENABLESEMI_88E1000 0x0005 #define MII_STR_ENABLESEMI_88E1000 "88E1000" -/* IC Plus PHYs */ +/* IC Plus */ #define MII_MODEL_ICPLUS_IP100 0x0004 -#define MII_STR_ICPLUS_IP100 "IP100 10/100 PHY" +#define MII_STR_ICPLUS_IP100 "IP100" #define MII_MODEL_ICPLUS_IP101 0x0005 -#define MII_STR_ICPLUS_IP101 "IP101 10/100 PHY" +#define MII_STR_ICPLUS_IP101 "IP101" #define MII_MODEL_ICPLUS_IP1000A 0x0008 -#define MII_STR_ICPLUS_IP1000A "IP1000A 10/100/1000 PHY" +#define MII_STR_ICPLUS_IP1000A "IP1000A" #define MII_MODEL_ICPLUS_IP1001 0x0019 -#define MII_STR_ICPLUS_IP1001 "IP1001 10/100/1000 PHY" +#define MII_STR_ICPLUS_IP1001 "IP1001" -/* Integrated Circuit Systems PHYs */ +/* Integrated Circuit Systems */ #define MII_MODEL_xxICS_1890 0x0002 -#define MII_STR_xxICS_1890 "ICS1890 10/100 PHY" +#define MII_STR_xxICS_1890 "ICS1890" #define MII_MODEL_xxICS_1892 0x0003 -#define MII_STR_xxICS_1892 "ICS1892 10/100 PHY" +#define MII_STR_xxICS_1892 "ICS1892" #define MII_MODEL_xxICS_1893 0x0004 -#define MII_STR_xxICS_1893 "ICS1893 10/100 PHY" +#define MII_STR_xxICS_1893 "ICS1893" -/* Intel PHYs */ +/* Intel */ #define MII_MODEL_xxINTEL_I82553 0x0000 -#define MII_STR_xxINTEL_I82553 "i82553 10/100 PHY" +#define MII_STR_xxINTEL_I82553 "i82553" #define MII_MODEL_INTEL_I82555 0x0015 -#define MII_STR_INTEL_I82555 "i82555 10/100 PHY" +#define MII_STR_INTEL_I82555 "i82555" #define MII_MODEL_INTEL_I82562G 0x0031 -#define MII_STR_INTEL_I82562G "i82562G 10/100 PHY" +#define MII_STR_INTEL_I82562G "i82562G" #define MII_MODEL_INTEL_I82562EM 0x0032 -#define MII_STR_INTEL_I82562EM "i82562EM 10/100 PHY" +#define MII_STR_INTEL_I82562EM "i82562EM" #define MII_MODEL_INTEL_I82562ET 0x0033 -#define MII_STR_INTEL_I82562ET "i82562ET 10/100 PHY" +#define MII_STR_INTEL_I82562ET "i82562ET" #define MII_MODEL_INTEL_I82553 0x0035 -#define MII_STR_INTEL_I82553 "i82553 10/100 PHY" +#define MII_STR_INTEL_I82553 "i82553" -/* Jato Technologies PHYs */ +/* Jato Technologies */ #define MII_MODEL_JATO_BASEX 0x0000 -#define MII_STR_JATO_BASEX "Jato 1000baseX PHY" +#define MII_STR_JATO_BASEX "Jato" -/* JMicron PHYs */ +/* JMicron */ #define MII_MODEL_JMICRON_JMP211 0x0021 -#define MII_STR_JMICRON_JMP211 "JMP211 10/100/1000 PHY" +#define MII_STR_JMICRON_JMP211 "JMP211" #define MII_MODEL_JMICRON_JMP202 0x0022 -#define MII_STR_JMICRON_JMP202 "JMP202 10/100 PHY" +#define MII_STR_JMICRON_JMP202 "JMP202" -/* Level 1 PHYs */ +/* Level 1 */ #define MII_MODEL_xxLEVEL1_LXT970 0x0000 -#define MII_STR_xxLEVEL1_LXT970 "LXT970 10/100 PHY" +#define MII_STR_xxLEVEL1_LXT970 "LXT970" #define MII_MODEL_xxLEVEL1a_LXT971 0x000e -#define MII_STR_xxLEVEL1a_LXT971 "LXT971 10/100 PHY" +#define MII_STR_xxLEVEL1a_LXT971 "LXT971" #define MII_MODEL_LEVEL1_LXT1000_OLD 0x0003 -#define MII_STR_LEVEL1_LXT1000_OLD "LXT1000 10/100/1000 PHY" +#define MII_STR_LEVEL1_LXT1000_OLD "LXT1000" #define MII_MODEL_LEVEL1_LXT1000 0x000c -#define MII_STR_LEVEL1_LXT1000 "LXT1000 10/100/1000 PHY" +#define MII_STR_LEVEL1_LXT1000 "LXT1000" -/* Lucent PHYs */ +/* Lucent */ #define MII_MODEL_LUCENT_LU6612 0x000c -#define MII_STR_LUCENT_LU6612 "LU6612 10/100 PHY" +#define MII_STR_LUCENT_LU6612 "LU6612" #define MII_MODEL_LUCENT_LU3X51FT 0x0033 -#define MII_STR_LUCENT_LU3X51FT "LU3X51FT 10/100 PHY" +#define MII_STR_LUCENT_LU3X51FT "LU3X51FT" #define MII_MODEL_LUCENT_LU3X54FT 0x0036 -#define MII_STR_LUCENT_LU3X54FT "LU3X54FT 10/100 PHY" +#define MII_STR_LUCENT_LU3X54FT "LU3X54FT" -/* Marvell PHYs */ +/* Marvell */ #define MII_MODEL_xxMARVELL_E1000_5 0x0002 -#define MII_STR_xxMARVELL_E1000_5 "88E1000 5 Gigabit PHY" +#define MII_STR_xxMARVELL_E1000_5 "88E1000 5" #define MII_MODEL_xxMARVELL_E1000_6 0x0003 -#define MII_STR_xxMARVELL_E1000_6 "88E1000 6 Gigabit PHY" +#define MII_STR_xxMARVELL_E1000_6 "88E1000 6" #define MII_MODEL_xxMARVELL_E1000_7 0x0005 -#define MII_STR_xxMARVELL_E1000_7 "88E1000 7 Gigabit PHY" +#define MII_STR_xxMARVELL_E1000_7 "88E1000 7" #define MII_MODEL_xxMARVELL_E1111 0x000c -#define MII_STR_xxMARVELL_E1111 "88E1111 Gigabit PHY" +#define MII_STR_xxMARVELL_E1111 "88E1111" #define MII_MODEL_MARVELL_E1000_1 0x0000 -#define MII_STR_MARVELL_E1000_1 "88E1000 1 Gigabit PHY" +#define MII_STR_MARVELL_E1000_1 "88E1000 1" #define MII_MODEL_MARVELL_E1011 0x0002 -#define MII_STR_MARVELL_E1011 "88E1011 Gigabit PHY" +#define MII_STR_MARVELL_E1011 "88E1011" #define MII_MODEL_MARVELL_E1000_2 0x0003 -#define MII_STR_MARVELL_E1000_2 "88E1000 2 Gigabit PHY" +#define MII_STR_MARVELL_E1000_2 "88E1000 2" #define MII_MODEL_MARVELL_E1000S 0x0004 -#define MII_STR_MARVELL_E1000S "88E1000S Gigabit PHY" +#define MII_STR_MARVELL_E1000S "88E1000S" #define MII_MODEL_MARVELL_E1000_3 0x0005 -#define MII_STR_MARVELL_E1000_3 "88E1000 3 Gigabit PHY" +#define MII_STR_MARVELL_E1000_3 "88E1000 3" #define MII_MODEL_MARVELL_E1000_4 0x0006 -#define MII_STR_MARVELL_E1000_4 "88E1000 4 Gigabit PHY" +#define MII_STR_MARVELL_E1000_4 "88E1000 4" #define MII_MODEL_MARVELL_E3082 0x0008 -#define MII_STR_MARVELL_E3082 "88E3082 10/100 PHY" +#define MII_STR_MARVELL_E3082 "88E3082" #define MII_MODEL_MARVELL_E1112 0x0009 -#define MII_STR_MARVELL_E1112 "88E1112 Gigabit PHY" +#define MII_STR_MARVELL_E1112 "88E1112" #define MII_MODEL_MARVELL_E1149 0x000b -#define MII_STR_MARVELL_E1149 "88E1149 Gigabit PHY" +#define MII_STR_MARVELL_E1149 "88E1149" #define MII_MODEL_MARVELL_E1111 0x000c -#define MII_STR_MARVELL_E1111 "88E1111 Gigabit PHY" +#define MII_STR_MARVELL_E1111 "88E1111" #define MII_MODEL_MARVELL_E1512 0x001d -#define MII_STR_MARVELL_E1512 "88E1512 10/100/1000 PHY" +#define MII_STR_MARVELL_E1512 "88E1512" #define MII_MODEL_MARVELL_E1116 0x0021 -#define MII_STR_MARVELL_E1116 "88E1116 Gigabit PHY" +#define MII_STR_MARVELL_E1116 "88E1116" #define MII_MODEL_MARVELL_E1118 0x0022 -#define MII_STR_MARVELL_E1118 "88E1118 Gigabit PHY" +#define MII_STR_MARVELL_E1118 "88E1118" #define MII_MODEL_MARVELL_E1116R 0x0024 -#define MII_STR_MARVELL_E1116R "88E1116R Gigabit PHY" +#define MII_STR_MARVELL_E1116R "88E1116R" #define MII_MODEL_MARVELL_E3016 0x0026 -#define MII_STR_MARVELL_E3016 "88E3016 10/100 PHY" +#define MII_STR_MARVELL_E3016 "88E3016" #define MII_MODEL_MARVELL_PHYG65G 0x0027 -#define MII_STR_MARVELL_PHYG65G "PHYG65G Gigabit PHY" +#define MII_STR_MARVELL_PHYG65G "PHYG65G" #define MII_MODEL_MARVELL_E1545 0x002a -#define MII_STR_MARVELL_E1545 "88E1545 Quad 10/100/1000 PHY" +#define MII_STR_MARVELL_E1545 "88E1545 Quad" -/* Micrel PHYs */ +/* Micrel */ #define MII_MODEL_MICREL_KSZ9021 0x0021 -#define MII_STR_MICREL_KSZ9021 "KSZ9021 10/100/1000 PHY" +#define MII_STR_MICREL_KSZ9021 "KSZ9021" #define MII_MODEL_MICREL_KSZ9031 0x0022 -#define MII_STR_MICREL_KSZ9031 "KSZ9031 10/100/1000 PHY" +#define MII_STR_MICREL_KSZ9031 "KSZ9031" -/* Motorcomm PHYs */ +/* Motorcomm */ #define MII_MODEL_MOTORCOMM_YT8531 0x0011 -#define MII_STR_MOTORCOMM_YT8531 "YT8531 10/100/1000 PHY" +#define MII_STR_MOTORCOMM_YT8531 "YT8531" -/* Myson PHYs */ +/* Myson */ #define MII_MODEL_MYSON_MTD972 0x0000 -#define MII_STR_MYSON_MTD972 "MTD972 10/100 PHY" +#define MII_STR_MYSON_MTD972 "MTD972" -/* National Semi. PHYs */ +/* National Semi. */ #define MII_MODEL_NATSEMI_DP83840 0x0000 -#define MII_STR_NATSEMI_DP83840 "DP83840 10/100 PHY" +#define MII_STR_NATSEMI_DP83840 "DP83840" #define MII_MODEL_NATSEMI_DP83843 0x0001 -#define MII_STR_NATSEMI_DP83843 "DP83843 10/100 PHY" +#define MII_STR_NATSEMI_DP83843 "DP83843" #define MII_MODEL_NATSEMI_DP83815 0x0002 -#define MII_STR_NATSEMI_DP83815 "DP83815 10/100 PHY" +#define MII_STR_NATSEMI_DP83815 "DP83815" #define MII_MODEL_NATSEMI_DP83847 0x0003 -#define MII_STR_NATSEMI_DP83847 "DP83847 10/100 PHY" +#define MII_STR_NATSEMI_DP83847 "DP83847" #define MII_MODEL_NATSEMI_DP83891 0x0005 -#define MII_STR_NATSEMI_DP83891 "DP83891 10/100/1000 PHY" +#define MII_STR_NATSEMI_DP83891 "DP83891" #define MII_MODEL_NATSEMI_DP83861 0x0006 -#define MII_STR_NATSEMI_DP83861 "DP83861 10/100/1000 PHY" +#define MII_STR_NATSEMI_DP83861 "DP83861" #define MII_MODEL_NATSEMI_DP83865 0x0007 -#define MII_STR_NATSEMI_DP83865 "DP83865 10/100/1000 PHY" +#define MII_STR_NATSEMI_DP83865 "DP83865" -/* Plessey Semi. PHYs */ +/* Plessey Semi. */ #define MII_MODEL_PLESSEY_NWK914 0x0000 -#define MII_STR_PLESSEY_NWK914 "NWK914 10/100 PHY" +#define MII_STR_PLESSEY_NWK914 "NWK914" -/* Quality Semi. PHYs */ +/* Quality Semi. */ #define MII_MODEL_QUALITYSEMI_QS6612 0x0000 -#define MII_STR_QUALITYSEMI_QS6612 "QS6612 10/100 PHY" +#define MII_STR_QUALITYSEMI_QS6612 "QS6612" -/* RDC Semi. PHYs */ +/* RDC Semi. */ #define MII_MODEL_RDC_R6040 0x0003 -#define MII_STR_RDC_R6040 "R6040 10/100 PHY" +#define MII_STR_RDC_R6040 "R6040" #define MII_MODEL_RDC_R6040_2 0x0005 -#define MII_STR_RDC_R6040_2 "R6040 10/100 PHY" +#define MII_STR_RDC_R6040_2 "R6040" -/* Realtek PHYs */ +/* Realtek */ #define MII_MODEL_xxREALTEK_RTL8251 0x0000 -#define MII_STR_xxREALTEK_RTL8251 "RTL8251 PHY" +#define MII_STR_xxREALTEK_RTL8251 "RTL8251" #define MII_MODEL_xxREALTEK_RTL8211FVD 0x0007 -#define MII_STR_xxREALTEK_RTL8211FVD "RTL8211F-VD PHY" +#define MII_STR_xxREALTEK_RTL8211FVD "RTL8211F-VD" #define MII_MODEL_xxREALTEK_RTL8201E 0x0008 -#define MII_STR_xxREALTEK_RTL8201E "RTL8201E 10/100 PHY" +#define MII_STR_xxREALTEK_RTL8201E "RTL8201E" #define MII_MODEL_xxREALTEK_RTL8169S 0x0011 -#define MII_STR_xxREALTEK_RTL8169S "RTL8169S/8110S/8211 PHY" +#define MII_STR_xxREALTEK_RTL8169S "RTL8169S/8110S/8211" #define MII_MODEL_REALTEK_RTL8201L 0x0020 -#define MII_STR_REALTEK_RTL8201L "RTL8201L 10/100 PHY" +#define MII_STR_REALTEK_RTL8201L "RTL8201L" -/* Seeq PHYs */ +/* Seeq */ #define MII_MODEL_xxSEEQ_80220 0x0003 -#define MII_STR_xxSEEQ_80220 "80220 10/100 PHY" +#define MII_STR_xxSEEQ_80220 "80220" #define MII_MODEL_xxSEEQ_84220 0x0004 -#define MII_STR_xxSEEQ_84220 "84220 10/100 PHY" +#define MII_STR_xxSEEQ_84220 "84220" #define MII_MODEL_xxSEEQ_80225 0x0008 -#define MII_STR_xxSEEQ_80225 "80225 10/100 PHY" +#define MII_STR_xxSEEQ_80225 "80225" -/* Silicon Integrated Systems PHYs */ +/* Silicon Integrated Systems */ #define MII_MODEL_xxSIS_900 0x0000 -#define MII_STR_xxSIS_900 "900 10/100 PHY" +#define MII_STR_xxSIS_900 "900" -/* Standard Microsystems PHYs */ +/* Standard Microsystems */ #define MII_MODEL_SMSC_LAN83C185 0x000a -#define MII_STR_SMSC_LAN83C185 "LAN83C185 10/100 PHY" +#define MII_STR_SMSC_LAN83C185 "LAN83C185" -/* Texas Instruments PHYs */ +/* Texas Instruments */ #define MII_MODEL_xxTI_TLAN10T 0x0001 -#define MII_STR_xxTI_TLAN10T "ThunderLAN 10baseT PHY" +#define MII_STR_xxTI_TLAN10T "ThunderLAN" #define MII_MODEL_xxTI_100VGPMI 0x0002 -#define MII_STR_xxTI_100VGPMI "ThunderLAN 100VG-AnyLan PHY" +#define MII_STR_xxTI_100VGPMI "ThunderLAN" #define MII_MODEL_xxTI_TNETE2101 0x0003 -#define MII_STR_xxTI_TNETE2101 "TNETE2101 PHY" +#define MII_STR_xxTI_TNETE2101 "TNETE2101" -/* TDK PHYs */ +/* TDK */ #define MII_MODEL_TDK_78Q2120 0x0014 -#define MII_STR_TDK_78Q2120 "78Q2120 10/100 PHY" +#define MII_STR_TDK_78Q2120 "78Q2120" #define MII_MODEL_TDK_78Q2121 0x0015 -#define MII_STR_TDK_78Q2121 "78Q2121 100baseTX PHY" +#define MII_STR_TDK_78Q2121 "78Q2121" -/* VIA Networking PHYs */ +/* VIA Networking */ #define MII_MODEL_VIA_VT6103 0x0032 -#define MII_STR_VIA_VT6103 "VT6103 10/100 PHY" +#define MII_STR_VIA_VT6103 "VT6103" #define MII_MODEL_VIA_VT6103_2 0x0034 -#define MII_STR_VIA_VT6103_2 "VT6103 10/100 PHY" +#define MII_STR_VIA_VT6103_2 "VT6103" -/* Vitesse PHYs */ +/* Vitesse */ #define MII_MODEL_VITESSE_VSC8601 0x0002 -#define MII_STR_VITESSE_VSC8601 "VSC8601 10/100/1000 PHY" +#define MII_STR_VITESSE_VSC8601 "VSC8601" -/* XaQti PHYs */ +/* XaQti */ #define MII_MODEL_XAQTI_XMACII 0x0000 -#define MII_STR_XAQTI_XMACII "XMAC II Gigabit PHY" +#define MII_STR_XAQTI_XMACII "XMAC II" diff --git a/sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c b/sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c index d06192829..b9c3e83fd 100644 --- a/sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c +++ b/sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c @@ -4290,9 +4290,10 @@ static u32 gfx_v9_4_3_get_cu_active_bitmap(struct amdgpu_device *adev, int xcc_i static int gfx_v9_4_3_get_cu_info(struct amdgpu_device *adev, struct amdgpu_cu_info *cu_info) { - int i, j, k, counter, xcc_id, active_cu_number = 0; - u32 mask, bitmap, ao_bitmap, ao_cu_mask = 0; + int i, j, k, prev_counter, counter, xcc_id, active_cu_number = 0; + u32 mask, bitmap, ao_bitmap, ao_cu_mask = 0, tmp; unsigned disable_masks[4 * 4]; + bool is_symmetric_cus; if (!adev || !cu_info) return -EINVAL; @@ -4310,6 +4311,7 @@ static int gfx_v9_4_3_get_cu_info(struct amdgpu_device *adev, mutex_lock(&adev->grbm_idx_mutex); for (xcc_id = 0; xcc_id < NUM_XCC(adev->gfx.xcc_mask); xcc_id++) { + is_symmetric_cus = true; for (i = 0; i < adev->gfx.config.max_shader_engines; i++) { for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { mask = 1; @@ -4337,6 +4339,15 @@ static int gfx_v9_4_3_get_cu_info(struct amdgpu_device *adev, ao_cu_mask |= (ao_bitmap << (i * 16 + j * 8)); cu_info->ao_cu_bitmap[i][j] = ao_bitmap; } + if (i && is_symmetric_cus && prev_counter != counter) + is_symmetric_cus = false; + prev_counter = counter; + } + if (is_symmetric_cus) { + tmp = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_CPC_DEBUG); + tmp = REG_SET_FIELD(tmp, CP_CPC_DEBUG, CPC_HARVESTING_RELAUNCH_DISABLE, 1); + tmp = REG_SET_FIELD(tmp, CP_CPC_DEBUG, CPC_HARVESTING_DISPATCH_DISABLE, 1); + WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_CPC_DEBUG, tmp); } gfx_v9_4_3_xcc_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff, xcc_id); diff --git a/sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c index 4aeaaa58f..cf5afb43c 100644 --- a/sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c +++ b/sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c @@ -10637,6 +10637,49 @@ static bool parse_edid_cea(struct amdgpu_dm_connector *aconnector, return ret; } +static void parse_edid_displayid_vrr(struct drm_connector *connector, + struct edid *edid) +{ + u8 *edid_ext = NULL; + int i; + int j = 0; + u16 min_vfreq; + u16 max_vfreq; + + if (edid == NULL || edid->extensions == 0) + return; + + /* Find DisplayID extension */ + for (i = 0; i < edid->extensions; i++) { + edid_ext = (void *)(edid + (i + 1)); + if (edid_ext[0] == DISPLAYID_EXT) + break; + } + + if (edid_ext == NULL) + return; + + while (j < EDID_LENGTH) { + /* Get dynamic video timing range from DisplayID if available */ + if (EDID_LENGTH - j > 13 && edid_ext[j] == 0x25 && + (edid_ext[j+1] & 0xFE) == 0 && (edid_ext[j+2] == 9)) { + min_vfreq = edid_ext[j+9]; + if (edid_ext[j+1] & 7) + max_vfreq = edid_ext[j+10] + ((edid_ext[j+11] & 3) << 8); + else + max_vfreq = edid_ext[j+10]; + + if (max_vfreq && min_vfreq) { + connector->display_info.monitor_range.max_vfreq = max_vfreq; + connector->display_info.monitor_range.min_vfreq = min_vfreq; + + return; + } + } + j++; + } +} + static int parse_amd_vsdb(struct amdgpu_dm_connector *aconnector, struct edid *edid, struct amdgpu_hdmi_vsdb_info *vsdb_info) { @@ -10759,6 +10802,11 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector, if (!adev->dm.freesync_module) goto update; + /* Some eDP panels only have the refresh rate range info in DisplayID */ + if ((connector->display_info.monitor_range.min_vfreq == 0 || + connector->display_info.monitor_range.max_vfreq == 0)) + parse_edid_displayid_vrr(connector, edid); + if (edid && (sink->sink_signal == SIGNAL_TYPE_DISPLAY_PORT || sink->sink_signal == SIGNAL_TYPE_EDP)) { bool edid_check_required = false; @@ -10766,9 +10814,11 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector, if (is_dp_capable_without_timing_msa(adev->dm.dc, amdgpu_dm_connector)) { if (edid->features & DRM_EDID_FEATURE_CONTINUOUS_FREQ) { - freesync_capable = true; amdgpu_dm_connector->min_vfreq = connector->display_info.monitor_range.min_vfreq; amdgpu_dm_connector->max_vfreq = connector->display_info.monitor_range.max_vfreq; + if (amdgpu_dm_connector->max_vfreq - + amdgpu_dm_connector->min_vfreq > 10) + freesync_capable = true; } else { edid_check_required = edid->version > 1 || (edid->version == 1 && diff --git a/sys/dev/pci/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c b/sys/dev/pci/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c index 6c84b0fa4..0782a3468 100644 --- a/sys/dev/pci/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c +++ b/sys/dev/pci/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c @@ -3364,6 +3364,9 @@ void dml32_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l &mode_lib->vba.UrgentBurstFactorLumaPre[k], &mode_lib->vba.UrgentBurstFactorChromaPre[k], &mode_lib->vba.NotUrgentLatencyHidingPre[k]); + + v->cursor_bw_pre[k] = mode_lib->vba.NumberOfCursors[k] * mode_lib->vba.CursorWidth[k][0] * mode_lib->vba.CursorBPP[k][0] / + 8.0 / (mode_lib->vba.HTotal[k] / mode_lib->vba.PixelClock[k]) * v->VRatioPreY[i][j][k]; } { diff --git a/sys/dev/pci/drm/drm_panel_orientation_quirks.c b/sys/dev/pci/drm/drm_panel_orientation_quirks.c index 2edda9929..85c6a1a44 100644 --- a/sys/dev/pci/drm/drm_panel_orientation_quirks.c +++ b/sys/dev/pci/drm/drm_panel_orientation_quirks.c @@ -202,6 +202,12 @@ static const struct dmi_system_id orientation_data[] = { DMI_MATCH(DMI_BOARD_NAME, "NEXT"), }, .driver_data = (void *)&lcd800x1280_rightside_up, + }, { /* AYA NEO KUN */ + .matches = { + DMI_EXACT_MATCH(DMI_BOARD_VENDOR, "AYANEO"), + DMI_MATCH(DMI_BOARD_NAME, "KUN"), + }, + .driver_data = (void *)&lcd1600x2560_rightside_up, }, { /* Chuwi HiBook (CWI514) */ .matches = { DMI_MATCH(DMI_BOARD_VENDOR, "Hampoo"), diff --git a/sys/dev/pci/drm/radeon/radeon_gem.c b/sys/dev/pci/drm/radeon/radeon_gem.c index 18c35adb9..b9db67ce8 100644 --- a/sys/dev/pci/drm/radeon/radeon_gem.c +++ b/sys/dev/pci/drm/radeon/radeon_gem.c @@ -734,7 +734,7 @@ static void radeon_gem_va_update_vm(struct radeon_device *rdev, if (r) goto error_unlock; - if (bo_va->it.start) + if (bo_va->it.start && bo_va->bo) r = radeon_vm_bo_update(rdev, bo_va, bo_va->bo->tbo.resource); error_unlock: diff --git a/sys/dev/pv/if_vio.c b/sys/dev/pv/if_vio.c index 5ff0ccac6..eee59d812 100644 --- a/sys/dev/pv/if_vio.c +++ b/sys/dev/pv/if_vio.c @@ -1,4 +1,4 @@ -/* $OpenBSD: if_vio.c,v 1.42 2024/06/28 14:46:31 jan Exp $ */ +/* $OpenBSD: if_vio.c,v 1.44 2024/07/26 07:55:23 sf Exp $ */ /* * Copyright (c) 2012 Stefan Fritsch, Alexander Fiveg. @@ -90,7 +90,13 @@ #define VIRTIO_NET_F_GUEST_ANNOUNCE (1ULL<<21) #define VIRTIO_NET_F_MQ (1ULL<<22) #define VIRTIO_NET_F_CTRL_MAC_ADDR (1ULL<<23) - +#define VIRTIO_NET_F_HOST_USO (1ULL<<56) +#define VIRTIO_NET_F_HASH_REPORT (1ULL<<57) +#define VIRTIO_NET_F_GUEST_HDRLEN (1ULL<<59) +#define VIRTIO_NET_F_RSS (1ULL<<60) +#define VIRTIO_NET_F_RSC_EXT (1ULL<<61) +#define VIRTIO_NET_F_STANDBY (1ULL<<62) +#define VIRTIO_NET_F_SPEED_DUPLEX (1ULL<<63) /* * Config(8) flags. The lowest byte is reserved for generic virtio stuff. */ @@ -123,6 +129,13 @@ static const struct virtio_feature_name virtio_net_feature_names[] = { { VIRTIO_NET_F_GUEST_ANNOUNCE, "GuestAnnounce" }, { VIRTIO_NET_F_MQ, "MQ" }, { VIRTIO_NET_F_CTRL_MAC_ADDR, "CtrlMAC" }, + { VIRTIO_NET_F_HOST_USO, "HostUso" }, + { VIRTIO_NET_F_HASH_REPORT, "HashRpt" }, + { VIRTIO_NET_F_GUEST_HDRLEN, "GuestHdrlen" }, + { VIRTIO_NET_F_RSS, "RSS" }, + { VIRTIO_NET_F_RSC_EXT, "RSSExt" }, + { VIRTIO_NET_F_STANDBY, "Stdby" }, + { VIRTIO_NET_F_SPEED_DUPLEX, "SpdDplx" }, #endif { 0, NULL } }; @@ -731,7 +744,8 @@ vio_init(struct ifnet *ifp) if (virtio_has_feature(vsc, VIRTIO_NET_F_CTRL_GUEST_OFFLOADS)) { uint64_t features = 0; - SET(features, VIRTIO_NET_F_GUEST_CSUM); + if (virtio_has_feature(vsc, VIRTIO_NET_F_GUEST_CSUM)) + SET(features, VIRTIO_NET_F_GUEST_CSUM); if (ISSET(ifp->if_xflags, IFXF_LRO)) { if (virtio_has_feature(vsc, VIRTIO_NET_F_GUEST_TSO4)) diff --git a/sys/dev/pv/vioblk.c b/sys/dev/pv/vioblk.c index 6b5f56cd7..3be22b930 100644 --- a/sys/dev/pv/vioblk.c +++ b/sys/dev/pv/vioblk.c @@ -1,4 +1,4 @@ -/* $OpenBSD: vioblk.c,v 1.39 2024/06/26 01:40:49 jsg Exp $ */ +/* $OpenBSD: vioblk.c,v 1.40 2024/07/26 07:55:23 sf Exp $ */ /* * Copyright (c) 2012 Stefan Fritsch. @@ -79,8 +79,11 @@ struct virtio_feature_name vioblk_feature_names[] = { { VIRTIO_BLK_F_FLUSH, "Flush" }, { VIRTIO_BLK_F_TOPOLOGY, "Topology" }, { VIRTIO_BLK_F_CONFIG_WCE, "ConfigWCE" }, + { VIRTIO_BLK_F_MQ, "MQ" }, { VIRTIO_BLK_F_DISCARD, "Discard" }, { VIRTIO_BLK_F_WRITE_ZEROES, "Write0s" }, + { VIRTIO_BLK_F_LIFETIME, "Lifetime" }, + { VIRTIO_BLK_F_SECURE_ERASE, "SecErase" }, #endif { 0, NULL } }; diff --git a/sys/dev/pv/vioblkreg.h b/sys/dev/pv/vioblkreg.h index f444261a5..7c3140a1d 100644 --- a/sys/dev/pv/vioblkreg.h +++ b/sys/dev/pv/vioblkreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: vioblkreg.h,v 1.4 2019/03/24 18:22:36 sf Exp $ */ +/* $OpenBSD: vioblkreg.h,v 1.5 2024/07/26 07:55:23 sf Exp $ */ /* * Copyright (c) 2012 Stefan Fritsch. @@ -50,8 +50,11 @@ #define VIRTIO_BLK_F_FLUSH (1ULL<<9) #define VIRTIO_BLK_F_TOPOLOGY (1ULL<<10) #define VIRTIO_BLK_F_CONFIG_WCE (1ULL<<11) -#define VIRTIO_BLK_F_DISCARD (1ULL<<12) -#define VIRTIO_BLK_F_WRITE_ZEROES (1ULL<<13) +#define VIRTIO_BLK_F_MQ (1ULL<<12) +#define VIRTIO_BLK_F_DISCARD (1ULL<<13) +#define VIRTIO_BLK_F_WRITE_ZEROES (1ULL<<14) +#define VIRTIO_BLK_F_LIFETIME (1ULL<<15) +#define VIRTIO_BLK_F_SECURE_ERASE (1ULL<<16) /* Command */ #define VIRTIO_BLK_T_IN 0 diff --git a/sys/dev/pv/virtio.c b/sys/dev/pv/virtio.c index 40cd6a989..7386d0ca1 100644 --- a/sys/dev/pv/virtio.c +++ b/sys/dev/pv/virtio.c @@ -1,4 +1,4 @@ -/* $OpenBSD: virtio.c,v 1.27 2024/07/25 08:35:40 sf Exp $ */ +/* $OpenBSD: virtio.c,v 1.28 2024/07/26 07:55:23 sf Exp $ */ /* $NetBSD: virtio.c,v 1.3 2011/11/02 23:05:52 njoly Exp $ */ /* @@ -81,10 +81,19 @@ virtio_device_string(int id) #if VIRTIO_DEBUG static const struct virtio_feature_name transport_feature_names[] = { { VIRTIO_F_NOTIFY_ON_EMPTY, "NotifyOnEmpty"}, + { VIRTIO_F_ANY_LAYOUT, "AnyLayout"}, { VIRTIO_F_RING_INDIRECT_DESC, "RingIndirectDesc"}, { VIRTIO_F_RING_EVENT_IDX, "RingEventIdx"}, { VIRTIO_F_BAD_FEATURE, "BadFeature"}, { VIRTIO_F_VERSION_1, "Version1"}, + { VIRTIO_F_ACCESS_PLATFORM, "AccessPlatf"}, + { VIRTIO_F_RING_PACKED, "RingPacked"}, + { VIRTIO_F_IN_ORDER, "InOrder"}, + { VIRTIO_F_ORDER_PLATFORM, "OrderPlatf"}, + { VIRTIO_F_SR_IOV, "SrIov"}, + { VIRTIO_F_NOTIFICATION_DATA, "NotifData"}, + { VIRTIO_F_NOTIF_CONFIG_DATA, "NotifConfData"}, + { VIRTIO_F_RING_RESET, "RingReset"}, { 0, NULL} }; diff --git a/sys/dev/pv/virtioreg.h b/sys/dev/pv/virtioreg.h index 1ac17a9bd..876033b0e 100644 --- a/sys/dev/pv/virtioreg.h +++ b/sys/dev/pv/virtioreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: virtioreg.h,v 1.5 2023/04/20 19:28:31 jcs Exp $ */ +/* $OpenBSD: virtioreg.h,v 1.6 2024/07/26 07:55:23 sf Exp $ */ /* $NetBSD: virtioreg.h,v 1.1 2011/10/30 12:12:21 hannken Exp $ */ /* @@ -85,10 +85,19 @@ /* device-independent feature bits */ #define VIRTIO_F_NOTIFY_ON_EMPTY (1ULL<<24) +#define VIRTIO_F_ANY_LAYOUT (1ULL<<27) #define VIRTIO_F_RING_INDIRECT_DESC (1ULL<<28) #define VIRTIO_F_RING_EVENT_IDX (1ULL<<29) #define VIRTIO_F_BAD_FEATURE (1ULL<<30) #define VIRTIO_F_VERSION_1 (1ULL<<32) +#define VIRTIO_F_ACCESS_PLATFORM (1ULL<<33) +#define VIRTIO_F_RING_PACKED (1ULL<<34) +#define VIRTIO_F_IN_ORDER (1ULL<<35) +#define VIRTIO_F_ORDER_PLATFORM (1ULL<<36) +#define VIRTIO_F_SR_IOV (1ULL<<37) +#define VIRTIO_F_NOTIFICATION_DATA (1ULL<<38) +#define VIRTIO_F_NOTIF_CONFIG_DATA (1ULL<<39) +#define VIRTIO_F_RING_RESET (1ULL<<40) /* device status bits */ #define VIRTIO_CONFIG_DEVICE_STATUS_RESET 0 diff --git a/sys/dev/usb/ugold.c b/sys/dev/usb/ugold.c index 93068b621..e5388d613 100644 --- a/sys/dev/usb/ugold.c +++ b/sys/dev/usb/ugold.c @@ -1,4 +1,4 @@ -/* $OpenBSD: ugold.c,v 1.28 2024/05/23 03:21:09 jsg Exp $ */ +/* $OpenBSD: ugold.c,v 1.29 2024/07/27 17:31:49 miod Exp $ */ /* * Copyright (c) 2013 Takayoshi SASANO @@ -453,7 +453,8 @@ ugold_si700x_type(struct ugold_softc *sc) if (sc->sc_model_len >= 9 && memcmp(sc->sc_model, "TEMPerHUM", 9) == 0) { if (memcmp(sc->sc_model + 9, "_V3.9 ", 16 - 9) == 0 || - memcmp(sc->sc_model + 9, "_V4.0 ", 16 - 9) == 0) { + memcmp(sc->sc_model + 9, "_V4.0 ", 16 - 9) == 0 || + memcmp(sc->sc_model + 9, "_V4.1\0\0", 16 - 9) == 0) { sc->sc_type = UGOLD_TYPE_TEMPERX; descr = "temperx (temperature and humidity)"; goto identified; @@ -484,7 +485,7 @@ ugold_si700x_type(struct ugold_softc *sc) sc->sc_type = UGOLD_TYPE_GOLD; /* * TEMPer1F devices lack the internal sensor, but will never - * report data for it, so it will never gets marked as valid. + * report data for it, so it will never get marked as valid. * We thus keep the value of sc_num_sensors unchanged at 2, * and make sure we will only report one single sensor below. */ diff --git a/sys/kern/kern_time.c b/sys/kern/kern_time.c index 690f4859c..7e60319f9 100644 --- a/sys/kern/kern_time.c +++ b/sys/kern/kern_time.c @@ -1,4 +1,4 @@ -/* $OpenBSD: kern_time.c,v 1.168 2024/07/08 13:17:12 claudio Exp $ */ +/* $OpenBSD: kern_time.c,v 1.169 2024/07/26 19:16:31 guenther Exp $ */ /* $NetBSD: kern_time.c,v 1.20 1996/02/18 11:57:06 fvdl Exp $ */ /* @@ -602,7 +602,7 @@ sys_getitimer(struct proc *p, void *v, register_t *retval) syscallarg(struct itimerval *) itv; } */ *uap = v; struct itimerval aitv; - int which; + int which, error; which = SCARG(uap, which); if (which < ITIMER_REAL || which > ITIMER_PROF) @@ -612,7 +612,12 @@ sys_getitimer(struct proc *p, void *v, register_t *retval) setitimer(which, NULL, &aitv); - return copyout(&aitv, SCARG(uap, itv), sizeof(aitv)); + error = copyout(&aitv, SCARG(uap, itv), sizeof(aitv)); +#ifdef KTRACE + if (error == 0 && KTRPOINT(p, KTR_STRUCT)) + ktritimerval(p, &aitv); +#endif + return (error); } int @@ -636,6 +641,10 @@ sys_setitimer(struct proc *p, void *v, register_t *retval) error = copyin(SCARG(uap, itv), &aitv, sizeof(aitv)); if (error) return error; +#ifdef KTRACE + if (KTRPOINT(p, KTR_STRUCT)) + ktritimerval(p, &aitv); +#endif error = itimerfix(&aitv); if (error) return error; @@ -650,8 +659,14 @@ sys_setitimer(struct proc *p, void *v, register_t *retval) setitimer(which, newitvp, olditvp); - if (SCARG(uap, oitv) != NULL) - return copyout(&olditv, SCARG(uap, oitv), sizeof(olditv)); + if (SCARG(uap, oitv) != NULL) { + error = copyout(&olditv, SCARG(uap, oitv), sizeof(olditv)); +#ifdef KTRACE + if (error == 0 && KTRPOINT(p, KTR_STRUCT)) + ktritimerval(p, &aitv); +#endif + return error; + } return 0; } diff --git a/sys/net/pipex.c b/sys/net/pipex.c index 4aefbdfac..9878fdc3b 100644 --- a/sys/net/pipex.c +++ b/sys/net/pipex.c @@ -1,4 +1,4 @@ -/* $OpenBSD: pipex.c,v 1.154 2024/06/07 13:43:21 jsg Exp $ */ +/* $OpenBSD: pipex.c,v 1.155 2024/07/26 15:45:31 yasuoka Exp $ */ /*- * Copyright (c) 2009 Internet Initiative Japan Inc. @@ -2031,7 +2031,13 @@ pipex_l2tp_input(struct mbuf *m0, int off0, struct pipex_session *session, mtx_enter(&session->pxs_mtx); l2tp_session = &session->proto.l2tp; - l2tp_session->ipsecflowinfo = ipsecflowinfo; + if (l2tp_session->ipsecflowinfo != ipsecflowinfo) { + pipex_session_log(session, LOG_DEBUG, + "received message is %s", + (ipsecflowinfo != 0)? "from invalid ipsec flow" : + "without ipsec"); + goto drop; + } m_copydata(m0, off0, sizeof(flags), &flags); diff --git a/sys/net/pipex_local.h b/sys/net/pipex_local.h index 679ddb98e..980bea9d8 100644 --- a/sys/net/pipex_local.h +++ b/sys/net/pipex_local.h @@ -1,4 +1,4 @@ -/* $OpenBSD: pipex_local.h,v 1.52 2024/05/29 00:48:15 jsg Exp $ */ +/* $OpenBSD: pipex_local.h,v 1.53 2024/07/26 15:51:09 yasuoka Exp $ */ /* * Copyright (c) 2009 Internet Initiative Japan Inc. @@ -140,6 +140,7 @@ struct pipex_l2tp_session { uint16_t peer_tunnel_id; /* [I] peer's tunnel-id */ uint32_t option_flags; /* [I] protocol options */ + uint32_t ipsecflowinfo; /* [I] IPsec SA flow id for NAT-T */ int16_t ns_gap; /* [s] gap between userland and pipex */ int16_t nr_gap; /* [s] gap between userland and pipex */ @@ -150,7 +151,6 @@ struct pipex_l2tp_session { uint16_t nr_nxt; /* [s] next sequence number to recv */ uint16_t nr_acked; /* [s] acked sequence number to recv */ - uint32_t ipsecflowinfo; /* [s] IPsec SA flow id for NAT-T */ }; #endif /* PIPEX_L2TP */ diff --git a/sys/netinet/in_proto.c b/sys/netinet/in_proto.c index 5f9a1fbd3..579522f60 100644 --- a/sys/netinet/in_proto.c +++ b/sys/netinet/in_proto.c @@ -1,4 +1,4 @@ -/* $OpenBSD: in_proto.c,v 1.106 2024/07/13 12:00:11 bluhm Exp $ */ +/* $OpenBSD: in_proto.c,v 1.107 2024/07/26 14:38:20 bluhm Exp $ */ /* $NetBSD: in_proto.c,v 1.14 1996/02/18 18:58:32 christos Exp $ */ /* @@ -185,7 +185,7 @@ const struct protosw inetsw[] = { .pr_type = SOCK_DGRAM, .pr_domain = &inetdomain, .pr_protocol = IPPROTO_UDP, - .pr_flags = PR_ATOMIC|PR_ADDR|PR_SPLICE|PR_MPSOCKET, + .pr_flags = PR_ATOMIC|PR_ADDR|PR_SPLICE|PR_MPINPUT|PR_MPSOCKET, .pr_input = udp_input, .pr_ctlinput = udp_ctlinput, .pr_ctloutput = ip_ctloutput, diff --git a/sys/netinet6/in6_proto.c b/sys/netinet6/in6_proto.c index ac9f88481..2d7343a52 100644 --- a/sys/netinet6/in6_proto.c +++ b/sys/netinet6/in6_proto.c @@ -1,4 +1,4 @@ -/* $OpenBSD: in6_proto.c,v 1.116 2024/07/19 16:58:32 bluhm Exp $ */ +/* $OpenBSD: in6_proto.c,v 1.117 2024/07/26 14:38:20 bluhm Exp $ */ /* $KAME: in6_proto.c,v 1.66 2000/10/10 15:35:47 itojun Exp $ */ /* @@ -136,7 +136,7 @@ const struct protosw inet6sw[] = { .pr_type = SOCK_DGRAM, .pr_domain = &inet6domain, .pr_protocol = IPPROTO_UDP, - .pr_flags = PR_ATOMIC|PR_ADDR|PR_SPLICE|PR_MPSOCKET, + .pr_flags = PR_ATOMIC|PR_ADDR|PR_SPLICE|PR_MPINPUT|PR_MPSOCKET, .pr_input = udp_input, .pr_ctlinput = udp6_ctlinput, .pr_ctloutput = ip6_ctloutput, diff --git a/sys/sys/ktrace.h b/sys/sys/ktrace.h index be2841431..fa667c8e6 100644 --- a/sys/sys/ktrace.h +++ b/sys/sys/ktrace.h @@ -1,4 +1,4 @@ -/* $OpenBSD: ktrace.h,v 1.48 2023/12/15 15:12:08 deraadt Exp $ */ +/* $OpenBSD: ktrace.h,v 1.50 2024/07/27 02:10:26 guenther Exp $ */ /* $NetBSD: ktrace.h,v 1.12 1996/02/04 02:12:29 christos Exp $ */ /* @@ -229,45 +229,49 @@ void ktrcleartrace(struct process *); void ktrsettrace(struct process *, int, struct vnode *, struct ucred *); void ktrstruct(struct proc *, const char *, const void *, size_t); -#define ktrsockaddr(p, s, l) \ - ktrstruct((p), "sockaddr", (s), (l)) -#define ktrstat(p, s) \ - ktrstruct((p), "stat", (s), sizeof(struct stat)) + +/* please keep these sorted by second argument to ktrstruct() */ #define ktrabstimespec(p, s) \ - ktrstruct((p), "abstimespec", (s), sizeof(struct timespec)) -#define ktrreltimespec(p, s) \ - ktrstruct((p), "reltimespec", (s), sizeof(struct timespec)) + ktrstruct(p, "abstimespec", s, sizeof(struct timespec)) #define ktrabstimeval(p, s) \ - ktrstruct((p), "abstimeval", (s), sizeof(struct timeval)) -#define ktrreltimeval(p, s) \ - ktrstruct((p), "reltimeval", (s), sizeof(struct timeval)) -#define ktrsigaction(p, s) \ - ktrstruct((p), "sigaction", (s), sizeof(struct sigaction)) -#define ktrrlimit(p, s) \ - ktrstruct((p), "rlimit", (s), sizeof(struct rlimit)) -#define ktrrusage(p, s) \ - ktrstruct((p), "rusage", (s), sizeof(struct rusage)) + ktrstruct(p, "abstimeval", s, sizeof(struct timeval)) +#define ktrcmsghdr(p, s, l) \ + ktrstruct(p, "cmsghdr", s, l) +#define ktrfds(p, s, c) \ + ktrstruct(p, "fds", s, (c) * sizeof(int)) #define ktrfdset(p, s, l) \ - ktrstruct((p), "fdset", (s), l) -#define ktrquota(p, s) \ - ktrstruct((p), "quota", (s), sizeof(struct dqblk)) -#define ktrmsghdr(p, s) \ - ktrstruct(p, "msghdr", s, sizeof(struct msghdr)) + ktrstruct(p, "fdset", s, l) +#define ktrflock(p, s) \ + ktrstruct(p, "flock", s, sizeof(struct flock)) +#define ktriovec(p, s, c) \ + ktrstruct(p, "iovec", s, (c) * sizeof(struct iovec)) +#define ktritimerval(p, s) \ + ktrstruct(p, "itimerval", s, sizeof(struct itimerval)) +#define ktrevent(p, s, c) \ + ktrstruct(p, "kevent", s, (c) * sizeof(struct kevent)) #define ktrmmsghdr(p, s) \ ktrstruct(p, "mmsghdr", s, sizeof(struct mmsghdr)) -#define ktriovec(p, s, count) \ - ktrstruct(p, "iovec", s, (count) * sizeof(struct iovec)) -#define ktrcmsghdr(p, c, len) \ - ktrstruct(p, "cmsghdr", c, len) -#define ktrevent(p, kev, count) \ - ktrstruct(p, "kevent", kev, (count) * sizeof(struct kevent)) -#define ktrpollfd(p, pfd, count) \ - ktrstruct(p, "pollfd", pfd, (count) * sizeof(struct pollfd)) -#define ktrfds(p, fds, count) \ - ktrstruct(p, "fds", fds, (count) * sizeof(int)) -#define ktrflock(p, fl) \ - ktrstruct(p, "flock", (fl), sizeof(struct flock)) -#define ktrsiginfo(p, si) \ - ktrstruct(p, "siginfo", (si), sizeof(siginfo_t)) +#define ktrmsghdr(p, s) \ + ktrstruct(p, "msghdr", s, sizeof(struct msghdr)) +#define ktrpollfd(p, s, c) \ + ktrstruct(p, "pollfd", s, (c) * sizeof(struct pollfd)) +#define ktrquota(p, s) \ + ktrstruct(p, "quota", s, sizeof(struct dqblk)) +#define ktrreltimespec(p, s) \ + ktrstruct(p, "reltimespec", s, sizeof(struct timespec)) +#define ktrreltimeval(p, s) \ + ktrstruct(p, "reltimeval", s, sizeof(struct timeval)) +#define ktrrlimit(p, s) \ + ktrstruct(p, "rlimit", s, sizeof(struct rlimit)) +#define ktrrusage(p, s) \ + ktrstruct(p, "rusage", s, sizeof(struct rusage)) +#define ktrsigaction(p, s) \ + ktrstruct(p, "sigaction", s, sizeof(struct sigaction)) +#define ktrsiginfo(p, s) \ + ktrstruct(p, "siginfo", s, sizeof(siginfo_t)) +#define ktrsockaddr(p, s, l) \ + ktrstruct(p, "sockaddr", s, l) +#define ktrstat(p, s) \ + ktrstruct(p, "stat", s, sizeof(struct stat)) #endif /* !_KERNEL */ diff --git a/usr.bin/kdump/ktrstruct.c b/usr.bin/kdump/ktrstruct.c index 6ced5cfc3..6bd1403a6 100644 --- a/usr.bin/kdump/ktrstruct.c +++ b/usr.bin/kdump/ktrstruct.c @@ -1,4 +1,4 @@ -/* $OpenBSD: ktrstruct.c,v 1.31 2022/12/29 01:36:36 guenther Exp $ */ +/* $OpenBSD: ktrstruct.c,v 1.32 2024/07/26 19:16:31 guenther Exp $ */ /*- * Copyright (c) 1988, 1993 @@ -265,6 +265,18 @@ ktrtimeval(const struct timeval *tvp, int relative) printf(" }\n"); } +static void +ktritimerval(const struct itimerval *itvp) +{ + printf("struct itimerval { value="); + print_timeval(&itvp->it_value, 0); + if (timerisset(&itvp->it_interval)) { + printf(", interval="); + print_timeval(&itvp->it_interval, 1); + } + printf(" }\n"); +} + static void ktrsigaction(const struct sigaction *sa) { @@ -615,6 +627,13 @@ ktrstruct(char *buf, size_t buflen) goto invalid; memcpy(&tv, data, datalen); ktrtimeval(&tv, name[0] == 'r'); + } else if (strcmp(name, "itimerval") == 0) { + struct itimerval itv; + + if (datalen != sizeof(itv)) + goto invalid; + memcpy(&itv, data, datalen); + ktritimerval(&itv); } else if (strcmp(name, "sigaction") == 0) { struct sigaction sa; diff --git a/usr.bin/ssh/sshd_config.5 b/usr.bin/ssh/sshd_config.5 index 3b4b178da..9170c4892 100644 --- a/usr.bin/ssh/sshd_config.5 +++ b/usr.bin/ssh/sshd_config.5 @@ -33,8 +33,8 @@ .\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF .\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. .\" -.\" $OpenBSD: sshd_config.5,v 1.367 2024/07/10 21:58:34 djm Exp $ -.Dd $Mdocdate: July 10 2024 $ +.\" $OpenBSD: sshd_config.5,v 1.368 2024/07/26 15:24:49 naddy Exp $ +.Dd $Mdocdate: July 26 2024 $ .Dt SSHD_CONFIG 5 .Os .Sh NAME @@ -1601,7 +1601,7 @@ scanning tools such as .It Cm grace-exceeded:duration Specifies how long to refuse clients that fail to authenticate after .Cm LoginGraceTime -(default: 20s). +(default: 10s). .It Cm max:duration Specifies the maximum time a particular source address range will be refused access for (default: 10m). diff --git a/usr.sbin/smtpd/smtpd.conf.5 b/usr.sbin/smtpd/smtpd.conf.5 index 03f094c01..3d73b5a06 100644 --- a/usr.sbin/smtpd/smtpd.conf.5 +++ b/usr.sbin/smtpd/smtpd.conf.5 @@ -1,4 +1,4 @@ -.\" $OpenBSD: smtpd.conf.5,v 1.271 2024/03/24 06:22:18 jsg Exp $ +.\" $OpenBSD: smtpd.conf.5,v 1.272 2024/07/26 06:24:52 jmc Exp $ .\" .\" Copyright (c) 2008 Janne Johansson .\" Copyright (c) 2009 Jacek Masiulaniec @@ -17,7 +17,7 @@ .\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. .\" .\" -.Dd $Mdocdate: March 24 2024 $ +.Dd $Mdocdate: July 26 2024 $ .Dt SMTPD.CONF 5 .Os .Sh NAME @@ -230,6 +230,14 @@ with higher priority. Operate as a backup mail exchanger delivering messages to any mail exchanger with higher priority than mail exchanger identified as .Ar name . +.It Cm ca Ar caname +For secure connections, +use the certificate authority associated with +.Ar caname +(declared in a +.Ic ca +directive) +to validate the server's identity. .It Cm helo Ar heloname Advertise .Ar heloname @@ -366,7 +374,11 @@ Associate the Certificate Authority (CA) certificate file .Ar cafile with ca entry .Ar caname . -The ca entry can be referenced in listener rules and relay actions. +The ca entry can be referenced in +.Cm listen on +and +.Cm action ... relay +rules. .It Ic filter Ar chain-name Ic chain Brq Ar filter-name Op , Ar ... Register a chain of filters .Ar chain-name ,