sync with OpenBSD -current
This commit is contained in:
parent
b62220995a
commit
676afb990b
GPG key ID:
F42C07F07E2E35B7
82 changed files with 520 additions and 278 deletions
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@ -1,4 +1,4 @@
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/* $OpenBSD: dwpcie.c,v 1.56 2024/07/09 08:47:10 kettenis Exp $ */
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/* $OpenBSD: dwpcie.c,v 1.57 2024/09/01 03:08:56 jsg Exp $ */
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/*
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* Copyright (c) 2018 Mark Kettenis <kettenis@openbsd.org>
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*
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@ -739,9 +739,9 @@ dwpcie_attach_deferred(struct device *self)
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pba.pba_flags |= PCI_FLAGS_MSI_ENABLED;
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/*
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* Only support mutiple MSI vectors if we have enough MSI
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* Only support multiple MSI vectors if we have enough MSI
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* interrupts (or are using an external interrupt controller
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* that hopefully suppors plenty of MSI interripts).
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* that hopefully supports plenty of MSI interrupts).
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*/
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if (OF_getproplen(sc->sc_node, "msi-map") > 0 ||
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sc->sc_num_msi > 32)
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@ -1,4 +1,4 @@
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/* $OpenBSD: imxehci.c,v 1.6 2022/04/06 18:59:28 naddy Exp $ */
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/* $OpenBSD: imxehci.c,v 1.7 2024/09/01 03:08:56 jsg Exp $ */
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/*
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* Copyright (c) 2012-2013 Patrick Wildt <patrick@blueri.se>
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*
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@ -361,7 +361,7 @@ imx23_usb_init(struct imxehci_softc *sc, uint32_t *cells)
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anatop, sizeof(anatop)) == sizeof(anatop))
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rm = regmap_byphandle(anatop[0]);
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/* Disable the carger detection, else signal on DP will be poor */
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/* Disable the charger detection, else signal on DP will be poor */
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switch (sc->sc_unit) {
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case 0:
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if (rm != NULL)
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@ -1,4 +1,4 @@
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/* $OpenBSD: qcpas.c,v 1.6 2024/08/05 18:36:28 kettenis Exp $ */
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/* $OpenBSD: qcpas.c,v 1.7 2024/09/01 03:14:48 jsg Exp $ */
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/*
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* Copyright (c) 2023 Patrick Wildt <patrick@blueri.se>
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*
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@ -1223,7 +1223,7 @@ struct battmgr_bat_info {
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uint32_t max_sample_time_ms;
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uint32_t min_sample_time_ms;
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uint32_t max_average_interval_ms;
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uint32_t min_averae_interval_ms;
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uint32_t min_average_interval_ms;
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uint32_t capacity_granularity1;
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uint32_t capacity_granularity2;
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uint32_t swappable;
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@ -1,4 +1,4 @@
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/* $OpenBSD: hidkbd.c,v 1.13 2024/07/02 05:50:02 gkoehler Exp $ */
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/* $OpenBSD: hidkbd.c,v 1.14 2024/09/01 03:08:56 jsg Exp $ */
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/* $NetBSD: ukbd.c,v 1.85 2003/03/11 16:44:00 augustss Exp $ */
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/*
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@ -147,7 +147,7 @@ static const struct hidkbd_translation apple_fn_trans[] = {
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{ 67, 235 }, /* F10 -> backlight raise */
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{ 39, 84 }, /* keypad divide */
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{ 19, 85 }, /* keypad multiply */
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{ 51, 86 }, /* keypad substract */
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{ 51, 86 }, /* keypad subtract */
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{ 56, 87 }, /* keypad add */
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{ 13, 89 }, /* keypad 1 */
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{ 14, 90 }, /* keypad 2 */
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@ -1,4 +1,4 @@
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/* $OpenBSD: aac.c,v 1.96 2023/09/11 12:10:47 mvs Exp $ */
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/* $OpenBSD: aac.c,v 1.97 2024/09/01 03:08:56 jsg Exp $ */
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/*-
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* Copyright (c) 2000 Michael Smith
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@ -2677,7 +2677,7 @@ aac_print_aif(struct aac_softc *sc, struct aac_aif_command *aif)
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break;
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case AifJobFsVerify:
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/* File System Verify operation */
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printf("\t(FsVerivy)\n");
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printf("\t(FsVerify)\n");
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break;
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case AifJobFsExtend:
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/* File System Extend operation */
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@ -1,4 +1,4 @@
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/* $OpenBSD: acx111.c,v 1.24 2022/01/09 05:42:38 jsg Exp $ */
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/* $OpenBSD: acx111.c,v 1.25 2024/09/01 03:08:56 jsg Exp $ */
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/*
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* Copyright (c) 2006 Jonathan Gray <jsg@openbsd.org>
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@ -80,7 +80,7 @@
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#define ACX111_INTR_ENABLE (ACXRV_INTR_TX_FINI | ACXRV_INTR_RX_FINI)
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/*
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* XXX do we really care about fowlling interrupts?
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* XXX do we really care about the following interrupts?
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*
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* ACXRV_INTR_IV_ICV_FAILURE | ACXRV_INTR_INFO |
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* ACXRV_INTR_SCAN_FINI | ACXRV_INTR_FCS_THRESHOLD
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@ -1,4 +1,4 @@
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/* $OpenBSD: aic79xx.c,v 1.67 2022/01/09 05:42:38 jsg Exp $ */
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/* $OpenBSD: aic79xx.c,v 1.68 2024/09/01 03:08:56 jsg Exp $ */
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/*
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* Copyright (c) 2004 Milos Urbanek, Kenneth R. Westerback & Marco Peereboom
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@ -2060,7 +2060,7 @@ ahd_handle_pkt_busfree(struct ahd_softc *ahd, u_int busfreetime)
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* SCB that encountered the failure. Clean
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* up the queue, clear SELDO and LQOBUSFREE,
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* and allow the sequencer to restart the select
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* out at its lesure.
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* out at its leisure.
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*/
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ahd_set_modes(ahd, AHD_MODE_SCSI, AHD_MODE_SCSI);
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scbid = ahd_inw(ahd, CURRSCB);
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@ -1,4 +1,4 @@
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/* $OpenBSD: aic79xx.h,v 1.31 2024/05/29 00:48:15 jsg Exp $ */
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/* $OpenBSD: aic79xx.h,v 1.32 2024/09/01 03:08:56 jsg Exp $ */
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/*
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* Copyright (c) 2004 Milos Urbanek, Kenneth R. Westerback & Marco Peereboom
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@ -409,7 +409,7 @@ typedef enum {
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*/
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/*
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* Status information embedded in the shared poriton of
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* Status information embedded in the shared portion of
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* an SCB after passing the cdb to the target. The kernel
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* driver will only read this data for transactions that
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* complete abnormally.
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@ -1,4 +1,4 @@
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/* $OpenBSD: aic7xxx_seeprom.c,v 1.9 2021/03/07 06:21:38 jsg Exp $ */
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/* $OpenBSD: aic7xxx_seeprom.c,v 1.10 2024/09/01 03:08:56 jsg Exp $ */
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/* $NetBSD: aic7xxx_seeprom.c,v 1.8 2003/05/02 19:12:19 dyoung Exp $ */
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/*
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@ -47,7 +47,7 @@
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* from the FreeBSD source file aic7xxx_pci.c by Frank van der Linden
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* <fvdl@netbsd.org>
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*
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* $Id: aic7xxx_seeprom.c,v 1.9 2021/03/07 06:21:38 jsg Exp $
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* $Id: aic7xxx_seeprom.c,v 1.10 2024/09/01 03:08:56 jsg Exp $
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*
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* $FreeBSD: src/sys/dev/aic7xxx/aic7xxx_pci.c,v 1.22 2003/01/20 20:44:55 gibbs Exp $
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*/
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@ -88,7 +88,7 @@ static void ahc_parse_pci_eeprom(struct ahc_softc *, struct seeprom_config *);
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/*
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* Check the external port logic for a serial eeprom
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* and termination/cable detection contrls.
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* and termination/cable detection controls.
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*/
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void
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ahc_check_extport(struct ahc_softc *ahc, u_int *sxfrctl1)
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@ -1,4 +1,4 @@
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/* $OpenBSD: am79900reg.h,v 1.2 2008/06/26 05:42:15 ray Exp $ */
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/* $OpenBSD: am79900reg.h,v 1.3 2024/09/01 03:08:56 jsg Exp $ */
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/* $NetBSD: am79900reg.h,v 1.7 2005/02/27 00:27:00 perry Exp $ */
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/*-
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@ -131,7 +131,7 @@ struct leinit {
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/* Transmit message descriptor 3 (tmd3) */
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#define LE_T2_BUFF (1<<31) /* buffer error */
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#define LE_T2_UFLO (1<<30) /* underflow error */
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#define LE_T2_EXDEF (1<<29) /* excessive defferral */
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#define LE_T2_EXDEF (1<<29) /* excessive deferral */
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#define LE_T2_LCOL (1<<28) /* late collision */
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#define LE_T2_LCAR (1<<27) /* loss of carrier */
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#define LE_T2_RTRY (1<<26) /* retry error */
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@ -1,4 +1,4 @@
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/* $OpenBSD: bt485.c,v 1.14 2014/07/08 17:19:25 deraadt Exp $ */
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/* $OpenBSD: bt485.c,v 1.15 2024/09/01 03:08:56 jsg Exp $ */
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/* $NetBSD: bt485.c,v 1.2 2000/04/02 18:55:01 nathanw Exp $ */
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/*
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@ -210,7 +210,7 @@ bt485_init(rc)
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regval |= 0x02;
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data->ramdac_wr(data->cookie, BT485_REG_COMMAND_0, regval);
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/* Set the RAMDAC to 8BPP (no interestion options). */
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/* Set the RAMDAC to 8BPP (no interesting options). */
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data->ramdac_wr(data->cookie, BT485_REG_COMMAND_1, 0x40);
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/* Disable the cursor (for now) */
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@ -1,4 +1,4 @@
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/* $OpenBSD: ccp.c,v 1.6 2024/08/13 20:48:00 bluhm Exp $ */
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/* $OpenBSD: ccp.c,v 1.9 2024/09/01 19:25:06 bluhm Exp $ */
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/*
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* Copyright (c) 2018 David Gwynne <dlg@openbsd.org>
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@ -24,6 +24,7 @@
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#include <sys/malloc.h>
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#include <sys/kernel.h>
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#include <sys/timeout.h>
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#include <sys/pledge.h>
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#include <machine/bus.h>
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@ -129,7 +130,7 @@ psp_attach(struct ccp_softc *sc)
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/*
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* create and map Trusted Memory Region (TMR); size 1 Mbyte,
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* needs to be aligend to 1 Mbyte.
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* needs to be aligned to 1 Mbyte.
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*/
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sc->sc_tmr_size = size = PSP_TMR_SIZE;
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if (bus_dmamap_create(sc->sc_dmat, size, 1, size, 0,
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@ -563,6 +564,29 @@ psp_deactivate(struct psp_deactivate *udeact)
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return (0);
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}
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int
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psp_guest_shutdown(struct psp_guest_shutdown *ugshutdown)
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{
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struct psp_deactivate deact;
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struct psp_decommission decom;
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int ret;
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bzero(&deact, sizeof(deact));
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deact.handle = ugshutdown->handle;
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if ((ret = psp_deactivate(&deact)) != 0)
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return (ret);
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if ((ret = psp_df_flush()) != 0)
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return (ret);
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bzero(&decom, sizeof(decom));
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decom.handle = ugshutdown->handle;
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if ((ret = psp_decommission(&decom)) != 0)
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return (ret);
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return (0);
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}
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int
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psp_snp_get_pstatus(struct psp_snp_platform_status *ustatus)
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{
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@ -641,17 +665,39 @@ pspioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p)
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case PSP_IOC_DEACTIVATE:
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ret = psp_deactivate((struct psp_deactivate *)data);
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break;
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case PSP_IOC_GUEST_SHUTDOWN:
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ret = psp_guest_shutdown((struct psp_guest_shutdown *)data);
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break;
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case PSP_IOC_SNP_GET_PSTATUS:
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ret =
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psp_snp_get_pstatus((struct psp_snp_platform_status *)data);
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break;
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default:
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printf("%s: unkown ioctl code 0x%lx\n", __func__, cmd);
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ret = ENOTTY;
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break;
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}
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rw_exit_write(&ccp_softc->sc_lock);
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return (ret);
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}
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int
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pledge_ioctl_psp(struct proc *p, long com)
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{
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switch (com) {
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case PSP_IOC_GET_PSTATUS:
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case PSP_IOC_DF_FLUSH:
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case PSP_IOC_GET_GSTATUS:
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case PSP_IOC_LAUNCH_START:
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case PSP_IOC_LAUNCH_UPDATE_DATA:
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case PSP_IOC_LAUNCH_MEASURE:
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case PSP_IOC_LAUNCH_FINISH:
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case PSP_IOC_ACTIVATE:
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case PSP_IOC_GUEST_SHUTDOWN:
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return (0);
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default:
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return (pledge_fail(p, EPERM, PLEDGE_VMM));
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}
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}
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#endif /* __amd64__ */
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@ -1,4 +1,4 @@
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/* $OpenBSD: ccpvar.h,v 1.3 2024/06/13 17:59:08 bluhm Exp $ */
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/* $OpenBSD: ccpvar.h,v 1.4 2024/09/01 19:25:06 bluhm Exp $ */
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/*
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* Copyright (c) 2018 David Gwynne <dlg@openbsd.org>
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@ -243,6 +243,11 @@ struct psp_init {
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} __packed;
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struct psp_guest_shutdown {
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/* Input parameter for PSP_CMD_GUEST_SHUTDOWN */
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uint32_t handle;
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} __packed;
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/* Selection of PSP commands of the SEV-SNP ABI Version 1.55 */
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#define PSP_CMD_SNP_PLATFORMSTATUS 0x81
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@ -272,6 +277,7 @@ struct psp_snp_platform_status {
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#define PSP_IOC_ACTIVATE _IOW('P', 9, struct psp_activate)
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#define PSP_IOC_DEACTIVATE _IOW('P', 10, struct psp_deactivate)
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#define PSP_IOC_SNP_GET_PSTATUS _IOR('P', 11, struct psp_snp_platform_status)
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#define PSP_IOC_GUEST_SHUTDOWN _IOW('P', 255, struct psp_guest_shutdown)
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#endif /* __amd64__ */
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#ifdef _KERNEL
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@ -1,4 +1,4 @@
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/* $OpenBSD: cyreg.h,v 1.8 2002/09/14 15:00:02 art Exp $ */
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/* $OpenBSD: cyreg.h,v 1.9 2024/09/01 03:08:56 jsg Exp $ */
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/* $FreeBSD: cyreg.h,v 1.1 1995/07/05 12:15:51 bde Exp $ */
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/*-
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@ -45,7 +45,7 @@
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#define CY8_SVCACKT 0x200
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#define CY8_SVCACKM 0x300
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/* twice this in PCI mode (shifed BUSTYPE bits left) */
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/* twice this in PCI mode (shifted BUSTYPE bits left) */
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#define CY_CD1400_MEMSPACING 0x400
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/* adjustment value for accessing the last 4 cd1400s on Cyclom-32 */
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@ -1,4 +1,4 @@
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/* $OpenBSD: gdtvar.h,v 1.26 2021/08/30 14:44:39 jasper Exp $ */
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/* $OpenBSD: gdtvar.h,v 1.27 2024/09/01 03:08:56 jsg Exp $ */
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/*
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* Copyright (c) 1999, 2000 Niklas Hallqvist. All rights reserved.
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@ -66,7 +66,7 @@ struct gdt_intr_ctx {
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};
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/*
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* A command contol block, one for each corresponding command index of the
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* A command control block, one for each corresponding command index of the
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* controller.
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*/
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struct gdt_ccb {
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@ -1,4 +1,4 @@
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/* $OpenBSD: ics2101reg.h,v 1.3 2008/06/26 05:42:15 ray Exp $ */
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/* $OpenBSD: ics2101reg.h,v 1.4 2024/09/01 03:08:56 jsg Exp $ */
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/* $NetBSD: ics2101reg.h,v 1.3 1996/02/05 02:18:52 jtc Exp $ */
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/*-
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@ -61,7 +61,7 @@
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#define ICSMIX_CTRL_LEFT 0x00 /* Control left channel */
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#define ICSMIX_CTRL_RIGHT 0x01 /* Control right channel */
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#define ICSMIX_ATTN_LEFT 0x02 /* Attenuate left channel */
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#define ICSMIX_ATTN_RIGHT 0x03 /* Attenutate right channel */
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#define ICSMIX_ATTN_RIGHT 0x03 /* Attenuate right channel */
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#define ICSMIX_PAEN 0x04 /* Panning control */
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#define ICSMIX_CHAN_0 0 /* Values for mixer channels */
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#define ICSMIX_CHAN_1 1
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@ -1,4 +1,4 @@
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/* $OpenBSD: mtd8xxreg.h,v 1.2 2003/10/21 18:58:49 jmc Exp $ */
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/* $OpenBSD: mtd8xxreg.h,v 1.3 2024/09/01 03:08:56 jsg Exp $ */
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/*
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* Copyright (c) 2003 Oleg Safiullin <form@pdp11.org.ru>
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@ -92,7 +92,7 @@
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#define TCR_BACKOPT 0x10000000U /* Optional back-off */
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#define TCR_FBACK 0x08000000U /* Fast back-off */
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#define TCR_ENHANCED 0x02000000U /* Enhanced transmit mode */
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#define TCR_TFCEN 0x01000000U /* Ttansmit flow control enable */
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#define TCR_TFCEN 0x01000000U /* Transmit flow control enable */
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#define TCR_TFT64 0x00000000U /* 64 bytes */
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#define TCR_TFT32 0x00200000U /* 32 bytes */
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#define TCR_TFT128 0x00400000U /* 128 bytes */
|
||||
|
|
@ -144,7 +144,7 @@
|
|||
#define ISR_ROVF 0x00000200U /* Receive overflow */
|
||||
#define ISR_ETI 0x00000100U /* Early transfer interrupt */
|
||||
#define ISR_ERI 0x00000080U /* Early receive interrupt */
|
||||
#define ISR_CNTOVF 0x00000040U /* CRC or MPA tally ounter overflow */
|
||||
#define ISR_CNTOVF 0x00000040U /* CRC or MPA tally counter overflow */
|
||||
#define ISR_RBU 0x00000020U /* Receive buffer unavailable */
|
||||
#define ISR_TBU 0x00000010U /* Transmit buffer unavailable */
|
||||
#define ISR_TI 0x00000008U /* Transmit interrupt */
|
||||
|
|
@ -167,7 +167,7 @@
|
|||
#define IMR_MROVF 0x00000200U /* Receive overflow */
|
||||
#define IMR_METI 0x00000100U /* Early transfer interrupt */
|
||||
#define IMR_MERI 0x00000080U /* Early receive interrupt */
|
||||
#define IMR_MCNTOVF 0x00000040U /* CRC or MPA tally ounter overflow */
|
||||
#define IMR_MCNTOVF 0x00000040U /* CRC or MPA tally counter overflow */
|
||||
#define IMR_MRBU 0x00000020U /* Receive buffer unavailable */
|
||||
#define IMR_MTBU 0x00000010U /* Transmit buffer unavailable */
|
||||
#define IMR_MTI 0x00000008U /* Transmit interrupt */
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $OpenBSD: nvme.c,v 1.121 2024/07/13 08:59:41 dv Exp $ */
|
||||
/* $OpenBSD: nvme.c,v 1.122 2024/09/01 03:08:56 jsg Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2014 David Gwynne <dlg@openbsd.org>
|
||||
|
|
@ -1946,7 +1946,7 @@ nvme_bioctl_inq(struct nvme_softc *sc, struct bioc_inq *bi)
|
|||
nvme_bio_status(bs, "Max i/o %zu bytes%s%s%s, Sanitize 0x%b",
|
||||
sc->sc_mdts,
|
||||
ISSET(idctrl->lpa, NVM_ID_CTRL_LPA_PE) ?
|
||||
", Persisent Event Log" : "",
|
||||
", Persistent Event Log" : "",
|
||||
ISSET(idctrl->fna, NVM_ID_CTRL_FNA_CRYPTOFORMAT) ?
|
||||
", CryptoFormat" : "",
|
||||
ISSET(idctrl->vwc, NVM_ID_CTRL_VWC_PRESENT) ?
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $OpenBSD: qwx.c,v 1.66 2024/08/19 08:22:30 jsg Exp $ */
|
||||
/* $OpenBSD: qwx.c,v 1.67 2024/09/01 03:08:56 jsg Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright 2023 Stefan Sperling <stsp@openbsd.org>
|
||||
|
|
@ -6691,7 +6691,7 @@ qwx_qmi_decode_msg(struct qwx_softc *sc, void *output, size_t output_len,
|
|||
|
||||
/* Related EIs must have the same type. */
|
||||
if (ei->tlv_type != elem_type) {
|
||||
printf("%s: unexepected element type 0x%x; "
|
||||
printf("%s: unexpected element type 0x%x; "
|
||||
"expected 0x%x\n", __func__,
|
||||
ei->tlv_type, elem_type);
|
||||
return -1;
|
||||
|
|
@ -7471,7 +7471,7 @@ qwx_qrtr_recv_msg(struct qwx_softc *sc, struct mbuf *m)
|
|||
qwx_qrtr_resume_tx(sc);
|
||||
}
|
||||
|
||||
// Not needed because we don't implenent QMI as a network service.
|
||||
// Not needed because we don't implement QMI as a network service.
|
||||
#define qwx_qmi_init_service(sc) (0)
|
||||
#define qwx_qmi_deinit_service(sc) (0)
|
||||
|
||||
|
|
@ -14261,7 +14261,7 @@ qwx_dp_htt_htc_tx_complete(struct qwx_softc *sc, struct mbuf *m)
|
|||
static inline void
|
||||
qwx_dp_get_mac_addr(uint32_t addr_l32, uint16_t addr_h16, uint8_t *addr)
|
||||
{
|
||||
#if 0 /* Not needed on OpenBSD? We do swapping in sofware... */
|
||||
#if 0 /* Not needed on OpenBSD? We do swapping in software... */
|
||||
if (IS_ENABLED(CONFIG_CPU_BIG_ENDIAN)) {
|
||||
addr_l32 = swab32(addr_l32);
|
||||
addr_h16 = swab16(addr_h16);
|
||||
|
|
@ -20790,7 +20790,7 @@ qwx_hal_srng_setup(struct qwx_softc *sc, enum hal_ring_type type,
|
|||
memset(srng->ring_base_vaddr, 0,
|
||||
(srng->entry_size * srng->num_entries) << 2);
|
||||
|
||||
#if 0 /* Not needed on OpenBSD? We do swapping in sofware... */
|
||||
#if 0 /* Not needed on OpenBSD? We do swapping in software... */
|
||||
/* TODO: Add comments on these swap configurations */
|
||||
if (IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
|
||||
srng->flags |= HAL_SRNG_FLAGS_MSI_SWAP | HAL_SRNG_FLAGS_DATA_TLV_SWAP |
|
||||
|
|
@ -22252,7 +22252,7 @@ qwx_reg_update_chan_list(struct qwx_softc *sc, uint8_t pdev_id)
|
|||
ch->antennamax, ch->phy_mode);
|
||||
|
||||
ch++;
|
||||
/* TODO: use quarrter/half rate, cfreq12, dfs_cfreq2
|
||||
/* TODO: use quarter/half rate, cfreq12, dfs_cfreq2
|
||||
* set_agile, reg_class_idx
|
||||
*/
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $OpenBSD: qwxreg.h,v 1.7 2024/02/21 14:40:50 kevlo Exp $ */
|
||||
/* $OpenBSD: qwxreg.h,v 1.8 2024/09/01 03:08:56 jsg Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2021-2022, Qualcomm Innovation Center, Inc.
|
||||
|
|
@ -163,7 +163,7 @@ struct wmi_tlv {
|
|||
* to be communicated separately.
|
||||
* @WMI_HOST_HW_MODE_DBS_SBS: 3 PHYs, with 2 on the same band doing SBS
|
||||
* as in WMI_HW_MODE_SBS, and 3rd on the other band
|
||||
* @WMI_HOST_HW_MODE_DBS_OR_SBS: Two PHY with one PHY capabale of both 2G and
|
||||
* @WMI_HOST_HW_MODE_DBS_OR_SBS: Two PHY with one PHY capable of both 2G and
|
||||
* 5G. It can support SBS (5G + 5G) OR DBS (5G + 2G).
|
||||
* @WMI_HOST_HW_MODE_MAX: Max hw_mode_id. Used to indicate invalid mode.
|
||||
*/
|
||||
|
|
@ -2233,9 +2233,9 @@ enum {
|
|||
#define WMI_VDEV_SLOT_TIME_LONG 0x1
|
||||
/* slot time short */
|
||||
#define WMI_VDEV_SLOT_TIME_SHORT 0x2
|
||||
/* preablbe long */
|
||||
/* preamble long */
|
||||
#define WMI_VDEV_PREAMBLE_LONG 0x1
|
||||
/* preablbe short */
|
||||
/* preamble short */
|
||||
#define WMI_VDEV_PREAMBLE_SHORT 0x2
|
||||
|
||||
enum wmi_peer_smps_state {
|
||||
|
|
@ -4224,7 +4224,7 @@ enum wmi_vdev_start_resp_status_code {
|
|||
WMI_VDEV_START_RESPONSE_INVALID_REGDOMAIN = 4,
|
||||
};
|
||||
|
||||
/* Regaulatory Rule Flags Passed by FW */
|
||||
/* Regulatory Rule Flags Passed by FW */
|
||||
#define REGULATORY_CHAN_DISABLED BIT(0)
|
||||
#define REGULATORY_CHAN_NO_IR BIT(1)
|
||||
#define REGULATORY_CHAN_RADAR BIT(3)
|
||||
|
|
@ -8273,7 +8273,7 @@ struct hal_reo_cmd_hdr {
|
|||
#define HAL_REO_CMD_FLG_UNBLK_RESOURCE BIT(7)
|
||||
#define HAL_REO_CMD_FLG_UNBLK_CACHE BIT(8)
|
||||
|
||||
/* Should be matching with HAL_REO_UPD_RX_QUEUE_INFO0_UPD_* feilds */
|
||||
/* Should be matching with HAL_REO_UPD_RX_QUEUE_INFO0_UPD_* fields */
|
||||
#define HAL_REO_CMD_UPD0_RX_QUEUE_NUM BIT(8)
|
||||
#define HAL_REO_CMD_UPD0_VLD BIT(9)
|
||||
#define HAL_REO_CMD_UPD0_ALDC BIT(10)
|
||||
|
|
@ -8298,7 +8298,7 @@ struct hal_reo_cmd_hdr {
|
|||
#define HAL_REO_CMD_UPD0_PN_VALID BIT(29)
|
||||
#define HAL_REO_CMD_UPD0_PN BIT(30)
|
||||
|
||||
/* Should be matching with HAL_REO_UPD_RX_QUEUE_INFO1_* feilds */
|
||||
/* Should be matching with HAL_REO_UPD_RX_QUEUE_INFO1_* fields */
|
||||
#define HAL_REO_CMD_UPD1_VLD BIT(16)
|
||||
#define HAL_REO_CMD_UPD1_ALDC GENMASK(18, 17)
|
||||
#define HAL_REO_CMD_UPD1_DIS_DUP_DETECTION BIT(19)
|
||||
|
|
@ -8314,7 +8314,7 @@ struct hal_reo_cmd_hdr {
|
|||
#define HAL_REO_CMD_UPD1_PN_HANDLE_ENABLE BIT(30)
|
||||
#define HAL_REO_CMD_UPD1_IGNORE_AMPDU_FLG BIT(31)
|
||||
|
||||
/* Should be matching with HAL_REO_UPD_RX_QUEUE_INFO2_* feilds */
|
||||
/* Should be matching with HAL_REO_UPD_RX_QUEUE_INFO2_* fields */
|
||||
#define HAL_REO_CMD_UPD2_SVLD BIT(10)
|
||||
#define HAL_REO_CMD_UPD2_SSN GENMASK(22, 11)
|
||||
#define HAL_REO_CMD_UPD2_SEQ_2K_ERR BIT(23)
|
||||
|
|
@ -10677,7 +10677,7 @@ struct rx_attention {
|
|||
* msdu_limit_error
|
||||
* Indicates that the MSDU threshold was exceeded and thus
|
||||
* all the rest of the MSDUs will not be scattered and will not
|
||||
* be decasulated but will be DMA'ed in RAW format as a single
|
||||
* be decapsulated but will be DMA'ed in RAW format as a single
|
||||
* MSDU buffer.
|
||||
*
|
||||
* da_is_valid
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $OpenBSD: qwz.c,v 1.7 2024/08/20 21:24:15 patrick Exp $ */
|
||||
/* $OpenBSD: qwz.c,v 1.9 2024/09/01 03:14:48 jsg Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright 2023 Stefan Sperling <stsp@openbsd.org>
|
||||
|
|
@ -3530,7 +3530,7 @@ static const struct qmi_elem_info qmi_wlanfw_host_cap_req_msg_v01_ei[] = {
|
|||
.array_type = NO_ARRAY,
|
||||
.tlv_type = 0x1D,
|
||||
.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,
|
||||
cal_duraiton),
|
||||
cal_duration),
|
||||
},
|
||||
{
|
||||
.data_type = QMI_OPT_FLAG,
|
||||
|
|
@ -5589,7 +5589,7 @@ qwz_qmi_decode_msg(struct qwz_softc *sc, void *output, size_t output_len,
|
|||
|
||||
/* Related EIs must have the same type. */
|
||||
if (ei->tlv_type != elem_type) {
|
||||
printf("%s: unexepected element type 0x%x; "
|
||||
printf("%s: unexpected element type 0x%x; "
|
||||
"expected 0x%x\n", __func__,
|
||||
ei->tlv_type, elem_type);
|
||||
return -1;
|
||||
|
|
@ -6423,7 +6423,7 @@ qwz_qrtr_recv_msg(struct qwz_softc *sc, struct mbuf *m)
|
|||
qwz_qrtr_resume_tx(sc);
|
||||
}
|
||||
|
||||
// Not needed because we don't implenent QMI as a network service.
|
||||
// Not needed because we don't implement QMI as a network service.
|
||||
#define qwz_qmi_init_service(sc) (0)
|
||||
#define qwz_qmi_deinit_service(sc) (0)
|
||||
|
||||
|
|
@ -13495,7 +13495,7 @@ qwz_dp_htt_htc_tx_complete(struct qwz_softc *sc, struct mbuf *m)
|
|||
static inline void
|
||||
qwz_dp_get_mac_addr(uint32_t addr_l32, uint16_t addr_h16, uint8_t *addr)
|
||||
{
|
||||
#if 0 /* Not needed on OpenBSD? We do swapping in sofware... */
|
||||
#if 0 /* Not needed on OpenBSD? We do swapping in software... */
|
||||
if (IS_ENABLED(CONFIG_CPU_BIG_ENDIAN)) {
|
||||
addr_l32 = swab32(addr_l32);
|
||||
addr_h16 = swab16(addr_h16);
|
||||
|
|
@ -20034,7 +20034,7 @@ qwz_hal_srng_setup(struct qwz_softc *sc, enum hal_ring_type type,
|
|||
memset(srng->ring_base_vaddr, 0,
|
||||
(srng->entry_size * srng->num_entries) << 2);
|
||||
|
||||
#if 0 /* Not needed on OpenBSD? We do swapping in sofware... */
|
||||
#if 0 /* Not needed on OpenBSD? We do swapping in software... */
|
||||
/* TODO: Add comments on these swap configurations */
|
||||
if (IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
|
||||
srng->flags |= HAL_SRNG_FLAGS_MSI_SWAP | HAL_SRNG_FLAGS_DATA_TLV_SWAP |
|
||||
|
|
@ -21466,7 +21466,7 @@ qwz_reg_update_chan_list(struct qwz_softc *sc, uint8_t pdev_id)
|
|||
ch->antennamax, ch->phy_mode);
|
||||
|
||||
ch++;
|
||||
/* TODO: use quarrter/half rate, cfreq12, dfs_cfreq2
|
||||
/* TODO: use quarter/half rate, cfreq12, dfs_cfreq2
|
||||
* set_agile, reg_class_idx
|
||||
*/
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $OpenBSD: qwzreg.h,v 1.4 2024/08/16 00:26:54 patrick Exp $ */
|
||||
/* $OpenBSD: qwzreg.h,v 1.6 2024/09/01 03:14:48 jsg Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2021-2022, Qualcomm Innovation Center, Inc.
|
||||
|
|
@ -159,7 +159,7 @@ struct wmi_tlv {
|
|||
* to be communicated separately.
|
||||
* @WMI_HOST_HW_MODE_DBS_SBS: 3 PHYs, with 2 on the same band doing SBS
|
||||
* as in WMI_HW_MODE_SBS, and 3rd on the other band
|
||||
* @WMI_HOST_HW_MODE_DBS_OR_SBS: Two PHY with one PHY capabale of both 2G and
|
||||
* @WMI_HOST_HW_MODE_DBS_OR_SBS: Two PHY with one PHY capable of both 2G and
|
||||
* 5G. It can support SBS (5G + 5G) OR DBS (5G + 2G).
|
||||
* @WMI_HOST_HW_MODE_MAX: Max hw_mode_id. Used to indicate invalid mode.
|
||||
*/
|
||||
|
|
@ -2229,9 +2229,9 @@ enum {
|
|||
#define WMI_VDEV_SLOT_TIME_LONG 0x1
|
||||
/* slot time short */
|
||||
#define WMI_VDEV_SLOT_TIME_SHORT 0x2
|
||||
/* preablbe long */
|
||||
/* preamble long */
|
||||
#define WMI_VDEV_PREAMBLE_LONG 0x1
|
||||
/* preablbe short */
|
||||
/* preamble short */
|
||||
#define WMI_VDEV_PREAMBLE_SHORT 0x2
|
||||
|
||||
enum wmi_peer_smps_state {
|
||||
|
|
@ -4220,7 +4220,7 @@ enum wmi_vdev_start_resp_status_code {
|
|||
WMI_VDEV_START_RESPONSE_INVALID_REGDOMAIN = 4,
|
||||
};
|
||||
|
||||
/* Regaulatory Rule Flags Passed by FW */
|
||||
/* Regulatory Rule Flags Passed by FW */
|
||||
#define REGULATORY_CHAN_DISABLED BIT(0)
|
||||
#define REGULATORY_CHAN_NO_IR BIT(1)
|
||||
#define REGULATORY_CHAN_RADAR BIT(3)
|
||||
|
|
@ -6626,7 +6626,7 @@ struct qmi_wlanfw_host_cap_req_msg_v01 {
|
|||
uint8_t mem_cfg_mode_valid;
|
||||
uint8_t mem_cfg_mode;
|
||||
uint8_t cal_duration_valid;
|
||||
uint16_t cal_duraiton;
|
||||
uint16_t cal_duration;
|
||||
uint8_t platform_name_valid;
|
||||
char platform_name[QMI_WLANFW_MAX_PLATFORM_NAME_LEN_V01 + 1];
|
||||
uint8_t ddr_range_valid;
|
||||
|
|
@ -8481,7 +8481,7 @@ struct ath12k_hal_reo_dest_ring {
|
|||
* and the MPDU was processed in the following way:
|
||||
* - NO re-order function is needed.
|
||||
* - MPDU delinking is determined by the setting of Entrance
|
||||
* ring field: SW_excection_mpdu_delink
|
||||
* ring field: SW_exception_mpdu_delink
|
||||
* - Destination ring selection is based on the setting of
|
||||
* the Entrance ring field SW_exception_destination _ring_valid
|
||||
*
|
||||
|
|
@ -8633,7 +8633,7 @@ struct hal_reo_cmd_hdr {
|
|||
#define HAL_REO_CMD_FLG_UNBLK_RESOURCE BIT(7)
|
||||
#define HAL_REO_CMD_FLG_UNBLK_CACHE BIT(8)
|
||||
|
||||
/* Should be matching with HAL_REO_UPD_RX_QUEUE_INFO0_UPD_* feilds */
|
||||
/* Should be matching with HAL_REO_UPD_RX_QUEUE_INFO0_UPD_* fields */
|
||||
#define HAL_REO_CMD_UPD0_RX_QUEUE_NUM BIT(8)
|
||||
#define HAL_REO_CMD_UPD0_VLD BIT(9)
|
||||
#define HAL_REO_CMD_UPD0_ALDC BIT(10)
|
||||
|
|
@ -8658,7 +8658,7 @@ struct hal_reo_cmd_hdr {
|
|||
#define HAL_REO_CMD_UPD0_PN_VALID BIT(29)
|
||||
#define HAL_REO_CMD_UPD0_PN BIT(30)
|
||||
|
||||
/* Should be matching with HAL_REO_UPD_RX_QUEUE_INFO1_* feilds */
|
||||
/* Should be matching with HAL_REO_UPD_RX_QUEUE_INFO1_* fields */
|
||||
#define HAL_REO_CMD_UPD1_VLD BIT(16)
|
||||
#define HAL_REO_CMD_UPD1_ALDC GENMASK(18, 17)
|
||||
#define HAL_REO_CMD_UPD1_DIS_DUP_DETECTION BIT(19)
|
||||
|
|
@ -8674,7 +8674,7 @@ struct hal_reo_cmd_hdr {
|
|||
#define HAL_REO_CMD_UPD1_PN_HANDLE_ENABLE BIT(30)
|
||||
#define HAL_REO_CMD_UPD1_IGNORE_AMPDU_FLG BIT(31)
|
||||
|
||||
/* Should be matching with HAL_REO_UPD_RX_QUEUE_INFO2_* feilds */
|
||||
/* Should be matching with HAL_REO_UPD_RX_QUEUE_INFO2_* fields */
|
||||
#define HAL_REO_CMD_UPD2_SVLD BIT(10)
|
||||
#define HAL_REO_CMD_UPD2_SSN GENMASK(22, 11)
|
||||
#define HAL_REO_CMD_UPD2_SEQ_2K_ERR BIT(23)
|
||||
|
|
@ -11108,7 +11108,7 @@ struct rx_attention {
|
|||
* msdu_limit_error
|
||||
* Indicates that the MSDU threshold was exceeded and thus
|
||||
* all the rest of the MSDUs will not be scattered and will not
|
||||
* be decasulated but will be DMA'ed in RAW format as a single
|
||||
* be decapsulated but will be DMA'ed in RAW format as a single
|
||||
* MSDU buffer.
|
||||
*
|
||||
* da_is_valid
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $OpenBSD: r92creg.h,v 1.30 2023/04/28 01:24:14 kevlo Exp $ */
|
||||
/* $OpenBSD: r92creg.h,v 1.31 2024/09/01 03:14:48 jsg Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr>
|
||||
|
|
@ -1259,7 +1259,7 @@ struct r92c_rom {
|
|||
uint8_t rf_opt4;
|
||||
uint8_t reserved5;
|
||||
uint8_t version;
|
||||
uint8_t curstomer_id;
|
||||
uint8_t customer_id;
|
||||
} __packed;
|
||||
|
||||
struct r92e_tx_pwr {
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $OpenBSD: siop_common.c,v 1.45 2024/04/13 23:44:11 jsg Exp $ */
|
||||
/* $OpenBSD: siop_common.c,v 1.46 2024/09/01 03:08:56 jsg Exp $ */
|
||||
/* $NetBSD: siop_common.c,v 1.37 2005/02/27 00:27:02 perry Exp $ */
|
||||
|
||||
/*
|
||||
|
|
@ -784,7 +784,7 @@ siop_sdp(struct siop_common_cmd *siop_cmd, int offset)
|
|||
|
||||
/*
|
||||
* First let see if we have a resid from a phase mismatch. If so,
|
||||
* we have to adjst the table at offset to remove transferred data.
|
||||
* we have to adjust the table at offset to remove transferred data.
|
||||
*/
|
||||
if (siop_cmd->flags & CMDFL_RESID) {
|
||||
siop_cmd->flags &= ~CMDFL_RESID;
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $OpenBSD: w83l518d_sdmmc.c,v 1.5 2020/01/22 03:26:02 cheloha Exp $ */
|
||||
/* $OpenBSD: w83l518d_sdmmc.c,v 1.6 2024/09/01 03:08:56 jsg Exp $ */
|
||||
/* $NetBSD: w83l518d_sdmmc.c,v 1.1 2009/09/30 20:44:50 jmcneill Exp $ */
|
||||
|
||||
/*
|
||||
|
|
@ -75,7 +75,7 @@ void wb_sdmmc_card_intr_ack(sdmmc_chipset_handle_t);
|
|||
struct sdmmc_chip_functions wb_sdmmc_chip_functions = {
|
||||
/* host controller reset */
|
||||
wb_sdmmc_host_reset,
|
||||
/* host controlle capabilities */
|
||||
/* host controller capabilities */
|
||||
wb_sdmmc_host_ocr,
|
||||
wb_sdmmc_host_maxblklen,
|
||||
/* card detection */
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $OpenBSD: ahd_pci.c,v 1.29 2022/10/21 17:45:40 kn Exp $ */
|
||||
/* $OpenBSD: ahd_pci.c,v 1.30 2024/09/01 03:08:56 jsg Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2004 Milos Urbanek, Kenneth R. Westerback & Marco Peereboom
|
||||
|
|
@ -649,7 +649,7 @@ fail:
|
|||
|
||||
/*
|
||||
* Check the external port logic for a serial eeprom
|
||||
* and termination/cable detection contrls.
|
||||
* and termination/cable detection controls.
|
||||
*/
|
||||
int
|
||||
ahd_check_extport(struct ahd_softc *ahd)
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $OpenBSD: cs4280.c,v 1.62 2024/08/18 14:42:56 deraadt Exp $ */
|
||||
/* $OpenBSD: cs4280.c,v 1.63 2024/09/01 03:08:56 jsg Exp $ */
|
||||
/* $NetBSD: cs4280.c,v 1.5 2000/06/26 04:56:23 simonb Exp $ */
|
||||
|
||||
/*
|
||||
|
|
@ -470,7 +470,7 @@ cs4280_set_dac_rate(struct cs4280_softc *sc, int rate)
|
|||
* playback rate may range from 8000Hz to 48000Hz
|
||||
*
|
||||
* play_phase_increment = floor(rate*65536*1024/48000)
|
||||
* px = round(rate*65536*1024 - play_phase_incremnt*48000)
|
||||
* px = round(rate*65536*1024 - play_phase_increment*48000)
|
||||
* py=floor(px/200)
|
||||
* play_sample_rate_correction = px - 200*py
|
||||
*
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $OpenBSD: eap.c,v 1.65 2024/05/24 06:02:53 jsg Exp $ */
|
||||
/* $OpenBSD: eap.c,v 1.66 2024/09/01 03:08:56 jsg Exp $ */
|
||||
/* $NetBSD: eap.c,v 1.46 2001/09/03 15:07:37 reinoud Exp $ */
|
||||
|
||||
/*
|
||||
|
|
@ -521,7 +521,7 @@ eap_attach(struct device *parent, struct device *self, void *aux)
|
|||
* or it locks up.
|
||||
*
|
||||
* We don't know how to program it (no documentation),
|
||||
* and the linux/oss magic receipe doesn't work (breaks
|
||||
* and the linux/oss magic recipe doesn't work (breaks
|
||||
* full-duplex, by selecting different play and record
|
||||
* rates). On the other hand, the sample rate converter
|
||||
* can't be disabled (disabling it would disable DMA),
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $OpenBSD: gdt_pci.c,v 1.28 2024/05/24 06:02:53 jsg Exp $ */
|
||||
/* $OpenBSD: gdt_pci.c,v 1.29 2024/09/01 03:08:56 jsg Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1999, 2000 Niklas Hallqvist. All rights reserved.
|
||||
|
|
@ -493,7 +493,7 @@ gdt_pci_attach(struct device *parent, struct device *self, void *aux)
|
|||
goto bail_out;
|
||||
}
|
||||
|
||||
/* special commnd to controller BIOS */
|
||||
/* special command to controller BIOS */
|
||||
bus_space_write_4(dpmemt, dpmemh, GDT_MPR_IC + GDT_S_INFO, 0);
|
||||
bus_space_write_4(dpmemt, dpmemh,
|
||||
GDT_MPR_IC + GDT_S_INFO + sizeof (u_int32_t), 0);
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $OpenBSD: if_bnxreg.h,v 1.50 2022/01/09 05:42:47 jsg Exp $ */
|
||||
/* $OpenBSD: if_bnxreg.h,v 1.51 2024/09/01 03:14:48 jsg Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2006 Broadcom Corporation
|
||||
|
|
@ -171,7 +171,7 @@
|
|||
/* Returns FALSE in "defects" per 2^31 - 1 calls, otherwise returns TRUE. */
|
||||
#define DB_RANDOMFALSE(defects) (random() > defects)
|
||||
#define DB_OR_RANDOMFALSE(defects) || (random() > defects)
|
||||
#define DB_AND_RANDOMFALSE(defects) && (random() > ddfects)
|
||||
#define DB_AND_RANDOMFALSE(defects) && (random() > defects)
|
||||
|
||||
/* Returns TRUE in "defects" per 2^31 - 1 calls, otherwise returns FALSE. */
|
||||
#define DB_RANDOMTRUE(defects) (random() < defects)
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $OpenBSD: if_bnxtreg.h,v 1.5 2022/01/28 07:11:14 guenther Exp $ */
|
||||
/* $OpenBSD: if_bnxtreg.h,v 1.6 2024/09/01 03:08:56 jsg Exp $ */
|
||||
/*-
|
||||
* BSD LICENSE
|
||||
*
|
||||
|
|
@ -8701,7 +8701,7 @@ struct hwrm_port_phy_cfg_input {
|
|||
uint32_t tx_lpi_timer;
|
||||
uint32_t unused_4;
|
||||
/*
|
||||
* Reuested setting of TX LPI timer in microseconds. This field is valid
|
||||
* Requested setting of TX LPI timer in microseconds. This field is valid
|
||||
* only when EEE is enabled and TX LPI is enabled.
|
||||
*/
|
||||
#define HWRM_PORT_PHY_CFG_INPUT_TX_LPI_TIMER_MASK UINT32_C(0xffffff)
|
||||
|
|
@ -23260,7 +23260,7 @@ struct hwrm_nvm_raw_write_blk_input {
|
|||
*/
|
||||
uint64_t host_src_addr;
|
||||
/*
|
||||
* 64-bit Host Source Address. This is the loation of the source data to
|
||||
* 64-bit Host Source Address. This is the location of the source data to
|
||||
* be written.
|
||||
*/
|
||||
uint32_t dest_addr;
|
||||
|
|
@ -27747,7 +27747,7 @@ struct creq_destroy_cq_resp {
|
|||
uint16_t cq_arm_lvl;
|
||||
/*
|
||||
* CQ ARM Level: 0 ? Not Armed 1 ? Arm SE Only, Generate CNQE only for
|
||||
* incoming Solicted Events 2 ? Arm all, Generate CNQE for Rx and Tx
|
||||
* incoming Solicited Events 2 ? Arm all, Generate CNQE for Rx and Tx
|
||||
*/
|
||||
#define CREQ_DESTROY_CQ_RESP_CQ_ARM_LVL_MASK UINT32_C(0x3)
|
||||
#define CREQ_DESTROY_CQ_RESP_CQ_ARM_LVL_SFT 0
|
||||
|
|
|
|||
|
|
@ -31,7 +31,7 @@
|
|||
|
||||
*******************************************************************************/
|
||||
|
||||
/* $OpenBSD: if_em_hw.h,v 1.95 2024/06/09 05:18:12 jsg Exp $ */
|
||||
/* $OpenBSD: if_em_hw.h,v 1.96 2024/09/01 03:08:56 jsg Exp $ */
|
||||
/* $FreeBSD: if_em_hw.h,v 1.15 2005/05/26 23:32:02 tackerman Exp $ */
|
||||
|
||||
/* if_em_hw.h
|
||||
|
|
@ -2436,7 +2436,7 @@ struct em_host_command_info {
|
|||
#define EEPROM_WRITE_OPCODE_MICROWIRE 0x5 /* EEPROM write opcode */
|
||||
#define EEPROM_ERASE_OPCODE_MICROWIRE 0x7 /* EEPROM erase opcode */
|
||||
#define EEPROM_EWEN_OPCODE_MICROWIRE 0x13 /* EEPROM erase/write enable */
|
||||
#define EEPROM_EWDS_OPCODE_MICROWIRE 0x10 /* EEPROM erast/write disable */
|
||||
#define EEPROM_EWDS_OPCODE_MICROWIRE 0x10 /* EEPROM erase/write disable */
|
||||
|
||||
/* EEPROM Commands - SPI */
|
||||
#define EEPROM_MAX_RETRY_SPI 5000 /* Max wait of 5ms, for RDY signal */
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $OpenBSD: if_iwm.c,v 1.416 2024/05/24 06:02:53 jsg Exp $ */
|
||||
/* $OpenBSD: if_iwm.c,v 1.417 2024/09/01 03:08:59 jsg Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2014, 2016 genua gmbh <info@genua.de>
|
||||
|
|
@ -9238,7 +9238,7 @@ iwm_calib_timeout(void *arg)
|
|||
ieee80211_amrr_choose(&sc->sc_amrr, &in->in_ni, &in->in_amn);
|
||||
/*
|
||||
* If AMRR has chosen a new TX rate we must update
|
||||
* the firwmare's LQ rate table.
|
||||
* the firmware's LQ rate table.
|
||||
* ni_txrate may change again before the task runs so
|
||||
* cache the chosen rate in the iwm_node structure.
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $OpenBSD: if_iwmreg.h,v 1.69 2024/01/16 12:21:02 kevlo Exp $ */
|
||||
/* $OpenBSD: if_iwmreg.h,v 1.70 2024/09/01 03:08:59 jsg Exp $ */
|
||||
|
||||
/******************************************************************************
|
||||
*
|
||||
|
|
@ -1762,7 +1762,7 @@ static inline unsigned int IWM_FH_MEM_CBBC_QUEUE(unsigned int chnl)
|
|||
#define IWM_RX_LOW_WATERMARK 8
|
||||
|
||||
/**
|
||||
* struct iwm_rb_status - reseve buffer status
|
||||
* struct iwm_rb_status - reserve buffer status
|
||||
* host memory mapped FH registers
|
||||
* @closed_rb_num [0:11] - Indicates the index of the RB which was closed
|
||||
* @closed_fr_num [0:11] - Indicates the index of the RX Frame which was closed
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $OpenBSD: if_ngbereg.h,v 1.1 2023/03/31 08:19:41 kevlo Exp $ */
|
||||
/* $OpenBSD: if_ngbereg.h,v 1.2 2024/09/01 03:08:59 jsg Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2015-2017 Beijing WangXun Technology Co., Ltd.
|
||||
|
|
@ -160,7 +160,7 @@
|
|||
#define NGBE_PSR_MAX_SZ 0x15020
|
||||
#define NGBE_PSR_VLAN_CTL 0x15088
|
||||
|
||||
/* mcasst/ucast overflow tbl */
|
||||
/* mcast/ucast overflow tbl */
|
||||
#define NGBE_PSR_MC_TBL(_i) (0x15200 + ((_i) * 4))
|
||||
#define NGBE_PSR_UC_TBL(_i) (0x15400 + ((_i) * 4))
|
||||
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $OpenBSD: if_skreg.h,v 1.64 2022/02/21 07:15:42 jsg Exp $ */
|
||||
/* $OpenBSD: if_skreg.h,v 1.65 2024/09/01 03:08:59 jsg Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1997, 1998, 1999, 2000
|
||||
|
|
@ -1761,16 +1761,16 @@ struct msk_status_desc {
|
|||
/* Source Address High #2 (SAH2) */
|
||||
#define YUKON_SAH2 0x0030 /* SA2[47:32] */
|
||||
|
||||
/* Multicatst Address Hash Register 1 (MCAH1) */
|
||||
/* Multicast Address Hash Register 1 (MCAH1) */
|
||||
#define YUKON_MCAH1 0x0034
|
||||
|
||||
/* Multicatst Address Hash Register 2 (MCAH2) */
|
||||
/* Multicast Address Hash Register 2 (MCAH2) */
|
||||
#define YUKON_MCAH2 0x0038
|
||||
|
||||
/* Multicatst Address Hash Register 3 (MCAH3) */
|
||||
/* Multicast Address Hash Register 3 (MCAH3) */
|
||||
#define YUKON_MCAH3 0x003c
|
||||
|
||||
/* Multicatst Address Hash Register 4 (MCAH4) */
|
||||
/* Multicast Address Hash Register 4 (MCAH4) */
|
||||
#define YUKON_MCAH4 0x0040
|
||||
|
||||
/* Transmit Interrupt Register (TIR) */
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $OpenBSD: if_vmx.c,v 1.88 2024/06/17 11:13:43 bluhm Exp $ */
|
||||
/* $OpenBSD: if_vmx.c,v 1.89 2024/09/01 03:08:59 jsg Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2013 Tsubai Masanari
|
||||
|
|
@ -1135,7 +1135,7 @@ vmxnet3_rxintr(struct vmxnet3_softc *sc, struct vmxnet3_rxqueue *rq)
|
|||
done[rid]++;
|
||||
|
||||
/*
|
||||
* A receive descriptor of type 4 which is flaged as start of
|
||||
* A receive descriptor of type 4 which is flagged as start of
|
||||
* packet, contains the number of TCP segment of an LRO packet.
|
||||
*/
|
||||
if (letoh32((rxcd->rxc_word3 & VMXNET3_RXC_TYPE_M) >>
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $OpenBSD: igc_i225.c,v 1.4 2023/02/03 11:31:52 mbuhl Exp $ */
|
||||
/* $OpenBSD: igc_i225.c,v 1.5 2024/09/01 03:08:59 jsg Exp $ */
|
||||
/*-
|
||||
* Copyright 2021 Intel Corp
|
||||
* Copyright 2021 Rubicon Communications, LLC (Netgate)
|
||||
|
|
@ -763,7 +763,7 @@ igc_write_erase_flash_command_i225(struct igc_hw *hw, uint32_t opcode,
|
|||
/* igc_update_flash_i225 - Commit EEPROM to the flash
|
||||
* if fw_valid_bit is set, FW is active. setting FLUPD bit in EEC
|
||||
* register makes the FW load the internal shadow RAM into the flash.
|
||||
* Otherwise, fw_valid_bit is 0. if FL_SECU.block_prtotected_sw = 0
|
||||
* Otherwise, fw_valid_bit is 0. if FL_SECU.block_protected_sw = 0
|
||||
* then FW is not active so the SW is responsible shadow RAM dump.
|
||||
*
|
||||
* @hw: pointer to the HW structure
|
||||
|
|
|
|||
|
|
@ -31,7 +31,7 @@
|
|||
|
||||
*******************************************************************************/
|
||||
|
||||
/* $OpenBSD: ixgb_ee.c,v 1.9 2024/05/24 06:02:57 jsg Exp $ */
|
||||
/* $OpenBSD: ixgb_ee.c,v 1.10 2024/09/01 03:08:59 jsg Exp $ */
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
|
|
@ -219,7 +219,7 @@ ixgb_standby_eeprom(struct ixgb_hw *hw)
|
|||
|
||||
eecd_reg = IXGB_READ_REG(hw, EECD);
|
||||
|
||||
/* Deselct EEPROM */
|
||||
/* Deselect EEPROM */
|
||||
eecd_reg &= ~(IXGB_EECD_CS | IXGB_EECD_SK);
|
||||
IXGB_WRITE_REG(hw, EECD, eecd_reg);
|
||||
usec_delay(50);
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $OpenBSD: ixgbe_x550.c,v 1.9 2024/05/13 01:15:51 jsg Exp $ */
|
||||
/* $OpenBSD: ixgbe_x550.c,v 1.10 2024/09/01 03:09:00 jsg Exp $ */
|
||||
|
||||
/******************************************************************************
|
||||
|
||||
|
|
@ -1764,12 +1764,12 @@ int32_t ixgbe_get_link_capabilities_X550em(struct ixgbe_hw *hw,
|
|||
}
|
||||
|
||||
/**
|
||||
* ixgbe_get_lasi_ext_t_x550em - Determime external Base T PHY interrupt cause
|
||||
* ixgbe_get_lasi_ext_t_x550em - Determine external Base T PHY interrupt cause
|
||||
* @hw: pointer to hardware structure
|
||||
* @lsc: pointer to boolean flag which indicates whether external Base T
|
||||
* PHY interrupt is lsc
|
||||
*
|
||||
* Determime if external Base T PHY interrupt cause is high temperature
|
||||
* Determine if external Base T PHY interrupt cause is high temperature
|
||||
* failure alarm or link status change.
|
||||
*
|
||||
* Return IXGBE_ERR_OVERTEMP if interrupt is high temperature
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
$OpenBSD: pcidevs,v 1.2085 2024/08/20 12:17:48 jsg Exp $
|
||||
$OpenBSD: pcidevs,v 1.2087 2024/09/02 03:59:40 yasuoka Exp $
|
||||
/* $NetBSD: pcidevs,v 1.30 1997/06/24 06:20:24 thorpej Exp $ */
|
||||
|
||||
/*
|
||||
|
|
@ -2295,7 +2295,7 @@ product ATI RV630_5 0x958f RV630
|
|||
product ATI RADEON_HD3600 0x9590 Radeon HD 3600
|
||||
product ATI RADEON_HD3650_M 0x9591 Mobility Radeon HD 3650
|
||||
product ATI RADEON_HD3670_M 0x9593 Mobility Radeon HD 3670
|
||||
product ATI FIREGL_V5700_M 0x9595 Mobilty FireGL V5700
|
||||
product ATI FIREGL_V5700_M 0x9595 Mobility FireGL V5700
|
||||
product ATI RADEON_HD3650_AGP 0x9596 Radeon HD 3650 AGP
|
||||
product ATI RV635_1 0x9597 RV635
|
||||
product ATI RADEON_HD3650 0x9598 Radeon HD 3650
|
||||
|
|
@ -2833,7 +2833,7 @@ product CMI CMI8738B 0x0112 CMI8738B Audio
|
|||
product CMI HSP56 0x0211 HSP56 AMR
|
||||
product CMI CMI8788 0x8788 CMI8788 HD Audio
|
||||
|
||||
/* CNet produts */
|
||||
/* CNet products */
|
||||
product CNET GIGACARD 0x434e GigaCard
|
||||
|
||||
/* Cogent Data Technologies products */
|
||||
|
|
@ -4099,6 +4099,7 @@ product INTEL 82580_SERDES 0x1510 82580
|
|||
product INTEL 82580_SGMII 0x1511 82580
|
||||
product INTEL 82524EF 0x1513 82524EF Thunderbolt
|
||||
product INTEL 82599_KX4_MEZZ 0x1514 82599
|
||||
product INTEL X540_VF 0x1515 X540 VF
|
||||
product INTEL 82580_COPPER_DUAL 0x1516 82580
|
||||
product INTEL 82599_KR 0x1517 82599
|
||||
product INTEL 82576_NS_SERDES 0x1518 82576NS
|
||||
|
|
@ -4113,6 +4114,8 @@ product INTEL 82580_QUAD_FIBER 0x1527 82580 QF
|
|||
product INTEL X540T 0x1528 X540T
|
||||
product INTEL 82599_SFP_FCOE 0x1529 82599
|
||||
product INTEL 82599_BPLANE_FCOE 0x152a 82599
|
||||
product INTEL 82599_VF_HV 0x152e 82599 VF HV
|
||||
product INTEL X540_VF_HV 0x1530 X540 VF HV
|
||||
product INTEL I210_COPPER 0x1533 I210
|
||||
product INTEL I210_COPPER_OEM1 0x1534 I210
|
||||
product INTEL I210_COPPER_IT 0x1535 I210
|
||||
|
|
@ -4133,6 +4136,8 @@ product INTEL I218_V 0x1559 I218-V
|
|||
product INTEL I218_LM 0x155a I218-LM
|
||||
product INTEL X540T1 0x1560 X540T
|
||||
product INTEL X550T 0x1563 X550T
|
||||
product INTEL X550_VF_HV 0x1564 X550 VF HV
|
||||
product INTEL X550_VF 0x1565 X550 VF
|
||||
product INTEL DSL5520 0x156c DSL5520 Thunderbolt
|
||||
product INTEL DSL5520_PCIE 0x156d DSL5520 Thunderbolt
|
||||
product INTEL I219_LM 0x156f I219-LM
|
||||
|
|
@ -4156,11 +4161,14 @@ product INTEL I218_LM_2 0x15a0 I218-LM
|
|||
product INTEL I218_V_2 0x15a1 I218-V
|
||||
product INTEL I218_LM_3 0x15a2 I218-LM
|
||||
product INTEL I218_V_3 0x15a3 I218-V
|
||||
product INTEL X550EM_X_VF 0x15a8 X552 VF
|
||||
product INTEL X550EM_X_VF_HV 0x15a9 X552 VF HV
|
||||
product INTEL X550EM_X_KX4 0x15aa X552 Backplane
|
||||
product INTEL X550EM_X_KR 0x15ab X552 Backplane
|
||||
product INTEL X550EM_X_SFP 0x15ac X552 SFP+
|
||||
product INTEL X550EM_X_10G_T 0x15ad X552/X557-AT
|
||||
product INTEL X550EM_X_1G_T 0x15ae X552 1GbaseT
|
||||
product INTEL X550EM_A_VF_HV 0x15b4 X553 VF HV
|
||||
product INTEL I219_LM2 0x15b7 I219-LM
|
||||
product INTEL I219_V2 0x15b8 I219-V
|
||||
product INTEL I219_LM3 0x15b9 I219-LM
|
||||
|
|
@ -4174,6 +4182,7 @@ product INTEL JHL6240_XHCI 0x15c1 JHL6240 Thunderbolt 3
|
|||
product INTEL X550EM_A_KR 0x15c2 X553 Backplane
|
||||
product INTEL X550EM_A_KR_L 0x15c3 X553 Backplane
|
||||
product INTEL X550EM_A_SFP_N 0x15c4 X553 SFP+
|
||||
product INTEL X550EM_A_VF 0x15c5 X553 VF
|
||||
product INTEL X550EM_A_SGMII 0x15c6 X553 SGMII
|
||||
product INTEL X550EM_A_SGMII_L 0x15c7 X553 SGMII
|
||||
product INTEL X550EM_A_10G_T 0x15c8 X553 10GBaseT
|
||||
|
|
|
|||
|
|
@ -2,7 +2,7 @@
|
|||
* THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT.
|
||||
*
|
||||
* generated from:
|
||||
* OpenBSD: pcidevs,v 1.2085 2024/08/20 12:17:48 jsg Exp
|
||||
* OpenBSD: pcidevs,v 1.2087 2024/09/02 03:59:40 yasuoka Exp
|
||||
*/
|
||||
/* $NetBSD: pcidevs,v 1.30 1997/06/24 06:20:24 thorpej Exp $ */
|
||||
|
||||
|
|
@ -2300,7 +2300,7 @@
|
|||
#define PCI_PRODUCT_ATI_RADEON_HD3600 0x9590 /* Radeon HD 3600 */
|
||||
#define PCI_PRODUCT_ATI_RADEON_HD3650_M 0x9591 /* Mobility Radeon HD 3650 */
|
||||
#define PCI_PRODUCT_ATI_RADEON_HD3670_M 0x9593 /* Mobility Radeon HD 3670 */
|
||||
#define PCI_PRODUCT_ATI_FIREGL_V5700_M 0x9595 /* Mobilty FireGL V5700 */
|
||||
#define PCI_PRODUCT_ATI_FIREGL_V5700_M 0x9595 /* Mobility FireGL V5700 */
|
||||
#define PCI_PRODUCT_ATI_RADEON_HD3650_AGP 0x9596 /* Radeon HD 3650 AGP */
|
||||
#define PCI_PRODUCT_ATI_RV635_1 0x9597 /* RV635 */
|
||||
#define PCI_PRODUCT_ATI_RADEON_HD3650 0x9598 /* Radeon HD 3650 */
|
||||
|
|
@ -2838,7 +2838,7 @@
|
|||
#define PCI_PRODUCT_CMI_HSP56 0x0211 /* HSP56 AMR */
|
||||
#define PCI_PRODUCT_CMI_CMI8788 0x8788 /* CMI8788 HD Audio */
|
||||
|
||||
/* CNet produts */
|
||||
/* CNet products */
|
||||
#define PCI_PRODUCT_CNET_GIGACARD 0x434e /* GigaCard */
|
||||
|
||||
/* Cogent Data Technologies products */
|
||||
|
|
@ -4104,6 +4104,7 @@
|
|||
#define PCI_PRODUCT_INTEL_82580_SGMII 0x1511 /* 82580 */
|
||||
#define PCI_PRODUCT_INTEL_82524EF 0x1513 /* 82524EF Thunderbolt */
|
||||
#define PCI_PRODUCT_INTEL_82599_KX4_MEZZ 0x1514 /* 82599 */
|
||||
#define PCI_PRODUCT_INTEL_X540_VF 0x1515 /* X540 VF */
|
||||
#define PCI_PRODUCT_INTEL_82580_COPPER_DUAL 0x1516 /* 82580 */
|
||||
#define PCI_PRODUCT_INTEL_82599_KR 0x1517 /* 82599 */
|
||||
#define PCI_PRODUCT_INTEL_82576_NS_SERDES 0x1518 /* 82576NS */
|
||||
|
|
@ -4118,6 +4119,8 @@
|
|||
#define PCI_PRODUCT_INTEL_X540T 0x1528 /* X540T */
|
||||
#define PCI_PRODUCT_INTEL_82599_SFP_FCOE 0x1529 /* 82599 */
|
||||
#define PCI_PRODUCT_INTEL_82599_BPLANE_FCOE 0x152a /* 82599 */
|
||||
#define PCI_PRODUCT_INTEL_82599_VF_HV 0x152e /* 82599 VF HV */
|
||||
#define PCI_PRODUCT_INTEL_X540_VF_HV 0x1530 /* X540 VF HV */
|
||||
#define PCI_PRODUCT_INTEL_I210_COPPER 0x1533 /* I210 */
|
||||
#define PCI_PRODUCT_INTEL_I210_COPPER_OEM1 0x1534 /* I210 */
|
||||
#define PCI_PRODUCT_INTEL_I210_COPPER_IT 0x1535 /* I210 */
|
||||
|
|
@ -4138,6 +4141,8 @@
|
|||
#define PCI_PRODUCT_INTEL_I218_LM 0x155a /* I218-LM */
|
||||
#define PCI_PRODUCT_INTEL_X540T1 0x1560 /* X540T */
|
||||
#define PCI_PRODUCT_INTEL_X550T 0x1563 /* X550T */
|
||||
#define PCI_PRODUCT_INTEL_X550_VF_HV 0x1564 /* X550 VF HV */
|
||||
#define PCI_PRODUCT_INTEL_X550_VF 0x1565 /* X550 VF */
|
||||
#define PCI_PRODUCT_INTEL_DSL5520 0x156c /* DSL5520 Thunderbolt */
|
||||
#define PCI_PRODUCT_INTEL_DSL5520_PCIE 0x156d /* DSL5520 Thunderbolt */
|
||||
#define PCI_PRODUCT_INTEL_I219_LM 0x156f /* I219-LM */
|
||||
|
|
@ -4161,11 +4166,14 @@
|
|||
#define PCI_PRODUCT_INTEL_I218_V_2 0x15a1 /* I218-V */
|
||||
#define PCI_PRODUCT_INTEL_I218_LM_3 0x15a2 /* I218-LM */
|
||||
#define PCI_PRODUCT_INTEL_I218_V_3 0x15a3 /* I218-V */
|
||||
#define PCI_PRODUCT_INTEL_X550EM_X_VF 0x15a8 /* X552 VF */
|
||||
#define PCI_PRODUCT_INTEL_X550EM_X_VF_HV 0x15a9 /* X552 VF HV */
|
||||
#define PCI_PRODUCT_INTEL_X550EM_X_KX4 0x15aa /* X552 Backplane */
|
||||
#define PCI_PRODUCT_INTEL_X550EM_X_KR 0x15ab /* X552 Backplane */
|
||||
#define PCI_PRODUCT_INTEL_X550EM_X_SFP 0x15ac /* X552 SFP+ */
|
||||
#define PCI_PRODUCT_INTEL_X550EM_X_10G_T 0x15ad /* X552/X557-AT */
|
||||
#define PCI_PRODUCT_INTEL_X550EM_X_1G_T 0x15ae /* X552 1GbaseT */
|
||||
#define PCI_PRODUCT_INTEL_X550EM_A_VF_HV 0x15b4 /* X553 VF HV */
|
||||
#define PCI_PRODUCT_INTEL_I219_LM2 0x15b7 /* I219-LM */
|
||||
#define PCI_PRODUCT_INTEL_I219_V2 0x15b8 /* I219-V */
|
||||
#define PCI_PRODUCT_INTEL_I219_LM3 0x15b9 /* I219-LM */
|
||||
|
|
@ -4179,6 +4187,7 @@
|
|||
#define PCI_PRODUCT_INTEL_X550EM_A_KR 0x15c2 /* X553 Backplane */
|
||||
#define PCI_PRODUCT_INTEL_X550EM_A_KR_L 0x15c3 /* X553 Backplane */
|
||||
#define PCI_PRODUCT_INTEL_X550EM_A_SFP_N 0x15c4 /* X553 SFP+ */
|
||||
#define PCI_PRODUCT_INTEL_X550EM_A_VF 0x15c5 /* X553 VF */
|
||||
#define PCI_PRODUCT_INTEL_X550EM_A_SGMII 0x15c6 /* X553 SGMII */
|
||||
#define PCI_PRODUCT_INTEL_X550EM_A_SGMII_L 0x15c7 /* X553 SGMII */
|
||||
#define PCI_PRODUCT_INTEL_X550EM_A_10G_T 0x15c8 /* X553 10GBaseT */
|
||||
|
|
|
|||
|
|
@ -2,7 +2,7 @@
|
|||
* THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT.
|
||||
*
|
||||
* generated from:
|
||||
* OpenBSD: pcidevs,v 1.2085 2024/08/20 12:17:48 jsg Exp
|
||||
* OpenBSD: pcidevs,v 1.2087 2024/09/02 03:59:40 yasuoka Exp
|
||||
*/
|
||||
|
||||
/* $NetBSD: pcidevs,v 1.30 1997/06/24 06:20:24 thorpej Exp $ */
|
||||
|
|
@ -7309,7 +7309,7 @@ static const struct pci_known_product pci_known_products[] = {
|
|||
},
|
||||
{
|
||||
PCI_VENDOR_ATI, PCI_PRODUCT_ATI_FIREGL_V5700_M,
|
||||
"Mobilty FireGL V5700",
|
||||
"Mobility FireGL V5700",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD3650_AGP,
|
||||
|
|
@ -13743,6 +13743,10 @@ static const struct pci_known_product pci_known_products[] = {
|
|||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82599_KX4_MEZZ,
|
||||
"82599",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X540_VF,
|
||||
"X540 VF",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82580_COPPER_DUAL,
|
||||
"82580",
|
||||
|
|
@ -13799,6 +13803,14 @@ static const struct pci_known_product pci_known_products[] = {
|
|||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82599_BPLANE_FCOE,
|
||||
"82599",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82599_VF_HV,
|
||||
"82599 VF HV",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X540_VF_HV,
|
||||
"X540 VF HV",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I210_COPPER,
|
||||
"I210",
|
||||
|
|
@ -13879,6 +13891,14 @@ static const struct pci_known_product pci_known_products[] = {
|
|||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X550T,
|
||||
"X550T",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X550_VF_HV,
|
||||
"X550 VF HV",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X550_VF,
|
||||
"X550 VF",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DSL5520,
|
||||
"DSL5520 Thunderbolt",
|
||||
|
|
@ -13971,6 +13991,14 @@ static const struct pci_known_product pci_known_products[] = {
|
|||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I218_V_3,
|
||||
"I218-V",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X550EM_X_VF,
|
||||
"X552 VF",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X550EM_X_VF_HV,
|
||||
"X552 VF HV",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X550EM_X_KX4,
|
||||
"X552 Backplane",
|
||||
|
|
@ -13991,6 +14019,10 @@ static const struct pci_known_product pci_known_products[] = {
|
|||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X550EM_X_1G_T,
|
||||
"X552 1GbaseT",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X550EM_A_VF_HV,
|
||||
"X553 VF HV",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_LM2,
|
||||
"I219-LM",
|
||||
|
|
@ -14043,6 +14075,10 @@ static const struct pci_known_product pci_known_products[] = {
|
|||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X550EM_A_SFP_N,
|
||||
"X553 SFP+",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X550EM_A_VF,
|
||||
"X553 VF",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X550EM_A_SGMII,
|
||||
"X553 SGMII",
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $OpenBSD: pciide_pdc202xx_reg.h,v 1.16 2022/01/09 05:42:58 jsg Exp $ */
|
||||
/* $OpenBSD: pciide_pdc202xx_reg.h,v 1.17 2024/09/01 03:09:00 jsg Exp $ */
|
||||
/* $NetBSD: pciide_pdc202xx_reg.h,v 1.5 2001/07/05 08:38:27 toshii Exp $ */
|
||||
|
||||
/*
|
||||
|
|
@ -101,7 +101,7 @@
|
|||
#define PDC262_ATAPI_LBA48_WRITE 0x06000000
|
||||
|
||||
/*
|
||||
* The timings provided here cmoes from the PDC20262 docs. I hope they are
|
||||
* The timings provided here comes from the PDC20262 docs. I hope they are
|
||||
* right for the PDC20246 too ...
|
||||
*/
|
||||
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $OpenBSD: if_cuereg.h,v 1.12 2013/04/15 09:23:01 mglocker Exp $ */
|
||||
/* $OpenBSD: if_cuereg.h,v 1.13 2024/09/01 03:09:00 jsg Exp $ */
|
||||
/* $NetBSD: if_cuereg.h,v 1.14 2001/01/21 22:09:24 augustss Exp $ */
|
||||
/*
|
||||
* Copyright (c) 1997, 1998, 1999, 2000
|
||||
|
|
@ -76,7 +76,7 @@
|
|||
|
||||
#define CUE_LEDCTL 0x81
|
||||
|
||||
/* Advenced operating mode register */
|
||||
/* Advanced operating mode register */
|
||||
#define CUE_AOP_SRAMWAITS 0x03
|
||||
#define CUE_AOP_EMBED_RXLEN 0x08
|
||||
#define CUE_AOP_RXCOMBINE 0x10
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $OpenBSD: if_urtw.c,v 1.73 2024/05/23 03:21:09 jsg Exp $ */
|
||||
/* $OpenBSD: if_urtw.c,v 1.74 2024/09/01 03:09:00 jsg Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2009 Martynas Venckus <martynas@openbsd.org>
|
||||
|
|
@ -3498,7 +3498,7 @@ urtw_task(void *arg)
|
|||
|
||||
fail:
|
||||
if (error != 0)
|
||||
DPRINTF(("%s: error duing processing RUN state.",
|
||||
DPRINTF(("%s: error processing RUN state.",
|
||||
sc->sc_dev.dv_xname));
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $OpenBSD: if_urtwn.c,v 1.110 2024/05/23 03:21:09 jsg Exp $ */
|
||||
/* $OpenBSD: if_urtwn.c,v 1.111 2024/09/01 03:09:00 jsg Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr>
|
||||
|
|
@ -2494,7 +2494,7 @@ urtwn_burstlen_init(struct urtwn_softc *sc)
|
|||
urtwn_write_1(sc, R92C_USTIME_TSF, 0x28);
|
||||
urtwn_write_1(sc, R88F_USTIME_EDCA, 0x28);
|
||||
|
||||
/* To prevent mac is reseted by bus. */
|
||||
/* To prevent bus resetting the mac. */
|
||||
urtwn_write_1(sc, R92C_RSV_CTRL,
|
||||
urtwn_read_1(sc, R92C_RSV_CTRL) |
|
||||
R92C_RSV_CTRL_R_DIS_PRST_0 | R92C_RSV_CTRL_R_DIS_PRST_1);
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $OpenBSD: uaudio.c,v 1.175 2024/07/23 08:59:21 ratchov Exp $ */
|
||||
/* $OpenBSD: uaudio.c,v 1.176 2024/09/01 03:09:00 jsg Exp $ */
|
||||
/*
|
||||
* Copyright (c) 2018 Alexandre Ratchov <alex@caoua.org>
|
||||
*
|
||||
|
|
@ -1999,7 +1999,7 @@ uaudio_process_header(struct uaudio_softc *sc, struct uaudio_blob *p)
|
|||
/*
|
||||
* Process AC interrupt endpoint descriptor, this is mainly to skip
|
||||
* the descriptor as we use neither of its properties. Our mixer
|
||||
* interface doesn't support unsolicitated state changes, so we've no
|
||||
* interface doesn't support unsolicited state changes, so we've no
|
||||
* use of it yet.
|
||||
*/
|
||||
int
|
||||
|
|
@ -2313,7 +2313,7 @@ uaudio_process_ac(struct uaudio_softc *sc, struct uaudio_blob *p, int ifnum)
|
|||
* to adapt to software's desired rate
|
||||
*
|
||||
*
|
||||
* For usb1.1 ival is cardcoded to 1 for isochronous
|
||||
* For usb1.1 ival is hardcoded to 1 for isochronous
|
||||
* transfers, which means one transfer every ms. I.e one
|
||||
* transfer every frame period.
|
||||
*
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $OpenBSD: uvideo.c,v 1.221 2024/07/20 12:34:52 jsg Exp $ */
|
||||
/* $OpenBSD: uvideo.c,v 1.222 2024/09/01 03:09:00 jsg Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2008 Robert Nagy <robert@openbsd.org>
|
||||
|
|
@ -3810,7 +3810,7 @@ uvideo_ucode_loader_ricoh(struct uvideo_softc *sc)
|
|||
|
||||
/*
|
||||
* The iSight first generation device will first attach as
|
||||
* 0x8300 non-UVC. After the firmware gots uploaded, the device
|
||||
* 0x8300 non-UVC. After the firmware is uploaded, the device
|
||||
* will reset and come back as 0x8501 UVC compatible.
|
||||
*/
|
||||
usbd_status
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue