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5b49f88fed
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4de47ea988
681 changed files with 35748 additions and 35743 deletions
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@ -131,7 +131,7 @@ void ste_init_tx_list(struct ste_softc *);
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#define MII_SET(x) STE_SETBIT1(sc, STE_PHYCTL, x)
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#define MII_CLR(x) STE_CLRBIT1(sc, STE_PHYCTL, x)
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#define MII_CLR(x) STE_CLRBIT1(sc, STE_PHYCTL, x)
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const struct pci_matchid ste_devices[] = {
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{ PCI_VENDOR_DLINK, PCI_PRODUCT_DLINK_DFE550TX },
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@ -205,7 +205,7 @@ ste_mii_readreg(struct ste_softc *sc, struct ste_mii_frame *frame)
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frame->mii_opcode = STE_MII_READOP;
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frame->mii_turnaround = 0;
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frame->mii_data = 0;
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CSR_WRITE_2(sc, STE_PHYCTL, 0);
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/*
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* Turn on data xmit.
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@ -294,7 +294,7 @@ ste_mii_writereg(struct ste_softc *sc, struct ste_mii_frame *frame)
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frame->mii_stdelim = STE_MII_STARTDELIM;
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frame->mii_opcode = STE_MII_WRITEOP;
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frame->mii_turnaround = STE_MII_TURNAROUND;
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/*
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* Turn on data output.
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*/
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@ -385,7 +385,7 @@ ste_miibus_statchg(struct device *self)
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STE_SETBIT4(sc, STE_DMACTL,
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STE_DMACTL_RXDMA_UNSTALL | STE_DMACTL_TXDMA_UNSTALL);
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}
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int
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ste_ifmedia_upd(struct ifnet *ifp)
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{
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@ -483,7 +483,7 @@ ste_read_eeprom(struct ste_softc *sc, caddr_t dest, int off, int cnt, int swap)
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if (swap)
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*ptr = ntohs(word);
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else
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*ptr = word;
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*ptr = word;
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}
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return(err ? 1 : 0);
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@ -666,7 +666,7 @@ ste_rxeof(struct ste_softc *sc)
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continue;
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}
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/* No errors; receive the packet. */
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/* No errors; receive the packet. */
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m = cur_rx->ste_mbuf;
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total_len = cur_rx->ste_ptr->ste_status & STE_RXSTAT_FRAMELEN;
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@ -1138,8 +1138,8 @@ ste_stop(struct ste_softc *sc)
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STE_SETBIT2(sc, STE_DMACTL, STE_DMACTL_TXDMA_STALL);
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STE_SETBIT2(sc, STE_DMACTL, STE_DMACTL_RXDMA_STALL);
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ste_wait(sc);
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/*
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* Try really hard to stop the RX engine or under heavy RX
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/*
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* Try really hard to stop the RX engine or under heavy RX
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* data chip will write into de-allocated memory.
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*/
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ste_reset(sc);
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@ -1261,7 +1261,7 @@ encap_retry:
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if (m != NULL) {
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struct mbuf *mn;
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/*
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* We ran out of segments. We have to recopy this
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* mbuf chain first. Bail out if we can't get the
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@ -1346,7 +1346,7 @@ ste_start(struct ifnet *ifp)
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/* Set TX polling interval to start TX engine */
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CSR_WRITE_1(sc, STE_TX_DMAPOLL_PERIOD, 64);
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STE_SETBIT4(sc, STE_DMACTL, STE_DMACTL_TXDMA_UNSTALL);
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ste_wait(sc);
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}else{
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