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This commit is contained in:
purplerain 2023-09-26 19:52:17 +00:00
parent 5b49f88fed
commit 4de47ea988
Signed by: purplerain
GPG key ID: F42C07F07E2E35B7
681 changed files with 35748 additions and 35743 deletions
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2
sys/dev/fdt/tascodec.c
View file

@ -276,7 +276,7 @@ tascodec_set_port(void *priv, mixer_ctrl_t *mc)
tascodec_write(sc, PWR_CTL, mode);
}
return 0;
}
return EINVAL;

2
sys/dev/i2c/ihidev.c
View file

@ -200,7 +200,7 @@ ihidev_attach(struct device *parent, struct device *self, void *aux)
if (sc->sc_refcnt > 0)
return;
/* power down until we're opened */
if (ihidev_hid_command(sc, I2C_HID_CMD_SET_POWER, &I2C_HID_POWER_OFF)) {
printf("%s: failed to power down\n", sc->sc_dev.dv_xname);

2
sys/dev/ic/bt8xx.h
View file

@ -21,7 +21,7 @@
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Mark Tinguely and Jim Lowe
* 4. The name of the author may not be used to endorse or promote products
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR

16
sys/dev/ic/gem.c
View file

@ -243,7 +243,7 @@ gem_config(struct gem_softc *sc)
mii_flags = MIIF_DOPAUSE;
/*
/*
* Look for an external PHY.
*/
if (sc->sc_mif_config & GEM_MIF_CONFIG_MDI1) {
@ -293,7 +293,7 @@ gem_config(struct gem_softc *sc)
MII_OFFSET_ANY, mii_flags);
}
/*
/*
* Try the external PCS SERDES if we didn't find any MII
* devices.
*/
@ -785,11 +785,11 @@ gem_init(struct ifnet *ifp)
gem_iff(sc);
/* step 6 & 7. Program Descriptor Ring Base Addresses */
bus_space_write_4(t, h, GEM_TX_RING_PTR_HI,
bus_space_write_4(t, h, GEM_TX_RING_PTR_HI,
(((uint64_t)GEM_CDTXADDR(sc,0)) >> 32));
bus_space_write_4(t, h, GEM_TX_RING_PTR_LO, GEM_CDTXADDR(sc, 0));
bus_space_write_4(t, h, GEM_RX_RING_PTR_HI,
bus_space_write_4(t, h, GEM_RX_RING_PTR_HI,
(((uint64_t)GEM_CDRXADDR(sc,0)) >> 32));
bus_space_write_4(t, h, GEM_RX_RING_PTR_LO, GEM_CDRXADDR(sc, 0));
@ -820,7 +820,7 @@ gem_init(struct ifnet *ifp)
/* Encode Receive Descriptor ring size: four possible values */
v = gem_ringsize(GEM_NRXDESC /*XXX*/);
/* Enable DMA */
bus_space_write_4(t, h, GEM_RX_CONFIG,
bus_space_write_4(t, h, GEM_RX_CONFIG,
v|(GEM_THRSH_1024<<GEM_RX_CONFIG_FIFO_THRS_SHIFT)|
(2<<GEM_RX_CONFIG_FBOFF_SHFT)|GEM_RX_CONFIG_RXDMA_EN|
(0<<GEM_RX_CONFIG_CXM_START_SHFT));
@ -944,11 +944,11 @@ gem_init_regs(struct gem_softc *sc)
/*
* Set the station address.
*/
bus_space_write_4(t, h, GEM_MAC_ADDR0,
bus_space_write_4(t, h, GEM_MAC_ADDR0,
(sc->sc_arpcom.ac_enaddr[4]<<8) | sc->sc_arpcom.ac_enaddr[5]);
bus_space_write_4(t, h, GEM_MAC_ADDR1,
bus_space_write_4(t, h, GEM_MAC_ADDR1,
(sc->sc_arpcom.ac_enaddr[2]<<8) | sc->sc_arpcom.ac_enaddr[3]);
bus_space_write_4(t, h, GEM_MAC_ADDR2,
bus_space_write_4(t, h, GEM_MAC_ADDR2,
(sc->sc_arpcom.ac_enaddr[0]<<8) | sc->sc_arpcom.ac_enaddr[1]);
}

2
sys/dev/ic/sili.c
View file

@ -470,7 +470,7 @@ sili_port_intr(struct sili_port *sp, int timeout_slot)
/* Extract real NCQ error slot & RFIS from
* log page.
*/
*/
if (!sili_read_ncq_error(sp, &err_slot, err_port)) {
/* got real err_slot */
DPRINTF(SILI_D_VERBOSE, "%s.%d: error slot "

28
sys/dev/isa/ad1848.c
View file

@ -63,7 +63,7 @@
/*
* Portions of this code are from the VOXware support for the ad1848
* by Hannu Savolainen <hannu@voxware.pp.fi>
*
*
* Portions also supplied from the SoundBlaster driver for NetBSD.
*/
@ -238,7 +238,7 @@ ad1848_dump_regs(struct ad1848_softc *sc)
{
int i;
u_char r;
printf("ad1848 status=%02x", ADREAD(sc, AD1848_STATUS));
printf(" regs: ");
for (i = 0; i < 16; i++) {
@ -381,7 +381,7 @@ ad1848_probe(struct ad1848_softc *sc)
default:
sc->chip_name = "unknown";
DPRINTF(("ad1848: unknown codec version %#02X\n", (tmp1 & 0x8f)));
}
}
#if 0
/*
@ -538,7 +538,7 @@ ad1848_attach(struct ad1848_softc *sc)
if (ad1848_init_values[i] != 0) {
ad_write(sc, i, ad1848_init_values[i]);
timeout = AD1848_TIMO;
while (timeout > 0 &&
while (timeout > 0 &&
ADREAD(sc, AD1848_IADDR) & SP_IN_INIT)
timeout--;
}
@ -587,7 +587,7 @@ struct ad1848_mixerinfo {
{ SP_LEFT_AUX1_CONTROL, SP_RIGHT_AUX1_CONTROL, AUX_INPUT_ATTEN_BITS,
AUX_INPUT_ATTEN_MASK },
{ SP_LEFT_OUTPUT_CONTROL, SP_RIGHT_OUTPUT_CONTROL, OUTPUT_ATTEN_BITS,
OUTPUT_ATTEN_MASK },
OUTPUT_ATTEN_MASK },
{ CS_LEFT_LINE_CONTROL, CS_RIGHT_LINE_CONTROL, LINE_INPUT_ATTEN_BITS,
LINE_INPUT_ATTEN_MASK },
{ CS_MONO_IO_CONTROL, 0, MONO_INPUT_ATTEN_BITS, MONO_INPUT_ATTEN_MASK },
@ -600,7 +600,7 @@ struct ad1848_mixerinfo {
* However, the driver occasionally wants to mute devices (e.g. when changing
* sampling rate). These operations should not affect the mute flags.
*/
void
void
ad1848_mute_channel(struct ad1848_softc *sc, int device, int mute)
{
u_char reg;
@ -690,7 +690,7 @@ int
ad1848_set_rec_gain(struct ad1848_softc *sc, struct ad1848_volume *gp)
{
u_char reg, gain;
DPRINTF(("ad1848_set_rec_gain: %d:%d\n", gp->left, gp->right));
sc->rec_gain = *gp;
@ -798,7 +798,7 @@ ad1848_mixer_get_port(struct ad1848_softc *ac, struct ad1848_devmap *map,
dev > AD1848_MONITOR_CHANNEL)
break;
if (cp->un.value.num_channels != 1 &&
mixer_channel_info[dev].right_reg == 0)
mixer_channel_info[dev].right_reg == 0)
break;
error = ad1848_get_device_gain(ac, dev, &vol);
if (!error)
@ -843,7 +843,7 @@ ad1848_mixer_get_port(struct ad1848_softc *ac, struct ad1848_devmap *map,
return error;
}
int
int
ad1848_mixer_set_port(struct ad1848_softc *ac, struct ad1848_devmap *map,
int cnt, mixer_ctrl_t *cp)
{
@ -865,7 +865,7 @@ ad1848_mixer_set_port(struct ad1848_softc *ac, struct ad1848_devmap *map,
dev > AD1848_MONITOR_CHANNEL)
break;
if (cp->un.value.num_channels != 1 &&
mixer_channel_info[dev].right_reg == 0)
mixer_channel_info[dev].right_reg == 0)
break;
ad1848_to_vol(cp, &vol);
error = ad1848_set_channel_gain(ac, dev, &vol);
@ -914,7 +914,7 @@ ad1848_set_params(void *addr, int setmode, int usemode, struct audio_params *p,
struct ad1848_softc *sc = addr;
int error, bits, enc;
DPRINTF(("ad1848_set_params: %d %d %d %ld\n",
DPRINTF(("ad1848_set_params: %d %d %d %ld\n",
p->encoding, p->precision, p->channels, p->sample_rate));
enc = p->encoding;
@ -1082,7 +1082,7 @@ ad1848_close(void *addr)
/* Disable interrupts */
DPRINTF(("ad1848_close: disable intrs\n"));
ad_write(sc, SP_PIN_CONTROL,
ad_write(sc, SP_PIN_CONTROL,
ad_read(sc, SP_PIN_CONTROL) & ~INTERRUPT_ENABLE);
DPRINTF(("ad1848_close: disable capture and playback\n"));
@ -1171,7 +1171,7 @@ ad1848_commit_settings(void *addr)
ad1848_mute_monitor(sc, 0);
mtx_leave(&audio_lock);
sc->need_commit = 0;
return 0;
@ -1395,7 +1395,7 @@ ad1848_intr(void *arg)
mtx_enter(&audio_lock);
/* Get intr status */
status = ADREAD(sc, AD1848_STATUS);
#ifdef AUDIO_DEBUG
if (ad1848debug > 1)
printf("ad1848_intr: mode=%d pintr=%p prun=%d rintr=%p rrun=%d status=0x%x\n",

8
sys/dev/isa/ad1848var.h
View file

@ -61,7 +61,7 @@ struct ad1848_softc {
int sc_irq; /* interrupt */
int sc_drq; /* DMA */
int sc_recdrq; /* record/capture DMA */
int sc_flags;
#define AD1848_FLAG_32REGS 0x01 /* newer chip (cs4231 compatible) */
@ -79,10 +79,10 @@ struct ad1848_softc {
char *chip_name;
int mode;
u_int precision; /* 8/16 bits */
int channels;
u_char speed_bits;
u_char format_bits;
u_char need_commit;
@ -175,7 +175,7 @@ void ad1848_attach(struct ad1848_softc *);
int ad1848_open(void *, int);
void ad1848_close(void *);
void ad1848_forceintr(struct ad1848_softc *);
int ad1848_set_params(void *, int, int, struct audio_params *, struct audio_params *);

12
sys/dev/isa/aps.c
View file

@ -179,7 +179,7 @@ aps_do_io(bus_space_tag_t iot, bus_space_handle_t ioh,
DPRINTF(("aps_do_io: CMD: 0x%02x, wmask: 0x%04x, rmask: 0x%04x\n",
buf[0], wmask, rmask));
/* write init byte using arbitration */
/* write init byte using arbitration */
for (n = 0; n < 100; n++) {
stat = bus_space_read_1(iot, ioh, APS_STR3);
if (stat & (APS_STR3_OBF3B | APS_STR3_SWMF)) {
@ -449,15 +449,15 @@ aps_refresh_sensor_data(struct aps_softc *sc)
sc->sensors[APS_SENSOR_YACCEL].value = sc->aps_data.y_accel;
/* convert to micro (mu) degrees */
temp = sc->aps_data.temp1 * 1000000;
temp = sc->aps_data.temp1 * 1000000;
/* convert to kelvin */
temp += 273150000;
temp += 273150000;
sc->sensors[APS_SENSOR_TEMP1].value = temp;
/* convert to micro (mu) degrees */
temp = sc->aps_data.temp2 * 1000000;
temp = sc->aps_data.temp2 * 1000000;
/* convert to kelvin */
temp += 273150000;
temp += 273150000;
sc->sensors[APS_SENSOR_TEMP2].value = temp;
sc->sensors[APS_SENSOR_XVAR].value = sc->aps_data.x_var;
@ -504,7 +504,7 @@ aps_activate(struct device *self, int act)
break;
case DVACT_RESUME:
/*
* Redo the init sequence on resume, because APS is
* Redo the init sequence on resume, because APS is
* as forgetful as it is deaf.
*/

4
sys/dev/isa/fd.c
View file

@ -1060,7 +1060,7 @@ fdioctl(dev_t dev, u_long cmd, caddr_t addr, int flag, struct proc *p)
case FD_GOPTS: /* get drive options */
*(int *)addr = fd->sc_opts;
return 0;
case FD_SOPTS: /* set drive options */
fd->sc_opts = *(int *)addr;
return 0;
@ -1101,7 +1101,7 @@ fdformat(dev_t dev, struct fd_formb *finfo, struct proc *p)
bp->b_bcount = sizeof(struct fd_idfield_data) * finfo->fd_formb_nsecs;
bp->b_data = (caddr_t)finfo;
#ifdef DEBUG
printf("fdformat: blkno %llx count %lx\n", bp->b_blkno, bp->b_bcount);
#endif

4
sys/dev/isa/gus.c
View file

@ -669,12 +669,12 @@ gus_dmaout_timeout(void *arg)
mtx_enter(&audio_lock);
SELECT_GUS_REG(iot, ioh2, GUSREG_DMA_CONTROL);
bus_space_write_1(iot, ioh2, GUS_DATA_HIGH, 0);
#if 0
/* XXX we will dmadone below? */
isa_dmaabort(sc->sc_dev.dv_parent, sc->sc_drq);
#endif
gus_dmaout_dointr(sc);
mtx_leave(&audio_lock);
}

6
sys/dev/isa/hsq.c
View file

@ -39,7 +39,7 @@
*
* Hostess may be the registered trademark of Comtrol Corp.
* WARNING! The information that is below about Hostess family
* serial cards is not based on any information from Comtrol,
* serial cards is not based on any information from Comtrol,
* and I DON'T guarantee this information is authentic or right.
* For authentic information on Hostess serial cards visit
* http://www.comtrol.com
@ -51,7 +51,7 @@
* muxes should work. It works ifine with my mux (it has ti16c750
* UARTs on it, and current com driver detects them as 550A, so i
* changed it a bit, to use the power of 750).
*
*
* Hostess cards use scratch register of lead UART to control the mux.
* When a byte is written to the register it is meant as mask, which
* enables/disables interrupts from 1-8 UARTs by setting 0-7 bits to
@ -66,7 +66,7 @@
*
* Shitty feature: UER's value upon power up is absolutely random,
* so that UARTs can work and can not and you don't understand what's up...
* Thus, we have to set its value to 0x0f to get all four UARTs
* Thus, we have to set its value to 0x0f to get all four UARTs
* interrupting, just after we've attached the mux...
*
* Use it and share my fun!

4
sys/dev/isa/i82365_isasubr.c
View file

@ -119,7 +119,7 @@ pcic_isa_bus_width_probe(struct pcic_softc *sc, bus_space_tag_t iot,
* range-- apparently missing a bit or more of address lines.
* (e.g. CIRRUS_PD672X with Linksys EthernetCard ne2000 clone
* in TI TravelMate 5000 -- not clear which is at fault)
*
*
* Add a kludge to detect 10 bit wide buses and deal with them,
* and also a config file option to override the probe.
*/
@ -206,7 +206,7 @@ pcic_isa_chip_intr_establish(pcmcia_chipset_handle_t pch,
h->pcmcia->dv_xname);
}
void
void
pcic_isa_chip_intr_disestablish(pcmcia_chipset_handle_t pch, void *ih)
{
struct pcic_handle *h = (struct pcic_handle *) pch;

2
sys/dev/isa/i82365_isavar.h
View file

@ -34,7 +34,7 @@
extern char pcic_isa_intr_list[];
extern int npcic_isa_intr_list;
/*
/*
* Establish/disestablish interrupts for PCMCIA functions.
*/

4
sys/dev/isa/if_ec.c
View file

@ -413,7 +413,7 @@ ec_attach(struct device *parent, struct device *self, void *aux)
sc->tx_page_start = ELINK2_TX_PAGE_OFFSET_16BIT;
sc->rec_page_start = ELINK2_RX_PAGE_OFFSET_16BIT;
sc->rec_page_stop = (memsize >> ED_PAGE_SHIFT) +
sc->rec_page_stop = (memsize >> ED_PAGE_SHIFT) +
sc->rec_page_start;
sc->mem_ring = sc->mem_start;
} else {
@ -657,7 +657,7 @@ ec_write_mbuf(struct dp8390_softc *sc, struct mbuf *m, int buf)
if (esc->sc_16bitp)
bus_space_write_1(asict, asich, ELINK2_GACFR,
ELINK2_GACFR_RSEL | ELINK2_GACFR_MBS0);
return (savelen);
}

66
sys/dev/isa/if_eg.c
View file

@ -84,8 +84,8 @@ struct eg_softc {
bus_space_tag_t sc_bst;
bus_space_handle_t sc_bsh;
struct arpcom sc_arpcom; /* Ethernet common part */
u_char eg_rom_major; /* Cards ROM version (major number) */
u_char eg_rom_minor; /* Cards ROM version (minor number) */
u_char eg_rom_major; /* Cards ROM version (major number) */
u_char eg_rom_minor; /* Cards ROM version (minor number) */
short eg_ram; /* Amount of RAM on the card */
u_char eg_pcb[64]; /* Primary Command Block buffer */
u_char eg_incount; /* Number of buffers currently used */
@ -125,12 +125,12 @@ static int egreadPCB(struct eg_softc *);
/*
* Support stuff
*/
static __inline void
egprintpcb(struct eg_softc *sc)
{
int i;
for (i = 0; i < sc->eg_pcb[1] + 2; i++)
DPRINTF(("pcb[%2d] = %x\n", i, sc->eg_pcb[i]));
}
@ -153,7 +153,7 @@ egoutPCB(struct eg_softc *sc, u_char b)
DPRINTF(("egoutPCB failed\n"));
return (1);
}
static int
egreadPCBstat(struct eg_softc *sc, u_char statb)
{
@ -163,11 +163,11 @@ egreadPCBstat(struct eg_softc *sc, u_char statb)
for (i=0; i < 5000; i++) {
if ((bus_space_read_1(bst, bsh, EG_STATUS) & EG_PCB_STAT) !=
EG_PCB_NULL)
EG_PCB_NULL)
break;
delay(10);
}
if ((bus_space_read_1(bst, bsh, EG_STATUS) & EG_PCB_STAT) == statb)
if ((bus_space_read_1(bst, bsh, EG_STATUS) & EG_PCB_STAT) == statb)
return (0);
return (1);
}
@ -188,7 +188,7 @@ egreadPCBready(struct eg_softc *sc)
bus_space_read_1(bst, bsh, EG_STATUS)));
return (1);
}
static int
egwritePCB(struct eg_softc *sc)
{
@ -204,7 +204,7 @@ egwritePCB(struct eg_softc *sc)
len = sc->eg_pcb[1] + 2;
for (i = 0; i < len; i++)
egoutPCB(sc, sc->eg_pcb[i]);
for (i=0; i < 4000; i++) {
if (bus_space_read_1(bst, bsh, EG_STATUS) & EG_STAT_HCRE)
break;
@ -220,8 +220,8 @@ egwritePCB(struct eg_softc *sc)
if (egreadPCBstat(sc, EG_PCB_ACCEPT))
return (1);
return (0);
}
}
static int
egreadPCB(struct eg_softc *sc)
{
@ -229,7 +229,7 @@ egreadPCB(struct eg_softc *sc)
bus_space_handle_t bsh = sc->sc_bsh;
int i;
u_char b;
bus_space_write_1(bst, bsh, EG_CONTROL,
(bus_space_read_1(bst, bsh, EG_CONTROL) & ~EG_PCB_STAT) |
EG_PCB_NULL);
@ -240,7 +240,7 @@ egreadPCB(struct eg_softc *sc)
return (1);
sc->eg_pcb[0] = bus_space_read_1(bst, bsh, EG_COMMAND);
if (egreadPCBready(sc))
return (1);
@ -250,7 +250,7 @@ egreadPCB(struct eg_softc *sc)
DPRINTF(("len %d too large\n", sc->eg_pcb[1]));
return (1);
}
for (i = 0; i < sc->eg_pcb[1]; i++) {
if (egreadPCBready(sc))
return (1);
@ -270,7 +270,7 @@ egreadPCB(struct eg_softc *sc)
EG_PCB_ACCEPT);
return (0);
}
}
/*
* Real stuff
@ -289,7 +289,7 @@ egprobe(struct device *parent, void *match, void *aux)
DPRINTF(("Weird iobase %x\n", ia->ia_iobase));
return (0);
}
if (bus_space_map(bst, ia->ia_iobase, EG_IO_PORTS, 0, &bsh)) {
DPRINTF(("%s: can't map i/o space\n", sc->sc_dev.dv_xname));
return (0);
@ -297,12 +297,12 @@ egprobe(struct device *parent, void *match, void *aux)
sc->sc_bsh = bsh;
/* hard reset card */
bus_space_write_1(bst, bsh, EG_CONTROL, EG_CTL_RESET);
bus_space_write_1(bst, bsh, EG_CONTROL, EG_CTL_RESET);
bus_space_write_1(bst, bsh, EG_CONTROL, 0);
for (i = 0; i < 5000; i++) {
delay(1000);
if ((bus_space_read_1(bst, bsh, EG_STATUS) & EG_PCB_STAT) ==
EG_PCB_NULL)
EG_PCB_NULL)
break;
}
if ((bus_space_read_1(bst, bsh, EG_STATUS) & EG_PCB_STAT) !=
@ -314,7 +314,7 @@ egprobe(struct device *parent, void *match, void *aux)
sc->eg_pcb[1] = 0;
if (egwritePCB(sc) != 0)
goto lose;
if (egreadPCB(sc) != 0) {
egprintpcb(sc);
goto lose;
@ -328,7 +328,7 @@ egprobe(struct device *parent, void *match, void *aux)
sc->eg_rom_major = sc->eg_pcb[3];
sc->eg_rom_minor = sc->eg_pcb[2];
sc->eg_ram = sc->eg_pcb[6] | (sc->eg_pcb[7] << 8);
ia->ia_iosize = 0x08;
ia->ia_msize = 0;
bus_space_unmap(bst, bsh, EG_IO_PORTS);
@ -347,7 +347,7 @@ egattach(struct device *parent, struct device *self, void *aux)
bus_space_tag_t bst = sc->sc_bst = ia->ia_iot;
bus_space_handle_t bsh;
struct ifnet *ifp = &sc->sc_arpcom.ac_if;
if (bus_space_map(bst, ia->ia_iobase, EG_IO_PORTS, 0, &bsh)) {
printf("%s: can't map i/o space\n", sc->sc_dev.dv_xname);
return;
@ -361,7 +361,7 @@ egattach(struct device *parent, struct device *self, void *aux)
if (egwritePCB(sc) != 0) {
DPRINTF(("write error\n"));
return;
}
}
if (egreadPCB(sc) != 0) {
DPRINTF(("read error\n"));
egprintpcb(sc);
@ -369,7 +369,7 @@ egattach(struct device *parent, struct device *self, void *aux)
}
/* check Get station address response */
if (sc->eg_pcb[0] != EG_RSP_GETEADDR || sc->eg_pcb[1] != 0x06) {
if (sc->eg_pcb[0] != EG_RSP_GETEADDR || sc->eg_pcb[1] != 0x06) {
DPRINTF(("parse error\n"));
egprintpcb(sc);
return;
@ -404,11 +404,11 @@ egattach(struct device *parent, struct device *self, void *aux)
ifp->if_ioctl = egioctl;
ifp->if_watchdog = egwatchdog;
ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX;
/* Now we can attach the interface. */
if_attach(ifp);
ether_ifattach(ifp);
sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE,
IPL_NET, egintr, sc, sc->sc_dev.dv_xname);
}
@ -503,7 +503,7 @@ loop:
m0 = ifq_dequeue(&ifp->if_snd);
if (m0 == NULL)
return;
ifq_set_oactive(&ifp->if_snd);
/* We need to use m->m_pkthdr.len, so require the header */
@ -542,8 +542,8 @@ loop:
/* set direction bit: host -> adapter */
bus_space_write_1(bst, bsh, EG_CONTROL,
bus_space_read_1(bst, bsh, EG_CONTROL) & ~EG_CTL_DIR);
bus_space_read_1(bst, bsh, EG_CONTROL) & ~EG_CTL_DIR);
for (ptr = (u_short *)sc->eg_outbuf; len > 0; len -= 2) {
bus_space_write_2(bst, bsh, EG_DATA, *ptr++);
for (i = 10000; i != 0; i--) {
@ -556,7 +556,7 @@ loop:
break;
}
}
m_freem(m0);
}
@ -576,11 +576,11 @@ egintr(void *arg)
switch (sc->eg_pcb[0]) {
case EG_RSP_RECVPACKET:
len = sc->eg_pcb[6] | (sc->eg_pcb[7] << 8);
/* Set direction bit : Adapter -> host */
bus_space_write_1(bst, bsh, EG_CONTROL,
bus_space_read_1(bst, bsh, EG_CONTROL) |
EG_CTL_DIR);
EG_CTL_DIR);
for (ptr = (u_short *)sc->eg_inbuf; len > 0; len -= 2) {
for (i = 10000; i != 0; i--) {
@ -630,7 +630,7 @@ egintr(void *arg)
DPRINTF(("overrun errors %d\n",
*(short *)&sc->eg_pcb[16]));
break;
default:
DPRINTF(("egintr: Unknown response %x??\n",
sc->eg_pcb[0]));
@ -792,6 +792,6 @@ egstop(register struct eg_softc *sc)
{
bus_space_tag_t bst = sc->sc_bst;
bus_space_handle_t bsh = sc->sc_bsh;
bus_space_write_1(bst, bsh, EG_CONTROL, 0);
}

4
sys/dev/isa/if_egreg.h
View file

@ -66,7 +66,7 @@
/*
* Host Status Register bits
* EG_STAT_HRDY - Data Register ready
* EG_STAT_HRDY - Data Register ready
* EG_STAT_HCRE - Host Command Register empty
* EG_STAT_ACRF - Adapter Command register full
* EG_STAT_DIR - Direction flag, 0 = host -> adapter, 1 = adapter -> host
@ -86,7 +86,7 @@
#define EG_STAT_ASF1 0x01
#define EG_PCB_NULL 0x00
#define EG_PCB_ACCEPT 0x01
#define EG_PCB_ACCEPT 0x01
#define EG_PCB_REJECT 0x02
#define EG_PCB_DONE 0x03
#define EG_PCB_STAT 0x03

2
sys/dev/isa/if_el.c
View file

@ -327,7 +327,7 @@ elstart(struct ifnet *ifp)
for (i = 0;
i < ETHER_MIN_LEN - ETHER_CRC_LEN - m0->m_pkthdr.len; i++)
outb(iobase+EL_BUF, 0);
m_freem(m0);
/* Now transmit the datagram. */

108
sys/dev/isa/if_ex.c
View file

@ -46,7 +46,7 @@
#include <sys/device.h>
#include <net/if.h>
#include <net/if_media.h>
#include <net/if_media.h>
#include <netinet/in.h>
#include <netinet/if_ether.h>
@ -79,24 +79,24 @@ struct ex_softc {
int iobase; /* I/O base address. */
u_short irq_no; /* IRQ number. */
u_int mem_size; /* Total memory size, in bytes. */
u_int rx_mem_size; /* Rx memory size (by default, first 3/4 of
u_int rx_mem_size; /* Rx memory size (by default, first 3/4 of
total memory). */
u_int rx_lower_limit,
u_int rx_lower_limit,
rx_upper_limit; /* Lower and upper limits of receive buffer. */
u_int rx_head; /* Head of receive ring buffer. */
u_int tx_mem_size; /* Tx memory size (by default, last quarter of
u_int tx_mem_size; /* Tx memory size (by default, last quarter of
total memory). */
u_int tx_lower_limit,
u_int tx_lower_limit,
tx_upper_limit; /* Lower and upper limits of transmit buffer. */
u_int tx_head, tx_tail; /* Head and tail of transmit ring buffer. */
u_int tx_last; /* Pointer to beginning of last frame in the
u_int tx_last; /* Pointer to beginning of last frame in the
chain. */
bus_space_tag_t sc_iot; /* ISA i/o space tag */
bus_space_handle_t sc_ioh; /* ISA i/o space handle */
void *sc_ih; /* Device interrupt handler */
};
static char irq2eemap[] = { -1, -1, 0, 1, -1, 2, -1, -1, -1, 0, 3, 4, -1, -1,
static char irq2eemap[] = { -1, -1, 0, 1, -1, 2, -1, -1, -1, 0, 3, 4, -1, -1,
-1, -1 };
static u_char ee2irqmap[] = { 9, 3, 5, 10, 11, 0, 0, 0 };
@ -145,7 +145,7 @@ struct cfdriver ex_cd = {
bus_space_write_multi_2((sc)->sc_iot, (sc)->sc_ioh, (off), \
(u_int16_t *)(addr), (count))
int
int
ex_look_for_card(struct isa_attach_args *ia, struct ex_softc *sc)
{
int count1, count2;
@ -165,7 +165,7 @@ ex_look_for_card(struct isa_attach_args *ia, struct ex_softc *sc)
return(0);
}
int
int
ex_probe(struct device *parent, void *match, void *aux)
{
struct ex_softc *sc = match;
@ -183,7 +183,7 @@ ex_probe(struct device *parent, void *match, void *aux)
if (!ex_look_for_card(ia, sc)) {
bus_space_unmap(sc->sc_iot, sc->sc_ioh, EX_IOSIZE);
return(0);
return(0);
}
} else
return(0);
@ -200,7 +200,7 @@ ex_probe(struct device *parent, void *match, void *aux)
* Fill in several fields of the softc structure:
* - I/O base address.
* - Hardware Ethernet address.
* - IRQ number (if not supplied in config file, read it from
* - IRQ number (if not supplied in config file, read it from
* EEPROM).
*/
sc->iobase = ia->ia_iobase;
@ -283,7 +283,7 @@ ex_attach(struct device *parent, struct device *self, void *aux)
DODEBUG(Start_End, printf("ex_attach: finish\n"););
}
void
void
ex_init(struct ex_softc *sc)
{
struct ifnet *ifp = &sc->arpcom.ac_if;
@ -317,7 +317,7 @@ ex_init(struct ex_softc *sc)
RX_CRC_InMem);
CSR_WRITE_1(sc, REG3, (CSR_READ_1(sc, REG3) & 0x3f));
CSR_WRITE_1(sc, CMD_REG, Bank1_Sel);
CSR_WRITE_1(sc, INT_NO_REG, (CSR_READ_1(sc, INT_NO_REG) & 0xf8) |
CSR_WRITE_1(sc, INT_NO_REG, (CSR_READ_1(sc, INT_NO_REG) & 0xf8) |
irq2eemap[sc->irq_no]);
/*
@ -372,7 +372,7 @@ ex_init(struct ex_softc *sc)
DODEBUG(Start_End, printf("ex_init: finish\n"););
}
void
void
ex_start(struct ifnet *ifp)
{
struct ex_softc *sc = ifp->if_softc;
@ -393,10 +393,10 @@ ex_start(struct ifnet *ifp)
break;
/*
* Ensure there is enough free transmit buffer space for this
* packet, including its header. Note: the header cannot wrap
* around the end of the transmit buffer and must be kept
* together, so we allow space for twice the length of the
* Ensure there is enough free transmit buffer space for this
* packet, including its header. Note: the header cannot wrap
* around the end of the transmit buffer and must be kept
* together, so we allow space for twice the length of the
* header, just in case.
*/
for (len = 0, m = opkt; m != NULL; m = m->m_next)
@ -415,29 +415,29 @@ ex_start(struct ifnet *ifp)
if (avail >= len + XMT_HEADER_LEN) {
ifq_deq_commit(&ifp->if_snd, opkt);
#ifdef EX_PSA_INTR
#ifdef EX_PSA_INTR
/*
* Disable rx and tx interrupts, to avoid corruption of
* the host address register by interrupt service
* routines. XXX Is this necessary with splnet()
* the host address register by interrupt service
* routines. XXX Is this necessary with splnet()
* enabled?
*/
CSR_WRITE_2(sc, MASK_REG, All_Int);
#endif
/*
* Compute the start and end addresses of this frame
/*
* Compute the start and end addresses of this frame
* in the tx buffer.
*/
dest = sc->tx_tail;
next = dest + len;
if (next > sc->tx_upper_limit) {
if ((sc->tx_upper_limit + 2 - sc->tx_tail) <=
if ((sc->tx_upper_limit + 2 - sc->tx_tail) <=
XMT_HEADER_LEN) {
dest = sc->tx_lower_limit;
next = dest + len;
} else
next = sc->tx_lower_limit + next -
next = sc->tx_lower_limit + next -
sc->tx_upper_limit - 2;
}
@ -450,8 +450,8 @@ ex_start(struct ifnet *ifp)
CSR_WRITE_2(sc, IO_PORT_REG, data_len);
/*
* Output the packet data to the card. Ensure all
* transfers are 16-bit wide, even if individual mbufs
* Output the packet data to the card. Ensure all
* transfers are 16-bit wide, even if individual mbufs
* have odd length.
*/
@ -461,29 +461,29 @@ ex_start(struct ifnet *ifp)
tmp16[1] = *(mtod(m, caddr_t));
CSR_WRITE_MULTI_2(sc, IO_PORT_REG, tmp16, 1);
}
CSR_WRITE_MULTI_2(sc, IO_PORT_REG, mtod(m, caddr_t)
CSR_WRITE_MULTI_2(sc, IO_PORT_REG, mtod(m, caddr_t)
+ i, (m->m_len - i) / 2);
if ((i = (m->m_len - i) & 1))
tmp16[0] = *(mtod(m, caddr_t) +
tmp16[0] = *(mtod(m, caddr_t) +
m->m_len - 1);
}
if (i)
CSR_WRITE_MULTI_2(sc, IO_PORT_REG, tmp16, 1);
/*
* If there were other frames chained, update the
* If there were other frames chained, update the
* chain in the last one.
*/
if (sc->tx_head != sc->tx_tail) {
if (sc->tx_tail != dest) {
CSR_WRITE_2(sc, HOST_ADDR_REG,
CSR_WRITE_2(sc, HOST_ADDR_REG,
sc->tx_last + XMT_Chain_Point);
CSR_WRITE_2(sc, IO_PORT_REG, dest);
}
CSR_WRITE_2(sc, HOST_ADDR_REG, sc->tx_last +
CSR_WRITE_2(sc, HOST_ADDR_REG, sc->tx_last +
XMT_Byte_Count);
i = CSR_READ_2(sc, IO_PORT_REG);
CSR_WRITE_2(sc, HOST_ADDR_REG, sc->tx_last +
CSR_WRITE_2(sc, HOST_ADDR_REG, sc->tx_last +
XMT_Byte_Count);
CSR_WRITE_2(sc, IO_PORT_REG, i | Ch_bit);
}
@ -526,7 +526,7 @@ ex_start(struct ifnet *ifp)
DODEBUG(Start_End, printf("ex_start: finish\n"););
}
void
void
ex_stop(struct ex_softc *sc)
{
DODEBUG(Start_End, printf("ex_stop: start\n"););
@ -543,8 +543,8 @@ ex_stop(struct ex_softc *sc)
CSR_WRITE_1(sc, CMD_REG, Bank0_Sel);
CSR_WRITE_1(sc, CMD_REG, Rcv_Stop);
sc->tx_head = sc->tx_tail = sc->tx_lower_limit;
sc->tx_last = 0; /* XXX I think these two lines are not necessary,
because ex_init will always be called again
sc->tx_last = 0; /* XXX I think these two lines are not necessary,
because ex_init will always be called again
to reinit the interface. */
CSR_WRITE_1(sc, MASK_REG, All_Int);
CSR_WRITE_1(sc, STATUS_REG, All_Int);
@ -555,7 +555,7 @@ ex_stop(struct ex_softc *sc)
}
int
int
ex_intr(void *arg)
{
struct ex_softc *sc = arg;
@ -567,7 +567,7 @@ ex_intr(void *arg)
#ifdef EX_DEBUG
if (++exintr_count != 1)
printf("WARNING: nested interrupt (%d). Mail the author.\n",
printf("WARNING: nested interrupt (%d). Mail the author.\n",
exintr_count);
#endif
@ -600,7 +600,7 @@ ex_intr(void *arg)
return handled;
}
void
void
ex_tx_intr(struct ex_softc *sc)
{
struct ifnet *ifp = &sc->arpcom.ac_if;
@ -632,7 +632,7 @@ ex_tx_intr(struct ex_softc *sc)
DODEBUG(Start_End, printf("ex_tx_intr: finish\n"););
}
void
void
ex_rx_intr(struct ex_softc *sc)
{
struct ifnet *ifp = &sc->arpcom.ac_if;
@ -674,20 +674,20 @@ ex_rx_intr(struct ex_softc *sc)
}
m->m_len = min(m->m_len, pkt_len);
/*
* NOTE: I'm assuming that all mbufs
* NOTE: I'm assuming that all mbufs
* allocated are of even length, except
* for the last one in an odd-length
* for the last one in an odd-length
* packet.
*/
CSR_READ_MULTI_2(sc, IO_PORT_REG,
mtod(m, caddr_t), m->m_len / 2);
if (m->m_len & 1)
*(mtod(m, caddr_t) +
m->m_len - 1) =
*(mtod(m, caddr_t) +
m->m_len - 1) =
CSR_READ_1(sc, IO_PORT_REG);
pkt_len -= m->m_len;
if (pkt_len > 0) {
MGET(m->m_next, M_DONTWAIT,
MGET(m->m_next, M_DONTWAIT,
MT_DATA);
if (m->m_next == NULL) {
m_freem(ipkt);
@ -700,7 +700,7 @@ ex_rx_intr(struct ex_softc *sc)
}
#ifdef EX_DEBUG
if (debug_mask & Rcvd_Pkts) {
if ((eh->ether_dhost[5] != 0xff) ||
if ((eh->ether_dhost[5] != 0xff) ||
(eh->ether_dhost[0] != 0xff)) {
printf("Receive packet with %d data bytes: %6D -> ", QQQ, eh->ether_shost, ":");
printf("%6D\n", eh->ether_dhost, ":");
@ -722,9 +722,9 @@ ex_rx_intr(struct ex_softc *sc)
if_input(ifp, &ml);
DODEBUG(Start_End, printf("ex_rx_intr: finish\n"););
}
}
int
int
ex_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
{
struct ex_softc *sc = ifp->if_softc;
@ -811,7 +811,7 @@ ex_setmulti(struct ex_softc *sc)
/* Borrow space from TX buffer; this should be safe
* as this is only called from ex_init */
CSR_WRITE_2(sc, HOST_ADDR_REG, sc->tx_lower_limit);
CSR_WRITE_2(sc, IO_PORT_REG, MC_Setup_CMD);
CSR_WRITE_2(sc, IO_PORT_REG, 0);
@ -863,13 +863,13 @@ ex_setmulti(struct ex_softc *sc)
}
}
void
void
ex_reset(struct ex_softc *sc)
{
int s;
DODEBUG(Start_End, printf("ex_reset: start\n"););
s = splnet();
ex_stop(sc);
ex_init(sc);
@ -878,7 +878,7 @@ ex_reset(struct ex_softc *sc)
DODEBUG(Start_End, printf("ex_reset: finish\n"););
}
void
void
ex_watchdog(struct ifnet *ifp)
{
struct ex_softc *sc = ifp->if_softc;
@ -936,7 +936,7 @@ ex_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
ifmr->ifm_active = ex_get_media(sc);
}
u_short
u_short
ex_eeprom_read(struct ex_softc *sc, int location)
{
int i;
@ -947,7 +947,7 @@ ex_eeprom_read(struct ex_softc *sc, int location)
CSR_WRITE_1(sc, CMD_REG, Bank2_Sel);
CSR_WRITE_1(sc, EEPROM_REG, EECS);
for (i = 8; i >= 0; i--) {
short outval = (read_cmd & (1 << i)) ? ctrl_val | EEDI :
short outval = (read_cmd & (1 << i)) ? ctrl_val | EEDI :
ctrl_val;
CSR_WRITE_1(sc, EEPROM_REG, outval);
CSR_WRITE_1(sc, EEPROM_REG, outval | EESK);

20
sys/dev/isa/if_ie.c
View file

@ -578,7 +578,7 @@ ee16_probe(struct ie_softc *sc, struct isa_attach_args *ia)
}
if (board_id != IEE16_ID)
return 0;
return 0;
/* need sc->sc_iobase for ee16_read_eeprom */
sc->sc_iobase = ia->ia_iobase;
@ -588,10 +588,10 @@ ee16_probe(struct ie_softc *sc, struct isa_attach_args *ia)
* If ia->maddr == MADDRUNK, use value in eeprom location 6.
*
* The shared RAM location on the EE16 is encoded into bits
* 3-7 of EEPROM location 6. We zero the upper byte, and
* 3-7 of EEPROM location 6. We zero the upper byte, and
* shift the 5 bits right 3. The resulting number tells us
* the RAM location. Because the EE16 supports either 16k or 32k
* of shared RAM, we only worry about the 32k locations.
* of shared RAM, we only worry about the 32k locations.
*
* NOTE: if a 64k EE16 exists, it should be added to this switch.
* then the ia->ia_msize would need to be set per case statement.
@ -603,7 +603,7 @@ ee16_probe(struct ie_softc *sc, struct isa_attach_args *ia)
* 0x0C 0x8000 0xD4000
* 0x18 0x8000 0xD8000
*
*/
*/
if ((ia->ia_maddr == MADDRUNK) || (ia->ia_msize == 0)) {
i = (ee16_read_eeprom(sc, 6) & 0x00ff ) >> 3;
@ -624,27 +624,27 @@ ee16_probe(struct ie_softc *sc, struct isa_attach_args *ia)
return 0 ;
break; /* NOTREACHED */
}
ia->ia_msize = 0x8000;
ia->ia_msize = 0x8000;
}
/* need to set these after checking for MADDRUNK */
sc->sc_maddr = ISA_HOLE_VADDR(ia->ia_maddr);
sc->sc_msize = ia->ia_msize;
sc->sc_msize = ia->ia_msize;
/* need to put the 586 in RESET, and leave it */
outb( PORT + IEE16_ECTRL, IEE16_RESET_586);
outb( PORT + IEE16_ECTRL, IEE16_RESET_586);
/* read the eeprom and checksum it, should == IEE16_ID */
for(i=0 ; i< 0x40 ; i++)
checksum += ee16_read_eeprom(sc, i);
if (checksum != IEE16_ID)
return 0;
return 0;
/*
* Size and test the memory on the board. The size of the memory
* can be one of 16k, 32k, 48k or 64k. It can be located in the
* address range 0xC0000 to 0xEFFFF on 16k boundaries.
* address range 0xC0000 to 0xEFFFF on 16k boundaries.
*
* If the size does not match the passed in memory allocation size
* issue a warning, but continue with the minimum of the two sizes.
@ -1924,7 +1924,7 @@ ieinit(struct ie_softc *sc)
bart_config &= ~IEE16_BART_LOOPBACK;
bart_config |= IEE16_BART_MCS16_TEST; /* inb doesn't get bit! */
outb(PORT + IEE16_CONFIG, bart_config);
ee16_interrupt_enable(sc);
ee16_interrupt_enable(sc);
ee16_chan_attn(sc);
}
}

2
sys/dev/isa/if_lc_isa.c
View file

@ -174,7 +174,7 @@ lemac_isa_probe(struct device *parent, void *match, void *aux)
snprintf(sc.sc_dv.dv_xname, sizeof sc.sc_dv.dv_xname, "%s%d",
lc_cd.cd_name, cf->cf_unit);
return (lemac_isa_find(&sc, ia, 0));
}

2
sys/dev/isa/if_levar.h
View file

@ -56,5 +56,5 @@ struct le_softc {
};
void le_isa_wrcsr(struct lance_softc *, uint16_t, uint16_t);
uint16_t le_isa_rdcsr(struct lance_softc *, uint16_t);
uint16_t le_isa_rdcsr(struct lance_softc *, uint16_t);
int le_isa_intredge(void *);

2
sys/dev/isa/if_ne_isa.c
View file

@ -62,7 +62,7 @@
#include <dev/ic/ne2000var.h>
#include <dev/ic/rtl80x9reg.h>
#include <dev/ic/rtl80x9var.h>
#include <dev/ic/rtl80x9var.h>
#include <dev/isa/isavar.h>

8
sys/dev/isa/if_we.c
View file

@ -812,19 +812,19 @@ we_params(bus_space_tag_t asict, bus_space_handle_t asich,
type = bus_space_read_1(asict, asich, WE_CARD_ID);
switch (type) {
case WE_TYPE_WD8003S:
typestr = "WD8003S";
case WE_TYPE_WD8003S:
typestr = "WD8003S";
break;
case WE_TYPE_WD8003E:
typestr = "WD8003E";
break;
case WE_TYPE_WD8003EB:
case WE_TYPE_WD8003EB:
typestr = "WD8003EB";
break;
case WE_TYPE_WD8003W:
typestr = "WD8003W";
break;
case WE_TYPE_WD8013EBT:
case WE_TYPE_WD8013EBT:
typestr = "WD8013EBT";
memsize = 16384;
is16bit = 1;

2
sys/dev/isa/isapnpdebug.c
View file

@ -182,7 +182,7 @@ isapnp_print_dep_start(const char *str, const u_char pref)
case ISAPNP_DEP_PREFERRED:
printf("preferred\n");
break;
case ISAPNP_DEP_ACCEPTABLE:
printf("acceptable\n");
break;

6
sys/dev/isa/isapnpres.c
View file

@ -100,7 +100,7 @@ isapnp_newdev(struct isa_attach_args *card)
if (card->ipa_child == NULL)
card->ipa_child = dev;
else {
for (ipa = card->ipa_child; ipa->ipa_sibling != NULL;
for (ipa = card->ipa_child; ipa->ipa_sibling != NULL;
ipa = ipa->ipa_sibling)
continue;
ipa->ipa_sibling = dev;
@ -267,7 +267,7 @@ isapnp_process_tag(u_char tag, u_char len, u_char *buf,
(*conf)->ipa_pref);
#endif
return 0;
case ISAPNP_TAG_DEP_END:
DPRINTF(("<<<End dependent functions\n"));
*conf = NULL;
@ -388,7 +388,7 @@ isapnp_process_tag(u_char tag, u_char len, u_char *buf,
(buf[2] << 8) | buf[1];
r->maxbase = (buf[8] << 24) | (buf[7] << 16) |
(buf[6] << 8) | buf[5];
r->align = (buf[12] << 24) | (buf[11] << 16) |
r->align = (buf[12] << 24) | (buf[11] << 16) |
(buf[10] << 8) | buf[9];
r->length = (buf[16] << 24) | (buf[15] << 16) |
(buf[14] << 8) | buf[13];

8
sys/dev/isa/isavar.h
View file

@ -93,7 +93,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* BSDI Id: isavar.h,v 1.5 1992/12/01 18:06:00 karels Exp
* BSDI Id: isavar.h,v 1.5 1992/12/01 18:06:00 karels Exp
*/
#ifndef _DEV_ISA_ISAVAR_H_
@ -110,7 +110,7 @@
#include "isadma.h"
#endif
/*
/*
* Structures and definitions needed by the machine-dependent header.
*/
struct isabus_attach_args;
@ -367,7 +367,7 @@ struct isa_softc {
/*
* ISA interrupt handler manipulation.
*
*
* To establish an ISA interrupt handler, a driver calls isa_intr_establish()
* with the interrupt number, type, level, function, and function argument of
* the interrupt it wants to handle. Isa_intr_establish() returns an opaque
@ -377,7 +377,7 @@ struct isa_softc {
* not for me", 1 for "I took care of it", or -1 for "I guess it was mine,
* but I wasn't expecting it."
*
* To remove an interrupt handler, the driver calls isa_intr_disestablish()
* To remove an interrupt handler, the driver calls isa_intr_disestablish()
* with the handle returned by isa_intr_establish() for that handler.
*/

22
sys/dev/isa/lpt_isa.c
View file

@ -15,25 +15,25 @@
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This software is a component of "386BSD" developed by
* This software is a component of "386BSD" developed by
* William F. Jolitz, TeleMuse.
* 4. Neither the name of the developer nor the name "386BSD"
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS A COMPONENT OF 386BSD DEVELOPED BY WILLIAM F. JOLITZ
* AND IS INTENDED FOR RESEARCH AND EDUCATIONAL PURPOSES ONLY. THIS
* SOFTWARE SHOULD NOT BE CONSIDERED TO BE A COMMERCIAL PRODUCT.
* THE DEVELOPER URGES THAT USERS WHO REQUIRE A COMMERCIAL PRODUCT
* THIS SOFTWARE IS A COMPONENT OF 386BSD DEVELOPED BY WILLIAM F. JOLITZ
* AND IS INTENDED FOR RESEARCH AND EDUCATIONAL PURPOSES ONLY. THIS
* SOFTWARE SHOULD NOT BE CONSIDERED TO BE A COMMERCIAL PRODUCT.
* THE DEVELOPER URGES THAT USERS WHO REQUIRE A COMMERCIAL PRODUCT
* NOT MAKE USE OF THIS WORK.
*
* FOR USERS WHO WISH TO UNDERSTAND THE 386BSD SYSTEM DEVELOPED
* BY WILLIAM F. JOLITZ, WE RECOMMEND THE USER STUDY WRITTEN
* REFERENCES SUCH AS THE "PORTING UNIX TO THE 386" SERIES
* (BEGINNING JANUARY 1991 "DR. DOBBS JOURNAL", USA AND BEGINNING
* JUNE 1991 "UNIX MAGAZIN", GERMANY) BY WILLIAM F. JOLITZ AND
* LYNNE GREER JOLITZ, AS WELL AS OTHER BOOKS ON UNIX AND THE
* ON-LINE 386BSD USER MANUAL BEFORE USE. A BOOK DISCUSSING THE INTERNALS
* BY WILLIAM F. JOLITZ, WE RECOMMEND THE USER STUDY WRITTEN
* REFERENCES SUCH AS THE "PORTING UNIX TO THE 386" SERIES
* (BEGINNING JANUARY 1991 "DR. DOBBS JOURNAL", USA AND BEGINNING
* JUNE 1991 "UNIX MAGAZIN", GERMANY) BY WILLIAM F. JOLITZ AND
* LYNNE GREER JOLITZ, AS WELL AS OTHER BOOKS ON UNIX AND THE
* ON-LINE 386BSD USER MANUAL BEFORE USE. A BOOK DISCUSSING THE INTERNALS
* OF 386BSD ENTITLED "386BSD FROM THE INSIDE OUT" WILL BE AVAILABLE LATE 1992.
*
* THIS SOFTWARE IS PROVIDED BY THE DEVELOPER ``AS IS'' AND

4
sys/dev/isa/mpu_isa.c
View file

@ -96,8 +96,8 @@ mpu_test(bus_space_tag_t iot, int iobase) /* base port number to try */
}
delay (10);
}
if (rc == 1) {
if (rc == 1) {
bus_space_write_1(iot, ioh, MPU_COMMAND, MPU_RESET);
rc = 0;
for (i = 0; i < 2 * MPU_MAXWAIT; i++)

22
sys/dev/isa/pas.c
View file

@ -35,7 +35,7 @@
*
*/
/*
* jfw 7/13/97 - The soundblaster code requires the generic bus-space
* jfw 7/13/97 - The soundblaster code requires the generic bus-space
* structures to be set up properly. Rather than go to the effort of making
* code for a dead line fully generic, properly set up the SB structures and
* leave the rest x86/ISA/default-configuration specific. If you have a
@ -166,13 +166,13 @@ pasconf(int model, int sbbase, int sbirq, int sbdrq)
paswrite(I_C_2_PCM_DMA_DISABLED, IO_CONFIGURATION_2);
paswrite(I_C_3_PCM_IRQ_DISABLED, IO_CONFIGURATION_3);
#ifdef BROKEN_BUS_CLOCK
#ifdef BROKEN_BUS_CLOCK
paswrite(S_C_1_PCS_ENABLE | S_C_1_PCS_STEREO | S_C_1_PCS_REALSOUND |
S_C_1_FM_EMULATE_CLOCK, SYSTEM_CONFIGURATION_1);
#else
paswrite(S_C_1_PCS_ENABLE | S_C_1_PCS_STEREO | S_C_1_PCS_REALSOUND,
SYSTEM_CONFIGURATION_1);
SYSTEM_CONFIGURATION_1);
#endif
/*XXX*/
@ -189,7 +189,7 @@ pasconf(int model, int sbbase, int sbirq, int sbdrq)
paswrite(P_M_MV508_ADDRESS | P_M_MV508_PCM, PARALLEL_MIXER);
paswrite(5, PARALLEL_MIXER);
/*
* Setup SoundBlaster emulation.
*/
@ -202,7 +202,7 @@ pasconf(int model, int sbbase, int sbirq, int sbdrq)
* Set mid-range levels.
*/
paswrite(P_M_MV508_ADDRESS | P_M_MV508_MODE, PARALLEL_MIXER);
paswrite(P_M_MV508_LOUDNESS | P_M_MV508_ENHANCE_NONE, PARALLEL_MIXER);
paswrite(P_M_MV508_LOUDNESS | P_M_MV508_ENHANCE_NONE, PARALLEL_MIXER);
paswrite(P_M_MV508_ADDRESS | P_M_MV508_MASTER_A, PARALLEL_MIXER);
paswrite(50, PARALLEL_MIXER);
@ -253,7 +253,7 @@ pasprobe(struct device *parent, void *match, void *aux)
* warm boot reset of the card will screw up this detect code
* something fierce. Adding code to handle this means possibly
* interfering with other cards on the bus if you have something
* on base port 0x388. SO be forewarned.
* on base port 0x388. SO be forewarned.
*/
/* Talk to first board */
outb(MASTER_DECODE, 0xbc);
@ -312,7 +312,7 @@ pasprobe(struct device *parent, void *match, void *aux)
if (ia->ia_irq == IRQUNK) {
DPRINTF(("pas: sb emulation requires known irq\n"));
return (0);
}
}
pasconf(sc->model, ia->ia_iobase, ia->ia_irq, 1);
} else {
DPRINTF(("pas: could not probe pas\n"));
@ -355,7 +355,7 @@ pasprobe(struct device *parent, void *match, void *aux)
sc->sc_sbdsp.sc_drq8 = ia->ia_drq;
sc->sc_sbdsp.sc_drq16 = -1; /* XXX */
sc->sc_sbdsp.sc_ic = ia->ia_ic;
if (sbdsp_probe(&sc->sc_sbdsp) == 0) {
DPRINTF(("pas: sbdsp probe failed\n"));
goto unmap;
@ -379,7 +379,7 @@ pasattach(struct device *parent, struct device *self, void *aux)
struct pas_softc *sc = (struct pas_softc *)self;
struct isa_attach_args *ia = (struct isa_attach_args *)aux;
int iobase = ia->ia_iobase;
sc->sc_sbdsp.sc_isa = parent;
sc->sc_sbdsp.sc_iobase = iobase;
sc->sc_sbdsp.sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq,
@ -387,7 +387,7 @@ pasattach(struct device *parent, struct device *self, void *aux)
sbdsp_intr, &sc->sc_sbdsp, sc->sc_sbdsp.sc_dev.dv_xname);
printf(" ProAudio Spectrum %s [rev %d] ", pasnames[sc->model], sc->rev);
sbdsp_attach(&sc->sc_sbdsp);
audio_attach_mi(&pas_hw_if, &sc->sc_sbdsp, NULL, &sc->sc_sbdsp.sc_dev);

16
sys/dev/isa/pasreg.h
View file

@ -3,13 +3,13 @@
/* Port addresses and bit fields for the Media Vision Pro AudioSpectrum
* second generation sound cards.
*
*
* Feel free to use this header file in any application you create that
* has support for the Media Vision Pro AudioSpectrum second generation
* sound cards. Other uses prohibited without prior permission.
*
*
* - cmetz@thor.tjhsst.edu
*
*
* Notes:
*
* - All of these ports go into the MVD101 multimedia controller chip,
@ -22,7 +22,7 @@
* - The PAS2 series cards are all really different at the hardware level,
* though the MVD101 hides some of the incompatibilities, there still
* are differences that need to be accounted for.
*
*
* Card CD-ROM interface PCM chip Mixer chip FM chip
* PAS Plus Sony proprietary (Crystal?) 8-bit DAC National OPL3
* PAS 16 Zilog SCSI MVA416 16-bit Codec MVA508 OPL3
@ -51,7 +51,7 @@
#define SYSTEM_CONFIGURATION_1 0x8388 /* R W Control */
#define S_C_1_PCS_ENABLE 0x01 /* R W PC speaker 1=enable, 0=disable PC speaker emulation */
#define S_C_1_PCM_CLOCK_SELECT 0x02 /* R W PCM 1=14.31818MHz/12, 0=28.224MHz master clock */
#define S_C_1_PCM_CLOCK_SELECT 0x02 /* R W PCM 1=14.31818MHz/12, 0=28.224MHz master clock */
#define S_C_1_FM_EMULATE_CLOCK 0x04 /* R W FM 1=use 28.224MHz/2, 0=use 14.31818MHz clock */
#define S_C_1_PCS_STEREO 0x10 /* R W PC speaker 1=enable PC speaker stereo effect, 0=disable */
#define S_C_1_PCS_REALSOUND 0x20 /* R W PC speaker 1=enable RealSound enhancement, 0=disable */
@ -118,7 +118,7 @@
struct { /* R W Mixer Filter translation */
unsigned int freq:24;
unsigned int value:8;
} F_F_FILTER_translate[] =
} F_F_FILTER_translate[] =
{ { 73500, 0x01 }, /* 73500Hz - divide by 16 */
{ 65333, 0x02 }, /* 65333Hz - divide by 18 */
{ 49000, 0x09 }, /* 49000Hz - divide by 24 */
@ -145,7 +145,7 @@
char I_C_2_PCM_DMA_translate[] = /* R W PCM PCM DMA channel value translations */
{ 4, 1, 2, 3, 0, 5, 6, 7 };
char I_C_3_PCM_IRQ_translate[] = /* R W PCM PCM IRQ level value translation */
{ 0, 0, 1, 2, 3, 4, 5, 6, 0, 0, 7, 8, 9, 0, 10, 11 };
{ 0, 0, 1, 2, 3, 4, 5, 6, 0, 0, 7, 8, 9, 0, 10, 11 };
char E_C_MPU401_IRQ_translate[] = /* R W MIDI MPU401 emulation IRQ value translation */
{ 0x00, 0x00, 0x01, 0x02, 0x00, 0x03, 0x00, 0x04, 0x00, 0x00, 0x05, 0x06, 0x07 };
char E_C_SB_IRQ_translate[] = /* R W PCM SB emulation IRQ translate */
@ -153,7 +153,7 @@
char E_C_SB_DMA_translate[] = /* R W PCM SB emulation DMA translate */
{ 0x00, 0x40, 0x80, 0xC0 };
char O_M_1_to_card[] = /* R W Control Translate (OM1 & 0x0f) to card type */
{ 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 4, 0, 2, 3 };
{ 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 4, 0, 2, 3 };
#else
extern char I_C_2_PCM_DMA_translate[]; /* R W PCM PCM DMA channel value translations */
extern char I_C_3_PCM_IRQ_translate[]; /* R W PCM PCM IRQ level value translation */

10
sys/dev/isa/pcppi.c
View file

@ -6,17 +6,17 @@
* All rights reserved.
*
* Author: Chris G. Demetriou
*
*
* Permission to use, copy, modify and distribute this software and
* its documentation is hereby granted, provided that both the copyright
* notice and this permission notice appear in all copies of the
* software, derivative works or modified versions, and any portions
* thereof, and that both notices appear in supporting documentation.
*
* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
*
* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
*
*
* Carnegie Mellon requests users of this software to return to
*
* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU

10
sys/dev/isa/pcppivar.h
View file

@ -6,17 +6,17 @@
* All rights reserved.
*
* Author: Chris G. Demetriou
*
*
* Permission to use, copy, modify and distribute this software and
* its documentation is hereby granted, provided that both the copyright
* notice and this permission notice appear in all copies of the
* software, derivative works or modified versions, and any portions
* thereof, and that both notices appear in supporting documentation.
*
* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
*
* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
*
*
* Carnegie Mellon requests users of this software to return to
*
* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU

12
sys/dev/isa/pnpdevs
View file

@ -74,7 +74,7 @@ wdc PNP0600 # Generic ESDI/IDE/ATA compatible hard disk controller
# use PNPB0xx instead)
#--Display Adapters--
# PNP0900 # VGA Compatible
# PNP0901 # Video Seven VRAM/VRAM II/1024i
# PNP0901 # Video Seven VRAM/VRAM II/1024i
# PNP0902 # 8514/A Compatible
# PNP0903 # Trident VGA
# PNP0904 # Cirrus Logic Laptop VGA
@ -125,9 +125,9 @@ wdc PNP0600 # Generic ESDI/IDE/ATA compatible hard disk controller
# PNP0C03 # Plug and Play BIOS Event Notification Interrupt
# PNP0C04 # Math Coprocessor
# PNP0C05 # APM BIOS (Version independent)
# PNP0C06 # Reserved for identification of early Plug and Play
# PNP0C06 # Reserved for identification of early Plug and Play
# BIOS implementation.
# PNP0C07 # Reserved for identification of early Plug and Play
# PNP0C07 # Reserved for identification of early Plug and Play
# BIOS implementation.
#--PCMCIA Controller Chipsets--
@ -325,11 +325,11 @@ sb PNPB002 # Sound Blaster Pro-compatible sound device
sb PNPB003 # Sound Blaster 16-compatible sound device
# PNPB004 # Thunderboard-compatible sound device
# PNPB005 # Adlib-compatible FM synthesizer device
mpu PNPB006 # MPU401 compatible
mpu PNPB006 # MPU401 compatible
# PNPB007 # Microsoft Windows Sound System-compatible sound device
# PNPB008 # Compaq Business Audio
# PNPB009 # Plug and Play Microsoft Windows Sound System Device
# PNPB00A # MediaVision Pro Audio Spectrum
# PNPB00A # MediaVision Pro Audio Spectrum
# (Trantor SCSI enabled, Thunder Chip Disabled)
# PNPB00B # MediaVision Pro Audio 3D
# PNPB00C # MusicQuest MQX-32M
@ -350,7 +350,7 @@ com PNPC000 # Compaq 14400 Modem (TBD)
com PNPC001 # Compaq 2400/9600 Modem (TBD)
#
# Everything else. The following list is exclusively for devices which
# Everything else. The following list is exclusively for devices which
# do not have correct PNPxxx IDs set; in which case we must match on the
# vendor specific ID
#

6
sys/dev/isa/sb.c
View file

@ -154,8 +154,8 @@ sbmatch(struct sbdsp_softc *sc)
}
if (0 <= sc->sc_drq16 && sc->sc_drq16 <= 3)
/*
* XXX Some ViBRA16 cards seem to have two 8 bit DMA
/*
* XXX Some ViBRA16 cards seem to have two 8 bit DMA
* channels. I've no clue how to use them, so ignore
* one of them for now. -- augustss@netbsd.org
*/
@ -171,7 +171,7 @@ sbmatch(struct sbdsp_softc *sc)
}
} else
sc->sc_drq16 = sc->sc_drq8;
if (ISSBPROCLASS(sc)) {
if (!SBP_IRQ_VALID(sc->sc_irq)) {
DPRINTF(("%s: configured irq %d invalid\n",

2
sys/dev/isa/sb_isa.c
View file

@ -140,7 +140,7 @@ sb_isa_attach(struct device *parent, struct device *self, void *aux)
struct sbdsp_softc *sc = (struct sbdsp_softc *)self;
struct isa_attach_args *ia = aux;
if (!sbfind(parent, sc, ia) ||
if (!sbfind(parent, sc, ia) ||
bus_space_map(sc->sc_iot, ia->ia_iobase, ia->ia_iosize, 0,
&sc->sc_ioh)) {
printf("%s: sbfind failed\n", sc->sc_dev.dv_xname);

2
sys/dev/isa/sb_isapnp.c
View file

@ -94,7 +94,7 @@ sb_isapnp_attach(struct device *parent, struct device *self, void *aux)
sc->sc_iobase = ia->ipa_io[0].base;
sc->sc_ic = ia->ia_ic;
sc->sc_drq8 = ia->ipa_drq[0].num;
if (ia->ipa_ndrq > 1 && ia->ipa_drq[0].num != ia->ipa_drq[1].num) {
/* Some cards have the 16 bit drq first */
if (sc->sc_drq8 >= 4) {

4
sys/dev/isa/sbdsp.c
View file

@ -1074,7 +1074,7 @@ sbdsp_trigger_input(void *addr, void *start, void *end, int blksize,
#ifdef DIAGNOSTIC
if (sc->sc_i.dmachan != sc->sc_drq8) {
printf("sbdsp_trigger_input: width=%d bad chan %d\n",
width, sc->sc_i.dmachan);
width, sc->sc_i.dmachan);
return (EIO);
}
#endif
@ -1332,7 +1332,7 @@ sbdsp_intr(void *arg)
mtx_enter(&audio_lock);
DPRINTFN(2, ("sbdsp_intr: intr8=%p, intr16=%p\n",
sc->sc_intr8, sc->sc_intr16));
if (ISSB16CLASS(sc)) {
if (ISSB16CLASS(sc)) {
bus_space_write_1(sc->sc_iot, sc->sc_ioh,
SBP_MIXER_ADDR, SBP_IRQ_STATUS);
delay(20);

4
sys/dev/isa/sbreg.h
View file

@ -179,7 +179,7 @@
* DSP commands. This unit handles MIDI and audio capabilities.
* The DSP can be reset, data/commands can be read or written to it,
* and it can generate interrupts. Interrupts are generated for MIDI
* input or DMA completion. They seem to have neglected the fact
* input or DMA completion. They seem to have neglected the fact
* that it would be nice to have a MIDI transmission complete interrupt.
* Worse, the DMA engine is half-duplex. This means you need to do
* (timed) programmed I/O to be able to record and play simultaneously.
@ -281,7 +281,7 @@
#define SB_IRQ_VALID(irq) ((irq) == 3 || (irq) == 5 || (irq) == 7 || (irq) == 9)
#define SB16_DRQ_VALID(chan) ((chan) == 0 || (chan) == 1 || (chan) == 3 || \
(chan) == 5 || (chan) == 6 || (chan) == 7)
(chan) == 5 || (chan) == 6 || (chan) == 7)
#define SBP_DRQ_VALID(chan) ((chan) == 0 || (chan) == 1 || (chan) == 3)
#define SB_DRQ_VALID(chan) ((chan) == 1)

2
sys/dev/isa/skgpio.c
View file

@ -17,7 +17,7 @@
*/
/*
* Soekris net6501 GPIO and LEDs as implemented by the onboard Xilinx FPGA
* Soekris net6501 GPIO and LEDs as implemented by the onboard Xilinx FPGA
*/
#include <sys/param.h>

4
sys/dev/isa/tcic2_isa.c
View file

@ -257,7 +257,7 @@ tcic_isa_attach(struct device *parent, struct device *self, void *aux)
* apparently missing a bit or more of address lines. (e.g.
* CIRRUS_PD672X with Linksys EthernetCard ne2000 clone in TI
* TravelMate 5000--not clear which is at fault)
*
*
* Add a kludge to detect 10 bit wide buses and deal with them,
* and also a config file option to override the probe.
*/
@ -345,7 +345,7 @@ tcic_isa_chip_intr_establish(pcmcia_chipset_handle_t pch,
return (ih);
}
void
void
tcic_isa_chip_intr_disestablish(pcmcia_chipset_handle_t pch, void *ih)
{
struct tcic_handle *h = (struct tcic_handle *) pch;

12
sys/dev/isa/vga_isa.c
View file

@ -6,17 +6,17 @@
* All rights reserved.
*
* Author: Chris G. Demetriou
*
*
* Permission to use, copy, modify and distribute this software and
* its documentation is hereby granted, provided that both the copyright
* notice and this permission notice appear in all copies of the
* software, derivative works or modified versions, and any portions
* thereof, and that both notices appear in supporting documentation.
*
* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
*
* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
*
*
* Carnegie Mellon requests users of this software to return to
*
* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
@ -47,7 +47,7 @@
#include <dev/isa/vga_isavar.h>
struct vga_isa_softc {
struct device sc_dev;
struct device sc_dev;
#if 0
struct vga_config *sc_vc; /* VGA configuration */
#endif

10
sys/dev/isa/vga_isavar.h
View file

@ -6,17 +6,17 @@
* All rights reserved.
*
* Author: Chris G. Demetriou
*
*
* Permission to use, copy, modify and distribute this software and
* its documentation is hereby granted, provided that both the copyright
* notice and this permission notice appear in all copies of the
* software, derivative works or modified versions, and any portions
* thereof, and that both notices appear in supporting documentation.
*
* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
*
* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
*
*
* Carnegie Mellon requests users of this software to return to
*
* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU

4
sys/dev/isa/viasio.c
View file

@ -416,7 +416,7 @@ viasio_hm_refresh(void *arg)
/* Convert to RPM */
/* XXX: conversion function is guessed */
if (val != 0) {
if (val != 0) {
sc->sc_hm_sensors[VT1211_HMS_FAN1].value =
(sc->sc_hm_clock * 60 / 2) / val;
sc->sc_hm_sensors[VT1211_HMS_FAN1].flags &= ~SENSOR_FINVALID;
@ -432,7 +432,7 @@ viasio_hm_refresh(void *arg)
/* Convert to RPM */
/* XXX: conversion function is guessed */
if (val != 0) {
if (val != 0) {
sc->sc_hm_sensors[VT1211_HMS_FAN2].value =
(sc->sc_hm_clock * 60 / 2) / val;
sc->sc_hm_sensors[VT1211_HMS_FAN2].flags &= ~SENSOR_FINVALID;

2
sys/dev/isa/wdc_isa.c
View file

@ -178,7 +178,7 @@ static void
wdc_isa_dma_setup(struct wdc_isa_softc *sc)
{
if (isa_dmamap_create(sc->sc_isa, sc->sc_drq,
MAXPHYS, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) {
MAXPHYS, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) {
printf("%s: can't create map for drq %d\n",
sc->sc_wdcdev.sc_dev.dv_xname, sc->sc_drq);
sc->sc_wdcdev.cap &= ~WDC_CAPABILITY_DMA;

4
sys/dev/microcode/adw/advmcode.c
View file

@ -4,7 +4,7 @@
/*
* Generic driver definitions and exported functions for the Advanced
* Systems Inc. SCSI controllers
*
*
* Copyright (c) 1998 The NetBSD Foundation, Inc.
* All rights reserved.
*
@ -36,7 +36,7 @@
*/
/*
* advansys.c - Linux Host Driver for AdvanSys SCSI Adapters
*
*
* Copyright (c) 1995-1998 Advanced System Products, Inc.
* All Rights Reserved.
*

2
sys/dev/microcode/adw/advmcode.h
View file

@ -4,7 +4,7 @@
/*
* Generic driver definitions and exported functions for the Advanced
* Systems Inc. SCSI controllers
*
*
* Copyright (c) 1998 The NetBSD Foundation, Inc.
* All rights reserved.
*

4
sys/dev/microcode/adw/adwmcode.c
View file

@ -4,7 +4,7 @@
/*
* Generic driver definitions and exported functions for the Advanced
* Systems Inc. SCSI controllers
*
*
* Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc.
* All rights reserved.
*
@ -36,7 +36,7 @@
*/
/*
* advansys.c - Linux Host Driver for AdvanSys SCSI Adapters
*
*
* Copyright (c) 1995-2000 Advanced System Products, Inc.
* All Rights Reserved.
*

2
sys/dev/microcode/adw/adwmcode.h
View file

@ -4,7 +4,7 @@
/*
* Generic driver definitions and exported functions for the Advanced
* Systems Inc. SCSI controllers
*
*
* Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc.
* All rights reserved.
*

26
sys/dev/microcode/aic7xxx/aic79xx.reg
View file

@ -152,7 +152,7 @@ register SEQINTCODE {
MKMSG_FAILED, /*
* Target completed command
* without honoring our ATN
* request to issue a message.
* request to issue a message.
*/
MISSED_BUSFREE, /*
* The sequencer never saw
@ -1081,7 +1081,7 @@ register SFUNCT {
}
/*
* Data FIFO 0 PCI Status
* Data FIFO 0 PCI Status
*/
register DF0PCISTAT {
address 0x0A0
@ -1098,7 +1098,7 @@ register DF0PCISTAT {
}
/*
* Data FIFO 1 PCI Status
* Data FIFO 1 PCI Status
*/
register DF1PCISTAT {
address 0x0A1
@ -1115,7 +1115,7 @@ register DF1PCISTAT {
}
/*
* S/G PCI Status
* S/G PCI Status
*/
register SGPCISTAT {
address 0x0A2
@ -1131,7 +1131,7 @@ register SGPCISTAT {
}
/*
* CMC PCI Status
* CMC PCI Status
*/
register CMCPCISTAT {
address 0x0A3
@ -1148,7 +1148,7 @@ register CMCPCISTAT {
}
/*
* Overlay PCI Status
* Overlay PCI Status
*/
register OVLYPCISTAT {
address 0x0A4
@ -1266,7 +1266,7 @@ register CMDLENPTR {
* Task Attribute Pointer
* Scb offset for the byte field specifying the attribute byte
* to be used in command packets.
*/
*/
register ATTRPTR {
address 0x026
access_mode RW
@ -1277,7 +1277,7 @@ register ATTRPTR {
* Task Management Flags Pointer
* Scb offset for the byte field specifying the attribute flags
* byte to be used in command packets.
*/
*/
register FLAGPTR {
address 0x027
access_mode RW
@ -3234,7 +3234,7 @@ register FLAGS {
/*
* Sequencer Interrupt Control
*/
*/
register SEQINTCTL {
address 0x0D9
access_mode RW
@ -3373,7 +3373,7 @@ register DINDIR {
* Function One
* 2's complement to bit value conversion. Write the 2's complement value
* (0-7 only) to the top nibble and retrieve the bit indexed by that value
* on the next read of this register.
* on the next read of this register.
* Example:
* Write 0x60
* Read 0x40
@ -3616,7 +3616,7 @@ scratch_ram {
size 1
}
/*
* The last bus phase as seen by the sequencer.
* The last bus phase as seen by the sequencer.
*/
LASTPHASE {
size 1
@ -3650,7 +3650,7 @@ scratch_ram {
KERNEL_TQINPOS {
size 1
}
TQINPOS {
TQINPOS {
size 1
}
/*
@ -3865,7 +3865,7 @@ scb {
SCB_TASK_ATTRIBUTE {
size 1
/*
* Overloaded field for non-packetized
* Overloaded field for non-packetized
* ignore wide residue message handling.
*/
field SCB_XFERLEN_ODD 0x01

26
sys/dev/microcode/aic7xxx/aic79xx.seq
View file

@ -178,7 +178,7 @@ gsfifo_complete_normally:
* Case 1 can be detected by noticing a non-zero FIFO active
* count in the SCB. In this case, we allow the routine servicing
* the FIFO to complete the SCB.
*
*
* Case 2 implies either a pending or yet to occur save data
* pointers for this same context in the other FIFO. So, if
* we detect case 1, we will properly defer the post of the SCB
@ -264,7 +264,7 @@ qoutfifo_updated:
add A, -1, INT_COALESCING_MINCMDS;
add NONE, A, CMDS_PENDING;
jnc issue_cmdcmplt;
/*
* If coalescing, only coalesce up to the limit
* provided by the host driver.
@ -363,20 +363,20 @@ fetch_new_scb_done:
* immediately. If the queue is not empty, we must
* wait for it to empty before entering this SCB
* into the waiting for selection queue. Otherwise
* our batching and round-robin selection scheme
* our batching and round-robin selection scheme
* could allow commands to be queued out of order.
* To simplify the implementation, we stop pulling
* new commands from the host until the MK_MESSAGE
* SCB can be queued to the waiting for selection
* list.
*/
test A, MK_MESSAGE jz batch_scb;
test A, MK_MESSAGE jz batch_scb;
/*
* If the last SCB is also a MK_MESSAGE SCB, then
* order is preserved even if we batch.
*/
test SCB_CONTROL, MK_MESSAGE jz batch_scb;
test SCB_CONTROL, MK_MESSAGE jz batch_scb;
/*
* Defer this SCB and stop fetching new SCBs until
@ -550,7 +550,7 @@ BEGIN_CRITICAL;
* 2) In a non QAS, protocol allowed phase change,
* the queue is shifted 1 too far. LASTSCB is
* the last SCB that was correctly processed.
*
*
* 3) In the QAS case, if the full list of commands
* was successfully sent, NEXTSCB is NULL and neither
* CURRSCB nor LASTSCB can be trusted. We must
@ -894,7 +894,7 @@ p_command_from_host:
jmp p_command_xfer;
p_command_embedded:
bmov SHCNT[0], SCB_CDB_LEN, 1;
bmov DFDAT, SCB_CDB_STORE, 16;
bmov DFDAT, SCB_CDB_STORE, 16;
mvi DFCNTRL, SCSIEN;
p_command_xfer:
and SEQ_FLAGS, ~NO_CDB_SENT;
@ -956,7 +956,7 @@ p_status_okay:
* associated with this target is set, we will also interrupt the host,
* thereby allowing it to send a message on the next selection regardless
* of the transaction being sent.
*
*
* If MSG_OUT is == HOST_MSG, also interrupt the host and take a message.
* This is done to allow the host to send messages outside of an identify
* sequence while protecting the sequencer from testing the MK_MESSAGE bit
@ -1389,7 +1389,7 @@ msgin_rdptrs_get_fifo:
call allocate_fifo;
jmp mesgin_done;
phase_lock:
phase_lock:
if ((ahd->bugs & AHD_EARLY_REQ_BUG) != 0) {
/*
* Don't ignore persistent REQ assertions just because
@ -1632,7 +1632,7 @@ p_data:
test SEQ_FLAGS, NOT_IDENTIFIED|NO_CDB_SENT jz p_data_allowed;
SET_SEQINTCODE(PROTO_VIOLATION)
p_data_allowed:
test SEQ_FLAGS, DPHASE jz data_phase_initialize;
/*
@ -1733,7 +1733,7 @@ data_phase_finish:
/*
* If the target has left us in data phase, loop through
* the dma code again. We will only loop if there is a
* data overrun.
* data overrun.
*/
if ((ahd->flags & AHD_TARGETROLE) != 0) {
test SSTAT0, TARGET jnz data_phase_done;
@ -1823,7 +1823,7 @@ sgptr_fixup:
test SG_CACHE_SHADOW, 0x80 jz sgptr_fixup_done;
test SCB_RESIDUAL_SGPTR[0], 0x80 jnz sgptr_fixup_done;
add SCB_RESIDUAL_SGPTR[1], -1;
adc SCB_RESIDUAL_SGPTR[2], -1;
adc SCB_RESIDUAL_SGPTR[2], -1;
adc SCB_RESIDUAL_SGPTR[3], -1;
sgptr_fixup_done:
and SCB_RESIDUAL_SGPTR[0], SG_ADDR_MASK, SG_CACHE_SHADOW;
@ -1867,7 +1867,7 @@ export seq_isr:
* (DIRECTION set in DFCNTRL). The delay is performed by
* disabling SCSIEN until we see the first REQ from the
* target.
*
*
* First instruction in an ISR cannot be a branch on
* Rev A. Snapshot LQISTAT2 so the status is not missed
* and deffer the test by one instruction.

36
sys/dev/microcode/aic7xxx/aic7xxx.reg
View file

@ -158,7 +158,7 @@ register SCSISIGO {
mask P_MESGIN CDI|IOI|MSGI
}
/*
/*
* SCSI Rate Control (p. 3-17).
* Contents of this register determine the Synchronous SCSI data transfer
* rate and the maximum synchronous Req/Ack offset. An offset of 0 in the
@ -219,7 +219,7 @@ register SCSIDATH {
* across the SCSI bus. The counter is decremented only once
* the data has been safely transferred. SDONE in SSTAT0 is
* set when STCNT goes to 0
*/
*/
register STCNT {
address 0x008
size 3
@ -483,7 +483,7 @@ register SPIOCAP {
access_mode RW
field SOFT1 0x80
field SOFT0 0x40
field SOFTCMDEN 0x20
field SOFTCMDEN 0x20
field EXT_BRDCTL 0x10 /* External Board control */
field SEEPROM 0x08 /* External serial eeprom logic */
field EEPROM 0x04 /* Writable external BIOS ROM */
@ -518,19 +518,19 @@ register BRDCTL {
* port is not busy servicing another request, it reconfigures
* to allow access to the serial EEPROM. When this happens, SEERDY
* gets set high to verify that the memory port access has been
* granted.
* granted.
*
* After successful arbitration for the memory port, the SEECS bit of
* the SEECTL register is connected to the chip select. The SEECK,
* SEEDO, and SEEDI are connected to the clock, data out, and data in
* lines respectively. The SEERDY bit of SEECTL is useful in that it
* gives us an 800 nsec timer. After a write to the SEECTL register,
* the SEERDY goes high 800 nsec later. The one exception to this is
* when we first request access to the memory port. The SEERDY goes
* high to signify that access has been granted and, for this case, has
* After successful arbitration for the memory port, the SEECS bit of
* the SEECTL register is connected to the chip select. The SEECK,
* SEEDO, and SEEDI are connected to the clock, data out, and data in
* lines respectively. The SEERDY bit of SEECTL is useful in that it
* gives us an 800 nsec timer. After a write to the SEECTL register,
* the SEERDY goes high 800 nsec later. The one exception to this is
* when we first request access to the memory port. The SEERDY goes
* high to signify that access has been granted and, for this case, has
* no implied timing.
*
* See 93cx6.c for detailed information on the protocol necessary to
* See 93cx6.c for detailed information on the protocol necessary to
* read the serial EEPROM.
*/
register SEECTL {
@ -807,7 +807,7 @@ register INTSTAT {
field SEQINT 0x01
mask BAD_PHASE SEQINT /* unknown scsi bus phase */
mask SEND_REJECT 0x10|SEQINT /* sending a message reject */
mask PROTO_VIOLATION 0x20|SEQINT /* SCSI protocol violation */
mask PROTO_VIOLATION 0x20|SEQINT /* SCSI protocol violation */
mask NO_MATCH 0x30|SEQINT /* no cmd match for reconnect */
mask IGN_WIDE_RES 0x40|SEQINT /* Complex IGN Wide Res Msg */
mask PDATA_REINIT 0x50|SEQINT /*
@ -840,7 +840,7 @@ register INTSTAT {
mask MKMSG_FAILED 0xa0|SEQINT /*
* Target completed command
* without honoring our ATN
* request to issue a message.
* request to issue a message.
*/
mask MISSED_BUSFREE 0xb0|SEQINT /*
* The sequencer never saw
@ -1360,7 +1360,7 @@ scratch_ram {
size 1
}
/*
* The last bus phase as seen by the sequencer.
* The last bus phase as seen by the sequencer.
*/
LASTPHASE {
size 1
@ -1437,7 +1437,7 @@ scratch_ram {
KERNEL_TQINPOS {
size 1
}
TQINPOS {
TQINPOS {
size 1
}
ARG_1 {
@ -1539,7 +1539,7 @@ scratch_ram {
address 0x05f
size 1
mask BIOSMODE 0x30
mask BIOSDISABLED 0x30
mask BIOSDISABLED 0x30
field CHANNEL_B_PRIMARY 0x08
}
}

48
sys/dev/microcode/aic7xxx/aic7xxx.seq
View file

@ -57,9 +57,9 @@ PREFIX = "ahc_"
* on just in case the reselection wins so that we can retry the selection at
* a later time. This problem cannot be resolved by holding a single entry
* in scratch ram since a reconnecting target can request sense and this will
* create yet another SCB waiting for selection. The solution used here is to
* create yet another SCB waiting for selection. The solution used here is to
* use byte 27 of the SCB as a psuedo-next pointer and to thread a list
* of SCBs that are awaiting selection. Since 0-0xfe are valid SCB indexes,
* of SCBs that are awaiting selection. Since 0-0xfe are valid SCB indexes,
* SCB_LIST_NULL is 0xff which is out of range. An entry is also added to
* this list everytime a request sense occurs or after completing a non-tagged
* command for which a second SCB has been queued. The sequencer will
@ -104,7 +104,7 @@ BEGIN_CRITICAL;
mov ARG_1, NEXT_QUEUED_SCB;
/*
* We have at least one queued SCB now and we don't have any
* We have at least one queued SCB now and we don't have any
* SCBs in the list of SCBs awaiting selection. Allocate a
* card SCB for the host's SCB and get to work on it.
*/
@ -282,7 +282,7 @@ select_in:
} else {
mov DFDAT, DINDEX;
}
/*
* If the initiator doesn't feel like providing a tag number,
* we've got a failed selection and must transition to bus
@ -401,7 +401,7 @@ set_transfer_settings:
if ((ahc->features & AHC_ULTRA) != 0) {
test SCB_CONTROL, ULTRAENB jz . + 2;
or SXFRCTL0, FAST20;
}
}
/*
* Initialize SCSIRATE with the appropriate value for this target.
*/
@ -413,7 +413,7 @@ set_transfer_settings:
if ((ahc->flags & AHC_TARGETROLE) != 0) {
/*
* We carefully toggle SPIOEN to allow us to return the
* We carefully toggle SPIOEN to allow us to return the
* message byte we receive so it can be checked prior to
* driving REQ on the bus for the next byte.
*/
@ -481,7 +481,7 @@ target_synccmd:
* to go through.
*/
mov SEQ_FLAGS, SCB_TARGET_PHASES;
test SCB_CONTROL, MK_MESSAGE jz target_ITloop;
mvi P_MESGIN|BSYO call change_phase;
jmp host_target_message_loop;
@ -499,7 +499,7 @@ target_ITloop:
* No more work to do. Either disconnect or not depending
* on the state of NO_DISCONNECT.
*/
test SEQ_FLAGS, NO_DISCONNECT jz target_disconnect;
test SEQ_FLAGS, NO_DISCONNECT jz target_disconnect;
mvi TARG_IMMEDIATE_SCB, SCB_LIST_NULL;
call complete_target_cmd;
if ((ahc->flags & AHC_PAGESCBS) != 0) {
@ -520,7 +520,7 @@ target_mesgout_pending:
and SEQ_FLAGS2, ~TARGET_MSG_PENDING;
/* Local Processing goes here... */
jmp host_target_message_loop;
target_disconnect:
mvi P_MESGIN|BSYO call change_phase;
test SEQ_FLAGS, DPHASE jz . + 2;
@ -558,7 +558,7 @@ target_cmdphase:
jmp target_busfree_wait;
mvi STATUS_BUSY call target_outb;
jmp target_busfree_wait;
tqinfifo_has_space:
tqinfifo_has_space:
mvi P_COMMAND|BSYO call change_phase;
call target_inb;
mov A, DINDEX;
@ -620,7 +620,7 @@ target_sphase:
/* MSG_CMDCMPLT is 0, but we can't do an immediate of 0 */
mov ALLZEROS call target_outb;
jmp target_busfree_wait;
complete_target_cmd:
test SEQ_FLAGS, TARG_CMD_PENDING jnz . + 2;
mov SCB_TAG jmp complete_post;
@ -689,7 +689,7 @@ await_busfree:
test SSTAT1, BUSFREE jnz poll_for_work;
mvi MISSED_BUSFREE call set_seqint;
}
clear_target_state:
/*
* We assume that the kernel driver may reset us
@ -792,7 +792,7 @@ idle_sg_avail:
if ((ahc->bugs & AHC_PCI_MWI_BUG) != 0 && ahc->pci_cachesize != 0) {
/*
* Calculate the trailing portion of this S/G segment that cannot
* be transferred using memory write and invalidate PCI transactions.
* be transferred using memory write and invalidate PCI transactions.
* XXX Can we optimize this for PCI writes only???
*/
calc_mwi_residual:
@ -1001,7 +1001,7 @@ sgptr_fixup:
test SG_CACHE_SHADOW, 0x80 jz sgptr_fixup_done;
test SCB_RESIDUAL_SGPTR[0], 0x80 jnz sgptr_fixup_done;
add SCB_RESIDUAL_SGPTR[1], -1;
adc SCB_RESIDUAL_SGPTR[2], -1;
adc SCB_RESIDUAL_SGPTR[2], -1;
adc SCB_RESIDUAL_SGPTR[3], -1;
sgptr_fixup_done:
and SCB_RESIDUAL_SGPTR[0], SG_ADDR_MASK, SG_CACHE_SHADOW;
@ -1146,7 +1146,7 @@ dma_dmadone:
dma_halt:
/*
* Some revisions of the aic78XX have a problem where, if the
* data fifo is full, but the PCI input latch is not empty,
* data fifo is full, but the PCI input latch is not empty,
* HDMAEN cannot be cleared. The fix used here is to drain
* the prefetched but unused data from the data fifo until
* there is space for the input latch to drain.
@ -1162,7 +1162,7 @@ dma_halt:
test STCNT[2], 0xff jnz data_phase_finish;
/*
* Advance the scatter-gather pointers if needed
* Advance the scatter-gather pointers if needed
*/
if ((ahc->bugs & AHC_PCI_MWI_BUG) != 0
&& ahc->pci_cachesize != 0) {
@ -1414,7 +1414,7 @@ p_command_embedded:
clr HADDR[0];
if ((ahc->features & AHC_ULTRA2) != 0) {
mvi DFCNTRL, (PRELOADEN|SCSIEN|DIRECTION);
bmov DFDAT, SCB_CDB_STORE, 12;
bmov DFDAT, SCB_CDB_STORE, 12;
} else if ((ahc->features & AHC_CMD_CHAN) != 0) {
if ((ahc->flags & AHC_SCB_BTT) != 0) {
/*
@ -1429,7 +1429,7 @@ p_command_embedded:
} else {
mvi DFCNTRL, (SCSIEN|SDMAEN|DIRECTION|FIFORESET);
}
bmov DFDAT, SCB_CDB_STORE, 12;
bmov DFDAT, SCB_CDB_STORE, 12;
if ((ahc->flags & AHC_SCB_BTT) != 0) {
mvi DFCNTRL, (SCSIEN|SDMAEN|DIRECTION|FIFOFLUSH);
} else {
@ -1485,7 +1485,7 @@ p_status_okay:
* associated with this target is set, we will also interrupt the host,
* thereby allowing it to send a message on the next selection regardless
* of the transaction being sent.
*
*
* If MSG_OUT is == HOST_MSG, also interrupt the host and take a message.
* This is done to allow the host to send messages outside of an identify
* sequence while protecting the sequencer from testing the MK_MESSAGE bit
@ -1608,11 +1608,11 @@ mesgin_done:
* and trigger a completion interrupt. Before doing so, check to see if there
* is a residual or the status byte is something other than STATUS_GOOD (0).
* In either of these conditions, we upload the SCB back to the host so it can
* process this information. In the case of a non zero status byte, we
* process this information. In the case of a non zero status byte, we
* additionally interrupt the kernel driver synchronously, allowing it to
* decide if sense should be retrieved. If the kernel driver wishes to request
* sense, it will fill the kernel SCB with a request sense command, requeue
* it to the QINFIFO and tell us not to post to the QOUTFIFO by setting
* it to the QINFIFO and tell us not to post to the QOUTFIFO by setting
* RETURN_1 to SEND_SENSE.
*/
mesgin_complete:
@ -1633,7 +1633,7 @@ mesgin_complete:
* any status will do. Optimize this fast path.
*/
test SCB_CONTROL, STATUS_RCVD jz mesgin_proto_violation;
test SEQ_FLAGS, NOT_IDENTIFIED|NO_CDB_SENT jz complete_accepted;
test SEQ_FLAGS, NOT_IDENTIFIED|NO_CDB_SENT jz complete_accepted;
/*
* If the target never sent an identify message but instead went
@ -2037,7 +2037,7 @@ target_outb:
test SSTAT0, SPIORDY jz .;
and SXFRCTL0, ~SPIOEN ret;
}
/*
* Locate a disconnected SCB by SCBID. Upon return, SCBPTR and SINDEX will
* be set to the position of the SCB. If the SCB cannot be found locally,
@ -2111,7 +2111,7 @@ post_byte:
phase_lock_perr:
mvi PERR_DETECTED call set_seqint;
phase_lock:
phase_lock:
/*
* If there is a parity error, wait for the kernel to
* see the interrupt and prepare our message response

14
sys/dev/microcode/aic7xxx/aicasm.c
View file

@ -128,7 +128,7 @@ main(int argc, char *argv[])
/* Set Sentinal scope node */
sentinal = scope_alloc();
sentinal->type = SCOPE_ROOT;
includes_search_curdir = 1;
appname = *argv;
regfile = NULL;
@ -552,7 +552,7 @@ output_listing(char *ifilename)
if (func_values == NULL)
stop("Could not malloc", EX_OSERR);
func_values[0] = 0; /* FALSE func */
func_count--;
@ -560,13 +560,13 @@ output_listing(char *ifilename)
* Ask the user to fill in the return values for
* the rest of the functions.
*/
for (cur_func = SLIST_FIRST(&patch_functions);
cur_func != NULL && SLIST_NEXT(cur_func, links) != NULL;
cur_func = SLIST_NEXT(cur_func, links), func_count--) {
int input;
fprintf(stdout, "\n(%s)\n", cur_func->symbol->name);
fprintf(stdout,
"Enter the return value for "
@ -750,7 +750,7 @@ cs_alloc()
if (new_cs == NULL)
stop("Unable to malloc critical_section object", EX_SOFTWARE);
memset(new_cs, 0, sizeof(*new_cs));
TAILQ_INSERT_TAIL(&cs_tailq, new_cs, links);
return new_cs;
}
@ -765,7 +765,7 @@ scope_alloc()
stop("Unable to malloc scope object", EX_SOFTWARE);
memset(new_scope, 0, sizeof(*new_scope));
TAILQ_INIT(&new_scope->inner_scope);
if (SLIST_FIRST(&scope_stack) != NULL) {
TAILQ_INSERT_TAIL(&SLIST_FIRST(&scope_stack)->inner_scope,
new_scope, scope_links);

2
sys/dev/microcode/aic7xxx/aicasm.h
View file

@ -63,7 +63,7 @@ typedef struct path_entry {
SLIST_ENTRY(path_entry) links;
} *path_entry_t;
typedef enum {
typedef enum {
QUOTED_INCLUDE,
BRACKETED_INCLUDE,
SOURCE_FILE

16
sys/dev/microcode/aic7xxx/aicasm_gram.y
View file

@ -307,13 +307,13 @@ reg_definition:
stop("Register multiply defined", EX_DATAERR);
/* NOTREACHED */
}
cur_symbol = $1;
cur_symbol = $1;
cur_symbol->type = cur_symtype;
initialize_symbol(cur_symbol);
}
reg_attribute_list
'}'
{
{
/*
* Default to allowing everything in for registers
* with no bit or mask definitions.
@ -343,7 +343,7 @@ reg_attribute_list:
| reg_attribute_list reg_attribute
;
reg_attribute:
reg_attribute:
reg_address
| size
| access_mode
@ -708,7 +708,7 @@ expression:
;
constant:
T_CONST T_SYMBOL expression
T_CONST T_SYMBOL expression
{
if ($2->type != UNINITIALIZED) {
stop("Re-definition of symbol as a constant",
@ -1513,7 +1513,7 @@ initialize_symbol(symbol_t *symbol)
sizeof(struct cond_info));
break;
case MACRO:
symbol->info.macroinfo =
symbol->info.macroinfo =
(struct macro_info *)malloc(sizeof(struct macro_info));
if (symbol->info.macroinfo == NULL) {
stop("Can't create macro info", EX_SOFTWARE);
@ -1537,7 +1537,7 @@ add_macro_arg(const char *argtext, int argnum)
struct macro_arg *marg;
int i;
int retval;
if (cur_symbol == NULL || cur_symbol->type != MACRO) {
stop("Invalid current symbol for adding macro arg",
@ -1782,7 +1782,7 @@ format_3_instr(int opcode, symbol_ref_t *src,
static void
test_readable_symbol(symbol_t *symbol)
{
if ((symbol->info.rinfo->modes & (0x1 << src_mode)) == 0) {
snprintf(errbuf, sizeof(errbuf),
"Register %s unavailable in source reg mode %d",
@ -1800,7 +1800,7 @@ test_readable_symbol(symbol_t *symbol)
static void
test_writable_symbol(symbol_t *symbol)
{
if ((symbol->info.rinfo->modes & (0x1 << dst_mode)) == 0) {
snprintf(errbuf, sizeof(errbuf),
"Register %s unavailable in destination reg mode %d",

4
sys/dev/microcode/aic7xxx/aicasm_macro_scan.l
View file

@ -2,7 +2,7 @@
/*
/* $OpenBSD: aicasm_macro_scan.l,v 1.4 2004/09/18 19:51:53 mickey Exp $ */
/*
* Sub-Lexical Analyzer for macro invokation in
* Sub-Lexical Analyzer for macro invokation in
* the Aic7xxx SCSI Host adapter sequencer assembler.
*
* Copyright (c) 2001 Adaptec Inc.
@ -144,7 +144,7 @@ MCARG [^(), \t]+
BEGIN ARGLIST;
return T_SYMBOL;
}
. {
. {
snprintf(buf, sizeof(buf), "Invalid character "
"'%c'", mmtext[0]);
stop(buf, EX_DATAERR);

4
sys/dev/microcode/aic7xxx/aicasm_scan.l
View file

@ -129,7 +129,7 @@ if[ \t]*\( {
&& string_buf_ptr != string_buf
&& string_buf_ptr[-1] == ' ')
yptr++;
else
else
*string_buf_ptr++ = *yptr++;
}
}
@ -430,7 +430,7 @@ else { return T_ELSE; }
return T_SYMBOL;
}
}
. {
. {
snprintf(buf, sizeof(buf), "Invalid character "
"'%c'", yytext[0]);
stop(buf, EX_DATAERR);

6
sys/dev/microcode/aic7xxx/aicasm_symbol.c
View file

@ -352,7 +352,7 @@ aic_print_reg_dump_types(FILE *ofile)
{
if (ofile == NULL)
return;
fprintf(ofile,
"typedef int (%sreg_print_t)(u_int, u_int *, u_int);\n"
"typedef struct %sreg_parse_entry {\n"
@ -386,7 +386,7 @@ aic_print_reg_dump_end(FILE *ofile, FILE *dfile,
lower_name = strdup(regnode->symbol->name);
if (lower_name == NULL)
stop("Unable to strdup symbol name", EX_SOFTWARE);
for (letter = lower_name; *letter != '\0'; letter++)
*letter = tolower(*letter);
@ -647,7 +647,7 @@ symtable_dump(FILE *ofile, FILE *dfile)
free(curnode);
}
fprintf(ofile, "\n\n/* Downloaded Constant Definitions */\n");
for (i = 0; SLIST_FIRST(&download_constants) != NULL; i++) {

4
sys/dev/microcode/atmel/atmel_at76c503_i3863_fw.h
View file

@ -13,7 +13,7 @@
* and/or other materials provided with the distribution; and
* 3. The name of Atmel Corporation may not be used to endorse or promote products
* derived from this Firmware without specific prior written consent.
*
*
* DISCLAIMER: ATMEL PROVIDES THIS FIRMWARE "AS IS'' WITH NO WARRANTIES
* OR INDEMNITIES WHATSOEVER. ATMEL EXPRESSLY DISCLAIMS ANY
* EXPRESS, STATUTORY OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
@ -26,7 +26,7 @@
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* FIRMWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*
* USER ACKNOWLEDGES AND AGREES THAT THE PURCHASE OR USE OF THE
* FIRMWARE WILL NOT CREATE OR GIVE GROUNDS FOR A LICENSE BY
* IMPLICATION, ESTOPPEL, OR OTHERWISE IN ANY INTELLECTUAL PROPERTY

4
sys/dev/microcode/atmel/atmel_at76c503_rfmd2_fw.h
View file

@ -13,7 +13,7 @@
* and/or other materials provided with the distribution; and
* 3. The name of Atmel Corporation may not be used to endorse or promote products
* derived from this Firmware without specific prior written consent.
*
*
* DISCLAIMER: ATMEL PROVIDES THIS FIRMWARE "AS IS'' WITH NO WARRANTIES
* OR INDEMNITIES WHATSOEVER. ATMEL EXPRESSLY DISCLAIMS ANY
* EXPRESS, STATUTORY OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
@ -26,7 +26,7 @@
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* FIRMWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*
* USER ACKNOWLEDGES AND AGREES THAT THE PURCHASE OR USE OF THE
* FIRMWARE WILL NOT CREATE OR GIVE GROUNDS FOR A LICENSE BY
* IMPLICATION, ESTOPPEL, OR OTHERWISE IN ANY INTELLECTUAL PROPERTY

4
sys/dev/microcode/atmel/atmel_at76c503_rfmd_acc_fw.h
View file

@ -13,7 +13,7 @@
* and/or other materials provided with the distribution; and
* 3. The name of Atmel Corporation may not be used to endorse or promote products
* derived from this Firmware without specific prior written consent.
*
*
* DISCLAIMER: ATMEL PROVIDES THIS FIRMWARE "AS IS'' WITH NO WARRANTIES
* OR INDEMNITIES WHATSOEVER. ATMEL EXPRESSLY DISCLAIMS ANY
* EXPRESS, STATUTORY OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
@ -26,7 +26,7 @@
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* FIRMWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*
* USER ACKNOWLEDGES AND AGREES THAT THE PURCHASE OR USE OF THE
* FIRMWARE WILL NOT CREATE OR GIVE GROUNDS FOR A LICENSE BY
* IMPLICATION, ESTOPPEL, OR OTHERWISE IN ANY INTELLECTUAL PROPERTY

4
sys/dev/microcode/atmel/atmel_at76c505_rfmd.h
View file

@ -13,7 +13,7 @@
* and/or other materials provided with the distribution; and
* 3. The name of Atmel Corporation may not be used to endorse or promote products
* derived from this Firmware without specific prior written consent.
*
*
* DISCLAIMER: ATMEL PROVIDES THIS FIRMWARE "AS IS'' WITH NO WARRANTIES
* OR INDEMNITIES WHATSOEVER. ATMEL EXPRESSLY DISCLAIMS ANY
* EXPRESS, STATUTORY OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
@ -26,7 +26,7 @@
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* FIRMWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*
* USER ACKNOWLEDGES AND AGREES THAT THE PURCHASE OR USE OF THE
* FIRMWARE WILL NOT CREATE OR GIVE GROUNDS FOR A LICENSE BY
* IMPLICATION, ESTOPPEL, OR OTHERWISE IN ANY INTELLECTUAL PROPERTY

4
sys/dev/microcode/atmel/atmel_intersil_fw.h
View file

@ -14,7 +14,7 @@
* and/or other materials provided with the distribution; and
* 3. The name of Atmel Corporation may not be used to endorse or promote products
* derived from this Firmware without specific prior written consent.
*
*
* DISCLAIMER: ATMEL PROVIDES THIS FIRMWARE "AS IS'' WITH NO WARRANTIES
* OR INDEMNITIES WHATSOEVER. ATMEL EXPRESSLY DISCLAIMS ANY
* EXPRESS, STATUTORY OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
@ -27,7 +27,7 @@
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* FIRMWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*
* USER ACKNOWLEDGES AND AGREES THAT THE PURCHASE OR USE OF THE
* FIRMWARE WILL NOT CREATE OR GIVE GROUNDS FOR A LICENSE BY
* IMPLICATION, ESTOPPEL, OR OTHERWISE IN ANY INTELLECTUAL PROPERTY

6
sys/dev/microcode/atmel/atmel_rfmd2958-smc_fw.h
View file

@ -13,7 +13,7 @@
* and/or other materials provided with the distribution; and
* 3. The name of Atmel Corporation may not be used to endorse or promote products
* derived from this Firmware without specific prior written consent.
*
*
* DISCLAIMER: ATMEL PROVIDES THIS FIRMWARE "AS IS'' WITH NO WARRANTIES
* OR INDEMNITIES WHATSOEVER. ATMEL EXPRESSLY DISCLAIMS ANY
* EXPRESS, STATUTORY OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
@ -26,7 +26,7 @@
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* FIRMWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*
* USER ACKNOWLEDGES AND AGREES THAT THE PURCHASE OR USE OF THE
* FIRMWARE WILL NOT CREATE OR GIVE GROUNDS FOR A LICENSE BY
* IMPLICATION, ESTOPPEL, OR OTHERWISE IN ANY INTELLECTUAL PROPERTY
@ -34,7 +34,7 @@
* PROPRIETARY RIGHT) EMBODIED IN ANY OTHER ATMEL HARDWARE OR
* FIRMWARE EITHER SOLELY OR IN COMBINATION WITH THE FIRMWARE.
*/
unsigned char atmel_fw_rfmd2958_smc_int[] = {
0x80,0xf1,0x9f,0xe5,0x80,0xf1,0x9f,0xe5,0x80,0xf1,0x9f,0xe5,0x80,0xf1,
0x9f,0xe5,0x80,0xf1,0x9f,0xe5,0x80,0xf1,0x9f,0xe5,0x80,0xf1,0x9f,0xe5,

4
sys/dev/microcode/atmel/atmel_rfmd2958_fw.h
View file

@ -14,7 +14,7 @@
* and/or other materials provided with the distribution; and
* 3. The name of Atmel Corporation may not be used to endorse or promote products
* derived from this Firmware without specific prior written consent.
*
*
* DISCLAIMER: ATMEL PROVIDES THIS FIRMWARE "AS IS'' WITH NO WARRANTIES
* OR INDEMNITIES WHATSOEVER. ATMEL EXPRESSLY DISCLAIMS ANY
* EXPRESS, STATUTORY OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
@ -27,7 +27,7 @@
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* FIRMWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*
* USER ACKNOWLEDGES AND AGREES THAT THE PURCHASE OR USE OF THE
* FIRMWARE WILL NOT CREATE OR GIVE GROUNDS FOR A LICENSE BY
* IMPLICATION, ESTOPPEL, OR OTHERWISE IN ANY INTELLECTUAL PROPERTY

5050
sys/dev/microcode/atmel/atmel_rfmd_fw.h
View file

File diff suppressed because it is too large Load diff

4
sys/dev/microcode/atmel/atu-license
View file

@ -7,7 +7,7 @@
* and/or other materials provided with the distribution; and
* 3. The name of Atmel Corporation may not be used to endorse or promote products
* derived from this Firmware without specific prior written consent.
*
*
* DISCLAIMER: ATMEL PROVIDES THIS FIRMWARE "AS IS'' WITH NO WARRANTIES
* OR INDEMNITIES WHATSOEVER. ATMEL EXPRESSLY DISCLAIMS ANY
* EXPRESS, STATUTORY OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
@ -20,7 +20,7 @@
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* FIRMWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*
* USER ACKNOWLEDGES AND AGREES THAT THE PURCHASE OR USE OF THE
* FIRMWARE WILL NOT CREATE OR GIVE GROUNDS FOR A LICENSE BY
* IMPLICATION, ESTOPPEL, OR OTHERWISE IN ANY INTELLECTUAL PROPERTY

2
sys/dev/microcode/bnx/bnxfw.h
View file

@ -11087,7 +11087,7 @@ static u_int32_t bnx_xi_rv2p_proc2[] = {
0x00000010, 0x001f0000,
0x00000018, 0x8000fe35,
};
static u_int32_t bnx_xi90_rv2p_proc1[] = {
0x00000010, 0xb1800006,

26870
sys/dev/microcode/cyclades/cyzfirm.h
View file

File diff suppressed because it is too large Load diff

2
sys/dev/microcode/esa/esadsp.h
View file

@ -28,7 +28,7 @@
/*
* ESS Allegro-1 / Maestro3 Audio Driver
*
*
* Lots of magic based on the FreeBSD maestro3 driver and
* reverse engineering.
* Original driver by Don Kim.

30
sys/dev/microcode/fxp/rcvbundl.h
View file

@ -1,22 +1,22 @@
/* $OpenBSD: rcvbundl.h,v 1.2 2005/04/24 20:41:34 brad Exp $ */
/*
Copyright (c) 1999-2001, Intel Corporation
Copyright (c) 1999-2001, Intel Corporation
All rights reserved.
Redistribution and use in source and binary forms, with or without
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
1. Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of Intel Corporation nor the names of its contributors
may be used to endorse or promote products derived from this software
3. Neither the name of Intel Corporation nor the names of its contributors
may be used to endorse or promote products derived from this software
without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
@ -25,10 +25,10 @@ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*
rcvbundl.h
@ -38,7 +38,7 @@ Date: 05/30/2000
Version: 3.28
This file contains the loadable micro code arrays to implement receive bundling on the
D101 A-step, D101 B-step, D101M (B-step only), D101S, D102 B-step,
D101 A-step, D101 B-step, D101M (B-step only), D101S, D102 B-step,
D102 B-step with TCO work around, D102 C-step and D102 E-step.
Each controller has its own specific micro code array. The array for one controller
@ -92,7 +92,7 @@ rcvbundl.h file given above).
*
* The current default is 0xFF80, which masks out the lower 7 bits.
* This means that any frame which is x7F (127) bytes or smaller
* will cause an immediate interrupt. Because this value must be a
* will cause an immediate interrupt. Because this value must be a
* bit mask, there are only a few valid values that can be used. To
* turn this feature off, the driver can write the value xFFFF to the
* lower word of this instruction (in the same way that the other
@ -650,7 +650,7 @@ rcvbundl.h file given above).
still need to be loaded. Before this happens, the hit addresses
for the CPUSaver algorithm must be set to 0x1FFFF. The hit
addresses for CPUSaver are (starting with 0, and remember that
*/
/* Parameter values for the D102 B-step */
@ -809,7 +809,7 @@ rcvbundl.h file given above).
/*
This version is a fix to TCO bug. This version can be loaded instead
the CPUSaver version by modifing the registry key "LoadTcoUCodeInsteadOfCpuSaver"
*/
@ -967,8 +967,8 @@ rcvbundl.h file given above).
#if 0
// this uCode include the CPU Saver and the TCO work around
//for IP fregments.
// this uCode include the CPU Saver and the TCO work around
//for IP fregments.
#endif
#define D102_C_RCVBUNDLE_UCODE \
{ \

2
sys/dev/microcode/isp/asm_1040.h
View file

@ -23,7 +23,7 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
*/
/************************************************************************
* *

2
sys/dev/microcode/isp/asm_1080.h
View file

@ -23,7 +23,7 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
*/
#ifndef ISP_TARGET_MODE
/************************************************************************

2
sys/dev/microcode/isp/asm_12160.h
View file

@ -24,7 +24,7 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
*/
/************************************************************************
* *

2
sys/dev/microcode/isp/asm_2100.h
View file

@ -23,7 +23,7 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
*/
/*
* Some very early boards have problems loading firmware that is larger than

2
sys/dev/microcode/isp/asm_2200.h
View file

@ -24,7 +24,7 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
*/
/************************************************************************
* *

2
sys/dev/microcode/isp/asm_2300.h
View file

@ -24,7 +24,7 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
*/
/************************************************************************
* *

2
sys/dev/microcode/isp/asm_2400.h
View file

@ -24,7 +24,7 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
*/
/************************************************************************
* --- ISP2400 Initiator/Target Firmware with support --- *

2
sys/dev/microcode/isp/asm_2500.h
View file

@ -23,7 +23,7 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
*/
/* ******************************************************************** *
* *
* ISP2500 Firmware *

2
sys/dev/microcode/isp/asm_sbus.h
View file

@ -24,7 +24,7 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
*/
#define ISP_1000_RISC_CODE isp_1000_risc_code
#ifndef ISP_TARGET_MODE

2
sys/dev/microcode/myx/eth_z8e.h
View file

@ -30,7 +30,7 @@ $FreeBSD$
static unsigned int eth_z8e_uncompressed_length = 377284 ;
static unsigned int eth_z8e_length = 120629 ;
static unsigned char eth_z8e[120629 + 1] =
static unsigned char eth_z8e[120629 + 1] =
"\x78\x9c\xec\xbd\x7f\x78\x54\xd5\xb5\x3f\xbc\x32\x19\x60\x12\x03"
"\x13\x31\xe2\x94\x62\x1d\x2d\xd8\x68\x51\x82\x62\x4d\x2d\x68\x14"
"\xd0\xa8\xfc\x88\x8a\x6d\x54\x34\xa0\x01\x83\x46\x88\x10\x61\x80"

2
sys/dev/microcode/myx/ethp_z8e.h
View file

@ -30,7 +30,7 @@ $FreeBSD$
static unsigned int ethp_z8e_uncompressed_length = 387604 ;
static unsigned int ethp_z8e_length = 121317 ;
static unsigned char ethp_z8e[121317 + 1] =
static unsigned char ethp_z8e[121317 + 1] =
"\x78\x9c\xec\xbd\x7f\x7c\x54\xc5\xd5\x3f\x7e\xb2\x59\x60\x13\x03"
"\x1b\x31\xe2\x96\x62\x5d\x2d\xd8\x68\x51\x82\x62\x4d\x2d\x68\x14"
"\xd0\xa8\xfc\x88\x4a\xdb\xa8\x68\x82\x06\x0c\x1a\x21\x42\x80\x05"

2
sys/dev/microcode/rum/microcode.h
View file

@ -209,7 +209,7 @@ static const uint8_t rt2573[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x07,
0x29, 0xe9
0x29, 0xe9
};
static const uint8_t rt2870[] = {

6
sys/dev/microcode/siop/ncr53cxxx.c
View file

@ -161,7 +161,7 @@ struct ncrregs regs[] = {
{"sbdl", {0x0a, 0x0a, -1, -1, -1}},
{"socl", { -1, -1, 0x09, 0x09, 0x09}},
{"ssid", { -1, -1, 0x0a, 0x0a, 0x0a}},
{"sbcl", {0x0b, 0x0b, 0x0b, 0x0b, 0x0b}},
{"sbcl", {0x0b, 0x0b, 0x0b, 0x0b, 0x0b}},
{"dstat", {0x0c, 0x0c, 0x0c, 0x0c, 0x0c}},
{"sstat0", {0x0d, 0x0d, 0x0d, 0x0d, 0x0d}},
{"sstat1", {0x0e, 0x0e, 0x0e, 0x0e, 0x0e}},
@ -1113,7 +1113,7 @@ void loadstore(int i)
int reg, size;
reg = CheckRegister(i);
if (reg < 0)
if (reg < 0)
errout ("Expected register");
else
inst0 |= reg << 16;
@ -1481,7 +1481,7 @@ char * makefn (base, sub)
char *sub;
{
char *fn;
size_t len = strlen (base) + strlen (sub) + 2;
size_t len = strlen (base) + strlen (sub) + 2;
fn = malloc (len);
strlcpy (fn, base, len);

2
sys/dev/microcode/siop/osiop.ss
View file

@ -1,4 +1,4 @@
; $OpenBSD: osiop.ss,v 1.3 2023/01/04 10:05:44 jsg Exp $
; $OpenBSD: osiop.ss,v 1.3 2023/01/04 10:05:44 jsg Exp $
; $NetBSD: osiop.ss,v 1.1 2001/04/30 04:47:51 tsutsui Exp $
;

2
sys/dev/microcode/symbol/spectrum24t_cf.h
View file

@ -24,7 +24,7 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
*/
/*
* Firmware for Symbol Wireless Networker Spectrum24t CF card.

2
sys/dev/microcode/tht/microcode.h
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2007 Tehuti Networks.
* Copyright (c) 2007 Tehuti Networks.
*
* All rights reserved.
*

2
sys/dev/microcode/tht/tht-license
View file

@ -1,4 +1,4 @@
Copyright (c) 2007 Tehuti Networks.
Copyright (c) 2007 Tehuti Networks.
All rights reserved.

9144
sys/dev/microcode/tigon/ti_fw.h
View file

File diff suppressed because it is too large Load diff

9698
sys/dev/microcode/tigon/ti_fw2.h
View file

File diff suppressed because it is too large Load diff

82
sys/dev/microcode/tusb3410/tusb3410-license
View file

@ -9,52 +9,52 @@ it to be a license under copyright ...
************************************************************
THIS PROGRAM IS PROVIDED "AS IS". TI MAKES NO WARRANTIES OR
REPRESENTATIONS, EITHER EXPRESS, IMPLIED OR STATUTORY,
INCLUDING ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR
COMPLETENESS OF RESPONSES, RESULTS AND LACK OF NEGLIGENCE.
TI DISCLAIMS ANY WARRANTY OF TITLE, QUIET ENJOYMENT, QUIET
POSSESSION, AND NON-INFRINGEMENT OF ANY THIRD PARTY
INTELLECTUAL PROPERTY RIGHTS WITH REGARD TO THE PROGRAM OR
REPRESENTATIONS, EITHER EXPRESS, IMPLIED OR STATUTORY,
INCLUDING ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR
COMPLETENESS OF RESPONSES, RESULTS AND LACK OF NEGLIGENCE.
TI DISCLAIMS ANY WARRANTY OF TITLE, QUIET ENJOYMENT, QUIET
POSSESSION, AND NON-INFRINGEMENT OF ANY THIRD PARTY
INTELLECTUAL PROPERTY RIGHTS WITH REGARD TO THE PROGRAM OR
YOUR USE OF THE PROGRAM.
IN NO EVENT SHALL TI BE LIABLE FOR ANY SPECIAL, INCIDENTAL,
CONSEQUENTIAL OR INDIRECT DAMAGES, HOWEVER CAUSED, ON ANY
THEORY OF LIABILITY AND WHETHER OR NOT TI HAS BEEN ADVISED
OF THE POSSIBILITY OF SUCH DAMAGES, ARISING IN ANY WAY OUT
OF THIS AGREEMENT, THE PROGRAM, OR YOUR USE OF THE PROGRAM.
EXCLUDED DAMAGES INCLUDE, BUT ARE NOT LIMITED TO, COST OF
REMOVAL OR REINSTALLATION, COMPUTER TIME, LABOR COSTS, LOSS
OF GOODWILL, LOSS OF PROFITS, LOSS OF SAVINGS, OR LOSS OF
USE OR INTERRUPTION OF BUSINESS. IN NO EVENT WILL TI'S
AGGREGATE LIABILITY UNDER THIS AGREEMENT OR ARISING OUT OF
YOUR USE OF THE PROGRAM EXCEED FIVE HUNDRED DOLLARS
IN NO EVENT SHALL TI BE LIABLE FOR ANY SPECIAL, INCIDENTAL,
CONSEQUENTIAL OR INDIRECT DAMAGES, HOWEVER CAUSED, ON ANY
THEORY OF LIABILITY AND WHETHER OR NOT TI HAS BEEN ADVISED
OF THE POSSIBILITY OF SUCH DAMAGES, ARISING IN ANY WAY OUT
OF THIS AGREEMENT, THE PROGRAM, OR YOUR USE OF THE PROGRAM.
EXCLUDED DAMAGES INCLUDE, BUT ARE NOT LIMITED TO, COST OF
REMOVAL OR REINSTALLATION, COMPUTER TIME, LABOR COSTS, LOSS
OF GOODWILL, LOSS OF PROFITS, LOSS OF SAVINGS, OR LOSS OF
USE OR INTERRUPTION OF BUSINESS. IN NO EVENT WILL TI'S
AGGREGATE LIABILITY UNDER THIS AGREEMENT OR ARISING OUT OF
YOUR USE OF THE PROGRAM EXCEED FIVE HUNDRED DOLLARS
(U.S.$500).
Unless otherwise stated, the Program written and copyrighted
by Texas Instruments is distributed as "freeware". You may,
only under TI's copyright in the Program, use and modify the
Program without any charge or restriction. You may
distribute to third parties, provided that you transfer a
copy of this license to the third party and the third party
agrees to these terms by its first use of the Program. You
must reproduce the copyright notice and any other legend of
Unless otherwise stated, the Program written and copyrighted
by Texas Instruments is distributed as "freeware". You may,
only under TI's copyright in the Program, use and modify the
Program without any charge or restriction. You may
distribute to third parties, provided that you transfer a
copy of this license to the third party and the third party
agrees to these terms by its first use of the Program. You
must reproduce the copyright notice and any other legend of
ownership on each copy or partial copy, of the Program.
You acknowledge and agree that the Program contains
copyrighted material, trade secrets and other TI proprietary
information and is protected by copyright laws,
international copyright treaties, and trade secret laws, as
well as other intellectual property laws. To protect TI's
rights in the Program, you agree not to decompile, reverse
engineer, disassemble or otherwise translate any object code
versions of the Program to a human-readable form. You agree
that in no event will you alter, remove or destroy any
copyright notice included in the Program. TI reserves all
rights not specifically granted under this license. Except
as specifically provided herein, nothing in this agreement
shall be construed as conferring by implication, estoppel,
or otherwise, upon you, any license or other right under any
You acknowledge and agree that the Program contains
copyrighted material, trade secrets and other TI proprietary
information and is protected by copyright laws,
international copyright treaties, and trade secret laws, as
well as other intellectual property laws. To protect TI's
rights in the Program, you agree not to decompile, reverse
engineer, disassemble or otherwise translate any object code
versions of the Program to a human-readable form. You agree
that in no event will you alter, remove or destroy any
copyright notice included in the Program. TI reserves all
rights not specifically granted under this license. Except
as specifically provided herein, nothing in this agreement
shall be construed as conferring by implication, estoppel,
or otherwise, upon you, any license or other right under any
TI patents, copyrights or trade secrets.
You may not use the Program in non-TI devices.
You may not use the Program in non-TI devices.

84
sys/dev/microcode/tusb3410/tusb3410.h
View file

@ -10,56 +10,56 @@
*
************************************************************
* THIS PROGRAM IS PROVIDED "AS IS". TI MAKES NO WARRANTIES OR
* REPRESENTATIONS, EITHER EXPRESS, IMPLIED OR STATUTORY,
* INCLUDING ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR
* COMPLETENESS OF RESPONSES, RESULTS AND LACK OF NEGLIGENCE.
* TI DISCLAIMS ANY WARRANTY OF TITLE, QUIET ENJOYMENT, QUIET
* POSSESSION, AND NON-INFRINGEMENT OF ANY THIRD PARTY
* INTELLECTUAL PROPERTY RIGHTS WITH REGARD TO THE PROGRAM OR
* REPRESENTATIONS, EITHER EXPRESS, IMPLIED OR STATUTORY,
* INCLUDING ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR
* COMPLETENESS OF RESPONSES, RESULTS AND LACK OF NEGLIGENCE.
* TI DISCLAIMS ANY WARRANTY OF TITLE, QUIET ENJOYMENT, QUIET
* POSSESSION, AND NON-INFRINGEMENT OF ANY THIRD PARTY
* INTELLECTUAL PROPERTY RIGHTS WITH REGARD TO THE PROGRAM OR
* YOUR USE OF THE PROGRAM.
*
* IN NO EVENT SHALL TI BE LIABLE FOR ANY SPECIAL, INCIDENTAL,
* CONSEQUENTIAL OR INDIRECT DAMAGES, HOWEVER CAUSED, ON ANY
* THEORY OF LIABILITY AND WHETHER OR NOT TI HAS BEEN ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGES, ARISING IN ANY WAY OUT
* OF THIS AGREEMENT, THE PROGRAM, OR YOUR USE OF THE PROGRAM.
* EXCLUDED DAMAGES INCLUDE, BUT ARE NOT LIMITED TO, COST OF
* REMOVAL OR REINSTALLATION, COMPUTER TIME, LABOR COSTS, LOSS
* OF GOODWILL, LOSS OF PROFITS, LOSS OF SAVINGS, OR LOSS OF
* USE OR INTERRUPTION OF BUSINESS. IN NO EVENT WILL TI'S
* AGGREGATE LIABILITY UNDER THIS AGREEMENT OR ARISING OUT OF
* YOUR USE OF THE PROGRAM EXCEED FIVE HUNDRED DOLLARS
* IN NO EVENT SHALL TI BE LIABLE FOR ANY SPECIAL, INCIDENTAL,
* CONSEQUENTIAL OR INDIRECT DAMAGES, HOWEVER CAUSED, ON ANY
* THEORY OF LIABILITY AND WHETHER OR NOT TI HAS BEEN ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGES, ARISING IN ANY WAY OUT
* OF THIS AGREEMENT, THE PROGRAM, OR YOUR USE OF THE PROGRAM.
* EXCLUDED DAMAGES INCLUDE, BUT ARE NOT LIMITED TO, COST OF
* REMOVAL OR REINSTALLATION, COMPUTER TIME, LABOR COSTS, LOSS
* OF GOODWILL, LOSS OF PROFITS, LOSS OF SAVINGS, OR LOSS OF
* USE OR INTERRUPTION OF BUSINESS. IN NO EVENT WILL TI'S
* AGGREGATE LIABILITY UNDER THIS AGREEMENT OR ARISING OUT OF
* YOUR USE OF THE PROGRAM EXCEED FIVE HUNDRED DOLLARS
* (U.S.$500).
*
* Unless otherwise stated, the Program written and copyrighted
* by Texas Instruments is distributed as "freeware". You may,
* only under TI's copyright in the Program, use and modify the
* Program without any charge or restriction. You may
* distribute to third parties, provided that you transfer a
* copy of this license to the third party and the third party
* agrees to these terms by its first use of the Program. You
* must reproduce the copyright notice and any other legend of
* Unless otherwise stated, the Program written and copyrighted
* by Texas Instruments is distributed as "freeware". You may,
* only under TI's copyright in the Program, use and modify the
* Program without any charge or restriction. You may
* distribute to third parties, provided that you transfer a
* copy of this license to the third party and the third party
* agrees to these terms by its first use of the Program. You
* must reproduce the copyright notice and any other legend of
* ownership on each copy or partial copy, of the Program.
*
* You acknowledge and agree that the Program contains
* copyrighted material, trade secrets and other TI proprietary
* information and is protected by copyright laws,
* international copyright treaties, and trade secret laws, as
* well as other intellectual property laws. To protect TI's
* rights in the Program, you agree not to decompile, reverse
* engineer, disassemble or otherwise translate any object code
* versions of the Program to a human-readable form. You agree
* that in no event will you alter, remove or destroy any
* copyright notice included in the Program. TI reserves all
* rights not specifically granted under this license. Except
* as specifically provided herein, nothing in this agreement
* shall be construed as conferring by implication, estoppel,
* or otherwise, upon you, any license or other right under any
* You acknowledge and agree that the Program contains
* copyrighted material, trade secrets and other TI proprietary
* information and is protected by copyright laws,
* international copyright treaties, and trade secret laws, as
* well as other intellectual property laws. To protect TI's
* rights in the Program, you agree not to decompile, reverse
* engineer, disassemble or otherwise translate any object code
* versions of the Program to a human-readable form. You agree
* that in no event will you alter, remove or destroy any
* copyright notice included in the Program. TI reserves all
* rights not specifically granted under this license. Except
* as specifically provided herein, nothing in this agreement
* shall be construed as conferring by implication, estoppel,
* or otherwise, upon you, any license or other right under any
* TI patents, copyrights or trade secrets.
*
* You may not use the Program in non-TI devices.
* You may not use the Program in non-TI devices.
*/
#ifndef _UTICOM_FW3410_H_

2
sys/dev/microcode/typhoon/3c990-license
View file

@ -1,4 +1,4 @@
* Copyright 1999-2003 3Com Corporation. All Rights Reserved.
* Copyright 1999-2003 3Com Corporation. All Rights Reserved.
*
* Redistribution and use in source and binary forms of the 3c990img.h
* microcode software are permitted provided that the following conditions

8526
sys/dev/microcode/typhoon/3c990img.h
View file

File diff suppressed because it is too large Load diff

10
sys/dev/mii/brgphy.c
View file

@ -94,8 +94,8 @@ void brgphy_jumbo_settings(struct mii_softc *);
void brgphy_eth_wirespeed(struct mii_softc *);
void brgphy_bcm54xx_clock_delay(struct mii_softc *);
const struct mii_phy_funcs brgphy_copper_funcs = {
brgphy_service, brgphy_copper_status, brgphy_reset,
const struct mii_phy_funcs brgphy_copper_funcs = {
brgphy_service, brgphy_copper_status, brgphy_reset,
};
const struct mii_phy_funcs brgphy_fiber_funcs = {
@ -439,7 +439,7 @@ setit:
* Callback if something changed. Note that we need to poke the DSP on
* the Broadcom PHYs if the media changes.
*/
if (sc->mii_media_active != mii->mii_media_active ||
if (sc->mii_media_active != mii->mii_media_active ||
sc->mii_media_status != mii->mii_media_status ||
cmd == MII_MEDIACHG) {
switch (sc->mii_oui) {
@ -982,10 +982,10 @@ brgphy_reset_bnx(struct mii_softc *sc)
brgphy_disable_early_dac(sc);
/* Set Jumbo frame settings in the PHY. */
brgphy_jumbo_settings(sc);
brgphy_jumbo_settings(sc);
/* Enable Ethernet@Wirespeed */
brgphy_eth_wirespeed(sc);
brgphy_eth_wirespeed(sc);
} else if ((sc->mii_flags & MIIF_HAVEFIBER) == 0) {
brgphy_ber_bug(sc);

2
sys/dev/mii/brgphyreg.h
View file

@ -206,7 +206,7 @@
#define BRGPHY_AUXCTL_MISC_RGMII_SKEW_EN 0x0200
#define BRGPHY_AUXCTL_MISC_WIRESPEED_EN 0x0010
/*
/*
* Shadow register 0x1C, bit 15 is write enable,
* bits 14-10 select function (0x00 to 0x1F).
*/

4
sys/dev/mii/ciphy.c
View file

@ -196,7 +196,7 @@ setit:
PHY_WRITE(sc, MII_BMCR, speed);
PHY_WRITE(sc, MII_ANAR, ANAR_CSMA);
if (IFM_SUBTYPE(ife->ifm_media) != IFM_1000_T)
if (IFM_SUBTYPE(ife->ifm_media) != IFM_1000_T)
break;
PHY_WRITE(sc, MII_100T2CR, gig);
@ -234,7 +234,7 @@ setit:
* Callback if something changed. Note that we need to poke
* apply fixups for certain PHY revs.
*/
if (sc->mii_media_active != mii->mii_media_active ||
if (sc->mii_media_active != mii->mii_media_active ||
sc->mii_media_status != mii->mii_media_status ||
cmd == MII_MEDIACHG) {
ciphy_fixup(sc);

2
sys/dev/mii/eephy.c
View file

@ -219,7 +219,7 @@ eephy_reset(struct mii_softc *sc)
reg = PHY_READ(sc, E1000_CR);
reg |= E1000_CR_RESET;
PHY_WRITE(sc, E1000_CR, reg);
for (i = 0; i < 500; i++) {
DELAY(1);
reg = PHY_READ(sc, E1000_CR);

10
sys/dev/mii/etphy.c
View file

@ -2,14 +2,14 @@
/*
* Copyright (c) 2007 The DragonFly Project. All rights reserved.
*
*
* This code is derived from software contributed to The DragonFly Project
* by Sepherosa Ziehau <sepherosa@gmail.com>
*
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
@ -19,7 +19,7 @@
* 3. Neither the name of The DragonFly Project nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific, prior written permission.
*
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
@ -32,7 +32,7 @@
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
*
* $DragonFly: src/sys/dev/netif/mii_layer/truephy.c,v 1.1 2007/10/12 14:12:42 sephe Exp $
*/

4
sys/dev/mii/ipgphy.c
View file

@ -122,7 +122,7 @@ ipgphy_attach(struct device *parent, struct device *self, void *aux)
sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
if (sc->mii_capabilities & BMSR_EXTSTAT)
sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR);
mii_phy_add_media(sc);
}
@ -274,7 +274,7 @@ ipgphy_status(struct mii_softc *sc)
mii->mii_media_active = IFM_ETHER;
bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
if (bmsr & BMSR_LINK)
if (bmsr & BMSR_LINK)
mii->mii_media_status |= IFM_ACTIVE;
bmcr = PHY_READ(sc, MII_BMCR);

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