This commit is contained in:
purplerain 2023-06-19 18:06:04 +00:00
parent 6871d7cb85
commit 451579e149
Signed by: purplerain
GPG key ID: F42C07F07E2E35B7
103 changed files with 365 additions and 470 deletions

View file

@ -81,5 +81,6 @@ _sndiop:*:110:
_syspatch:*:112: _syspatch:*:112:
_slaacd:*:115: _slaacd:*:115:
dialer:*:117: dialer:*:117:
_shutdown:*:118:
nogroup:*:32766: nogroup:*:32766:
nobody:*:32767: nobody:*:32767:

View file

@ -1,7 +1,6 @@
/* $OpenBSD: ecdsa.h,v 1.15 2023/04/18 08:47:28 tb Exp $ */ /* $OpenBSD: ecdsa.h,v 1.16 2023/06/19 09:12:41 tb Exp $ */
/** /*
* \file crypto/ecdsa/ecdsa.h Include file for the OpenSSL ECDSA functions * Written by Nils Larsch for the OpenSSL project
* \author Written by Nils Larsch for the OpenSSL project
*/ */
/* ==================================================================== /* ====================================================================
* Copyright (c) 2000-2005 The OpenSSL Project. All rights reserved. * Copyright (c) 2000-2005 The OpenSSL Project. All rights reserved.
@ -88,7 +87,8 @@ struct ecdsa_method {
char *app_data; char *app_data;
}; };
/* If this flag is set the ECDSA method is FIPS compliant and can be used /*
* If this flag is set, the ECDSA method is FIPS compliant and can be used
* in FIPS mode. This is set in the validated module method. If an * in FIPS mode. This is set in the validated module method. If an
* application sets this flag in its own methods it is its responsibility * application sets this flag in its own methods it is its responsibility
* to ensure the result is compliant. * to ensure the result is compliant.
@ -96,172 +96,44 @@ struct ecdsa_method {
#define ECDSA_FLAG_FIPS_METHOD 0x1 #define ECDSA_FLAG_FIPS_METHOD 0x1
/** Allocates and initialize a ECDSA_SIG structure
* \return pointer to a ECDSA_SIG structure or NULL if an error occurred
*/
ECDSA_SIG *ECDSA_SIG_new(void); ECDSA_SIG *ECDSA_SIG_new(void);
/** frees a ECDSA_SIG structure
* \param sig pointer to the ECDSA_SIG structure
*/
void ECDSA_SIG_free(ECDSA_SIG *sig); void ECDSA_SIG_free(ECDSA_SIG *sig);
/** DER encode content of ECDSA_SIG object (note: this function modifies *pp
* (*pp += length of the DER encoded signature)).
* \param sig pointer to the ECDSA_SIG object
* \param pp pointer to a unsigned char pointer for the output or NULL
* \return the length of the DER encoded ECDSA_SIG object or 0
*/
int i2d_ECDSA_SIG(const ECDSA_SIG *sig, unsigned char **pp); int i2d_ECDSA_SIG(const ECDSA_SIG *sig, unsigned char **pp);
/** Decodes a DER encoded ECDSA signature (note: this function changes *pp
* (*pp += len)).
* \param sig pointer to ECDSA_SIG pointer (may be NULL)
* \param pp memory buffer with the DER encoded signature
* \param len length of the buffer
* \return pointer to the decoded ECDSA_SIG structure (or NULL)
*/
ECDSA_SIG *d2i_ECDSA_SIG(ECDSA_SIG **sig, const unsigned char **pp, long len); ECDSA_SIG *d2i_ECDSA_SIG(ECDSA_SIG **sig, const unsigned char **pp, long len);
/** Accessor for r and s fields of ECDSA_SIG
* \param sig pointer to ECDSA_SIG pointer
* \param pr pointer to BIGNUM pointer for r (may be NULL)
* \param ps pointer to BIGNUM pointer for s (may be NULL)
*/
void ECDSA_SIG_get0(const ECDSA_SIG *sig, const BIGNUM **pr, const BIGNUM **ps); void ECDSA_SIG_get0(const ECDSA_SIG *sig, const BIGNUM **pr, const BIGNUM **ps);
const BIGNUM *ECDSA_SIG_get0_r(const ECDSA_SIG *sig); const BIGNUM *ECDSA_SIG_get0_r(const ECDSA_SIG *sig);
const BIGNUM *ECDSA_SIG_get0_s(const ECDSA_SIG *sig); const BIGNUM *ECDSA_SIG_get0_s(const ECDSA_SIG *sig);
/** Setter for r and s fields of ECDSA_SIG
* \param sig pointer to ECDSA_SIG pointer
* \param r pointer to BIGNUM for r (may be NULL)
* \param s pointer to BIGNUM for s (may be NULL)
*/
int ECDSA_SIG_set0(ECDSA_SIG *sig, BIGNUM *r, BIGNUM *s); int ECDSA_SIG_set0(ECDSA_SIG *sig, BIGNUM *r, BIGNUM *s);
/** Computes the ECDSA signature of the given hash value using
* the supplied private key and returns the created signature.
* \param dgst pointer to the hash value
* \param dgst_len length of the hash value
* \param eckey EC_KEY object containing a private EC key
* \return pointer to a ECDSA_SIG structure or NULL if an error occurred
*/
ECDSA_SIG *ECDSA_do_sign(const unsigned char *dgst, int dgst_len, ECDSA_SIG *ECDSA_do_sign(const unsigned char *dgst, int dgst_len,
EC_KEY *eckey); EC_KEY *eckey);
/** Computes ECDSA signature of a given hash value using the supplied
* private key (note: sig must point to ECDSA_size(eckey) bytes of memory).
* \param dgst pointer to the hash value to sign
* \param dgstlen length of the hash value
* \param kinv BIGNUM with a pre-computed inverse k (optional)
* \param rp BIGNUM with a pre-computed rp value (optional),
* see ECDSA_sign_setup
* \param eckey EC_KEY object containing a private EC key
* \return pointer to a ECDSA_SIG structure or NULL if an error occurred
*/
ECDSA_SIG *ECDSA_do_sign_ex(const unsigned char *dgst, int dgstlen, ECDSA_SIG *ECDSA_do_sign_ex(const unsigned char *dgst, int dgstlen,
const BIGNUM *kinv, const BIGNUM *rp, EC_KEY *eckey); const BIGNUM *kinv, const BIGNUM *rp, EC_KEY *eckey);
/** Verifies that the supplied signature is a valid ECDSA
* signature of the supplied hash value using the supplied public key.
* \param dgst pointer to the hash value
* \param dgst_len length of the hash value
* \param sig ECDSA_SIG structure
* \param eckey EC_KEY object containing a public EC key
* \return 1 if the signature is valid, 0 if the signature is invalid
* and -1 on error
*/
int ECDSA_do_verify(const unsigned char *dgst, int dgst_len, int ECDSA_do_verify(const unsigned char *dgst, int dgst_len,
const ECDSA_SIG *sig, EC_KEY* eckey); const ECDSA_SIG *sig, EC_KEY* eckey);
const ECDSA_METHOD *ECDSA_OpenSSL(void); const ECDSA_METHOD *ECDSA_OpenSSL(void);
/** Sets the default ECDSA method
* \param meth new default ECDSA_METHOD
*/
void ECDSA_set_default_method(const ECDSA_METHOD *meth); void ECDSA_set_default_method(const ECDSA_METHOD *meth);
/** Returns the default ECDSA method
* \return pointer to ECDSA_METHOD structure containing the default method
*/
const ECDSA_METHOD *ECDSA_get_default_method(void); const ECDSA_METHOD *ECDSA_get_default_method(void);
/** Sets method to be used for the ECDSA operations
* \param eckey EC_KEY object
* \param meth new method
* \return 1 on success and 0 otherwise
*/
int ECDSA_set_method(EC_KEY *eckey, const ECDSA_METHOD *meth); int ECDSA_set_method(EC_KEY *eckey, const ECDSA_METHOD *meth);
/** Returns the maximum length of the DER encoded signature
* \param eckey EC_KEY object
* \return numbers of bytes required for the DER encoded signature
*/
int ECDSA_size(const EC_KEY *eckey); int ECDSA_size(const EC_KEY *eckey);
/** Precompute parts of the signing operation
* \param eckey EC_KEY object containing a private EC key
* \param ctx BN_CTX object (optional)
* \param kinv BIGNUM pointer for the inverse of k
* \param rp BIGNUM pointer for x coordinate of k * generator
* \return 1 on success and 0 otherwise
*/
int ECDSA_sign_setup(EC_KEY *eckey, BN_CTX *ctx, BIGNUM **kinv, int ECDSA_sign_setup(EC_KEY *eckey, BN_CTX *ctx, BIGNUM **kinv,
BIGNUM **rp); BIGNUM **rp);
/** Computes ECDSA signature of a given hash value using the supplied
* private key (note: sig must point to ECDSA_size(eckey) bytes of memory).
* \param type this parameter is ignored
* \param dgst pointer to the hash value to sign
* \param dgstlen length of the hash value
* \param sig memory for the DER encoded created signature
* \param siglen pointer to the length of the returned signature
* \param eckey EC_KEY object containing a private EC key
* \return 1 on success and 0 otherwise
*/
int ECDSA_sign(int type, const unsigned char *dgst, int dgstlen, int ECDSA_sign(int type, const unsigned char *dgst, int dgstlen,
unsigned char *sig, unsigned int *siglen, EC_KEY *eckey); unsigned char *sig, unsigned int *siglen, EC_KEY *eckey);
/** Computes ECDSA signature of a given hash value using the supplied
* private key (note: sig must point to ECDSA_size(eckey) bytes of memory).
* \param type this parameter is ignored
* \param dgst pointer to the hash value to sign
* \param dgstlen length of the hash value
* \param sig buffer to hold the DER encoded signature
* \param siglen pointer to the length of the returned signature
* \param kinv BIGNUM with a pre-computed inverse k (optional)
* \param rp BIGNUM with a pre-computed rp value (optional),
* see ECDSA_sign_setup
* \param eckey EC_KEY object containing a private EC key
* \return 1 on success and 0 otherwise
*/
int ECDSA_sign_ex(int type, const unsigned char *dgst, int dgstlen, int ECDSA_sign_ex(int type, const unsigned char *dgst, int dgstlen,
unsigned char *sig, unsigned int *siglen, const BIGNUM *kinv, unsigned char *sig, unsigned int *siglen, const BIGNUM *kinv,
const BIGNUM *rp, EC_KEY *eckey); const BIGNUM *rp, EC_KEY *eckey);
/** Verifies that the given signature is valid ECDSA signature
* of the supplied hash value using the specified public key.
* \param type this parameter is ignored
* \param dgst pointer to the hash value
* \param dgstlen length of the hash value
* \param sig pointer to the DER encoded signature
* \param siglen length of the DER encoded signature
* \param eckey EC_KEY object containing a public EC key
* \return 1 if the signature is valid, 0 if the signature is invalid
* and -1 on error
*/
int ECDSA_verify(int type, const unsigned char *dgst, int dgstlen, int ECDSA_verify(int type, const unsigned char *dgst, int dgstlen,
const unsigned char *sig, int siglen, EC_KEY *eckey); const unsigned char *sig, int siglen, EC_KEY *eckey);
/* the standard ex_data functions */
int ECDSA_get_ex_new_index(long argl, void *argp, CRYPTO_EX_new *new_func, int ECDSA_get_ex_new_index(long argl, void *argp, CRYPTO_EX_new *new_func,
CRYPTO_EX_dup *dup_func, CRYPTO_EX_free *free_func); CRYPTO_EX_dup *dup_func, CRYPTO_EX_free *free_func);
int ECDSA_set_ex_data(EC_KEY *d, int idx, void *arg); int ECDSA_set_ex_data(EC_KEY *d, int idx, void *arg);
void *ECDSA_get_ex_data(EC_KEY *d, int idx); void *ECDSA_get_ex_data(EC_KEY *d, int idx);
/* XXX should be in ec.h, but needs ECDSA_SIG */ /* XXX should be in ec.h, but needs ECDSA_SIG */
void EC_KEY_METHOD_set_sign(EC_KEY_METHOD *meth, void EC_KEY_METHOD_set_sign(EC_KEY_METHOD *meth,
int (*sign)(int type, const unsigned char *dgst, int (*sign)(int type, const unsigned char *dgst,

View file

@ -1,4 +1,4 @@
/* $OpenBSD: tls_signer.c,v 1.6 2023/06/18 11:43:03 op Exp $ */ /* $OpenBSD: tls_signer.c,v 1.9 2023/06/18 19:12:58 tb Exp $ */
/* /*
* Copyright (c) 2021 Eric Faurot <eric@openbsd.org> * Copyright (c) 2021 Eric Faurot <eric@openbsd.org>
* *
@ -392,8 +392,8 @@ tls_ecdsa_do_sign(const unsigned char *dgst, int dgst_len, const BIGNUM *inv,
* to its calling convention/signature. * to its calling convention/signature.
*/ */
pubkey_hash = ECDSA_get_ex_data(eckey, 0); pubkey_hash = EC_KEY_get_ex_data(eckey, 0);
config = ECDSA_get_ex_data(eckey, 1); config = EC_KEY_get_ex_data(eckey, 1);
if (pubkey_hash == NULL || config == NULL) if (pubkey_hash == NULL || config == NULL)
goto err; goto err;
@ -423,17 +423,26 @@ EC_KEY_METHOD *
tls_signer_ecdsa_method(void) tls_signer_ecdsa_method(void)
{ {
static EC_KEY_METHOD *ecdsa_method = NULL; static EC_KEY_METHOD *ecdsa_method = NULL;
const EC_KEY_METHOD *default_method;
int (*sign)(int type, const unsigned char *dgst, int dlen,
unsigned char *sig, unsigned int *siglen,
const BIGNUM *kinv, const BIGNUM *r, EC_KEY *eckey);
int (*sign_setup)(EC_KEY *eckey, BN_CTX *ctx_in,
BIGNUM **kinvp, BIGNUM **rp);
pthread_mutex_lock(&signer_method_lock); pthread_mutex_lock(&signer_method_lock);
if (ecdsa_method != NULL) if (ecdsa_method != NULL)
goto out; goto out;
ecdsa_method = EC_KEY_METHOD_new(NULL); default_method = EC_KEY_get_default_method();
ecdsa_method = EC_KEY_METHOD_new(default_method);
if (ecdsa_method == NULL) if (ecdsa_method == NULL)
goto out; goto out;
EC_KEY_METHOD_set_sign(ecdsa_method, NULL, NULL, tls_ecdsa_do_sign); EC_KEY_METHOD_get_sign(default_method, &sign, &sign_setup, NULL);
EC_KEY_METHOD_set_sign(ecdsa_method, sign, sign_setup,
tls_ecdsa_do_sign);
out: out:
pthread_mutex_unlock(&signer_method_lock); pthread_mutex_unlock(&signer_method_lock);

View file

@ -1,4 +1,4 @@
/* $OpenBSD: disklabel.c,v 1.249 2023/05/13 18:13:42 krw Exp $ */ /* $OpenBSD: disklabel.c,v 1.250 2023/06/19 13:45:19 krw Exp $ */
/* /*
* Copyright (c) 1987, 1993 * Copyright (c) 1987, 1993
@ -367,13 +367,13 @@ parsefstab(void)
i = asprintf(&partname, "/dev/%s%c", dkname, 'a'); i = asprintf(&partname, "/dev/%s%c", dkname, 'a');
if (i == -1) if (i == -1)
err(4, NULL); err(1, NULL);
i = asprintf(&partduid, i = asprintf(&partduid,
"%02hhx%02hhx%02hhx%02hhx%02hhx%02hhx%02hhx%02hhx.a", "%02hhx%02hhx%02hhx%02hhx%02hhx%02hhx%02hhx%02hhx.a",
lab.d_uid[0], lab.d_uid[1], lab.d_uid[2], lab.d_uid[3], lab.d_uid[0], lab.d_uid[1], lab.d_uid[2], lab.d_uid[3],
lab.d_uid[4], lab.d_uid[5], lab.d_uid[6], lab.d_uid[7]); lab.d_uid[4], lab.d_uid[5], lab.d_uid[6], lab.d_uid[7]);
if (i == -1) if (i == -1)
err(4, NULL); err(1, NULL);
setfsent(); setfsent();
for (i = 0; i < MAXPARTITIONS; i++) { for (i = 0; i < MAXPARTITIONS; i++) {
partname[strlen(dkname) + 5] = 'a' + i; partname[strlen(dkname) + 5] = 'a' + i;
@ -812,7 +812,7 @@ getasciilabel(FILE *f, struct disklabel *lp)
lp->d_version = 1; lp->d_version = 1;
if (!(omountpoints = calloc(MAXPARTITIONS, sizeof(char *)))) if (!(omountpoints = calloc(MAXPARTITIONS, sizeof(char *))))
errx(4, "out of memory"); err(1, NULL);
mpcopy(omountpoints, mountpoints); mpcopy(omountpoints, mountpoints);
for (part = 0; part < MAXPARTITIONS; part++) { for (part = 0; part < MAXPARTITIONS; part++) {

View file

@ -1,4 +1,4 @@
/* $OpenBSD: editor.c,v 1.407 2023/05/23 13:20:31 krw Exp $ */ /* $OpenBSD: editor.c,v 1.410 2023/06/19 13:45:19 krw Exp $ */
/* /*
* Copyright (c) 1997-2000 Todd C. Miller <millert@openbsd.org> * Copyright (c) 1997-2000 Todd C. Miller <millert@openbsd.org>
@ -44,6 +44,7 @@
#define ROUNDUP(_s, _a) ((((_s) + (_a) - 1) / (_a)) * (_a)) #define ROUNDUP(_s, _a) ((((_s) + (_a) - 1) / (_a)) * (_a))
#define ROUNDDOWN(_s, _a) (((_s) / (_a)) * (_a)) #define ROUNDDOWN(_s, _a) (((_s) / (_a)) * (_a))
#define CHUNKSZ(_c) ((_c)->stop - (_c)->start)
/* flags for getuint64() */ /* flags for getuint64() */
#define DO_CONVERSIONS 0x00000001 #define DO_CONVERSIONS 0x00000001
@ -197,7 +198,7 @@ editor(int f)
if (!(omountpoints = calloc(MAXPARTITIONS, sizeof(char *))) || if (!(omountpoints = calloc(MAXPARTITIONS, sizeof(char *))) ||
!(origmountpoints = calloc(MAXPARTITIONS, sizeof(char *))) || !(origmountpoints = calloc(MAXPARTITIONS, sizeof(char *))) ||
!(tmpmountpoints = calloc(MAXPARTITIONS, sizeof(char *)))) !(tmpmountpoints = calloc(MAXPARTITIONS, sizeof(char *))))
errx(4, "out of memory"); err(1, NULL);
/* How big is the OpenBSD portion of the disk? */ /* How big is the OpenBSD portion of the disk? */
find_bounds(&newlab); find_bounds(&newlab);
@ -404,11 +405,11 @@ editor(int f)
/* Display free space. */ /* Display free space. */
chunk = free_chunks(&newlab, -1); chunk = free_chunks(&newlab, -1);
for (; chunk->start != 0 || chunk->stop != 0; chunk++) { for (; chunk->start != 0 || chunk->stop != 0; chunk++) {
total += chunk->stop - chunk->start; total += CHUNKSZ(chunk);
fprintf(stderr, "Free sectors: %16llu - %16llu " fprintf(stderr, "Free sectors: %16llu - %16llu "
"(%16llu)\n", "(%16llu)\n",
chunk->start, chunk->stop - 1, chunk->start, chunk->stop - 1,
chunk->stop - chunk->start); CHUNKSZ(chunk));
} }
fprintf(stderr, "Total free sectors: %llu.\n", total); fprintf(stderr, "Total free sectors: %llu.\n", total);
break; break;
@ -566,7 +567,7 @@ again:
goto again; goto again;
alloc = reallocarray(NULL, lastalloc, sizeof(struct space_allocation)); alloc = reallocarray(NULL, lastalloc, sizeof(struct space_allocation));
if (alloc == NULL) if (alloc == NULL)
errx(4, "out of memory"); err(1, NULL);
memcpy(alloc, alloc_table[index].table, memcpy(alloc, alloc_table[index].table,
lastalloc * sizeof(struct space_allocation)); lastalloc * sizeof(struct space_allocation));
@ -674,7 +675,7 @@ again:
} }
free(*partmp); free(*partmp);
if ((*partmp = strdup(ap->mp)) == NULL) if ((*partmp = strdup(ap->mp)) == NULL)
errx(4, "out of memory"); err(1, NULL);
} }
} }
@ -788,8 +789,8 @@ editor_add(struct disklabel *lp, const char *p)
chunk = free_chunks(lp, -1); chunk = free_chunks(lp, -1);
new_size = new_offset = 0; new_size = new_offset = 0;
for (; chunk->start != 0 || chunk->stop != 0; chunk++) { for (; chunk->start != 0 || chunk->stop != 0; chunk++) {
if (chunk->stop - chunk->start > new_size) { if (CHUNKSZ(chunk) > new_size) {
new_size = chunk->stop - chunk->start; new_size = CHUNKSZ(chunk);
new_offset = chunk->start; new_offset = chunk->start;
} }
} }
@ -1413,7 +1414,7 @@ editor_countfree(const struct disklabel *lp)
chunk = free_chunks(lp, -1); chunk = free_chunks(lp, -1);
for (; chunk->start != 0 || chunk->stop != 0; chunk++) for (; chunk->start != 0 || chunk->stop != 0; chunk++)
freesectors += chunk->stop - chunk->start; freesectors += CHUNKSZ(chunk);
return (freesectors); return (freesectors);
} }
@ -1454,7 +1455,7 @@ mpcopy(char **to, char **from)
if (from[i] != NULL) { if (from[i] != NULL) {
to[i] = strdup(from[i]); to[i] = strdup(from[i]);
if (to[i] == NULL) if (to[i] == NULL)
errx(4, "out of memory"); err(1, NULL);
} }
} }
} }
@ -1752,7 +1753,7 @@ get_mp(const struct disklabel *lp, int partno)
/* XXX - might as well realloc */ /* XXX - might as well realloc */
free(mountpoints[partno]); free(mountpoints[partno]);
if ((mountpoints[partno] = strdup(p)) == NULL) if ((mountpoints[partno] = strdup(p)) == NULL)
errx(4, "out of memory"); err(1, NULL);
break; break;
} }
fputs("Mount points must start with '/'\n", stderr); fputs("Mount points must start with '/'\n", stderr);
@ -1979,7 +1980,7 @@ parse_sizerange(char *buf, u_int64_t *min, u_int64_t *max)
return (-1); return (-1);
if (p != NULL && p[0] != '\0') { if (p != NULL && p[0] != '\0') {
if (p[0] == '*') if (p[0] == '*')
*max = -1; *max = UINT64_MAX;
else else
if (parse_sizespec(p, &val2, &unit2) == -1) if (parse_sizespec(p, &val2, &unit2) == -1)
return (-1); return (-1);

View file

@ -1,9 +1,9 @@
# $OpenBSD: Makefile,v 1.3 1997/09/21 11:38:13 deraadt Exp $ # $OpenBSD: Makefile,v 1.4 2023/06/19 13:05:25 deraadt Exp $
PROG= shutdown PROG= shutdown
MAN= shutdown.8 MAN= shutdown.8
BINOWN= root BINOWN= root
BINGRP= operator BINGRP= _shutdown
BINMODE=4550 BINMODE=4550
.include <bsd.prog.mk> .include <bsd.prog.mk>

View file

@ -1,4 +1,4 @@
.\" $OpenBSD: shutdown.8,v 1.43 2023/02/04 13:03:58 jsg Exp $ .\" $OpenBSD: shutdown.8,v 1.44 2023/06/19 13:05:25 deraadt Exp $
.\" $NetBSD: shutdown.8,v 1.6 1995/03/18 15:01:07 cgd Exp $ .\" $NetBSD: shutdown.8,v 1.6 1995/03/18 15:01:07 cgd Exp $
.\" .\"
.\" Copyright (c) 1988, 1991, 1993 .\" Copyright (c) 1988, 1991, 1993
@ -30,7 +30,7 @@
.\" .\"
.\" @(#)shutdown.8 8.1 (Berkeley) 6/5/93 .\" @(#)shutdown.8 8.1 (Berkeley) 6/5/93
.\" .\"
.Dd $Mdocdate: February 4 2023 $ .Dd $Mdocdate: June 19 2023 $
.Dt SHUTDOWN 8 .Dt SHUTDOWN 8
.Os .Os
.Sh NAME .Sh NAME
@ -54,6 +54,15 @@ command is issued without options, the system is placed in single
user mode at the indicated time after shutting down all system user mode at the indicated time after shutting down all system
services. services.
.Pp .Pp
Users in the
.Va _shutdown
group can also run the
.Nm
command.
Historically this permission was tied to the
.Va operator
group.
.Pp
The options are as follows: The options are as follows:
.Bl -tag -width Ds .Bl -tag -width Ds
.It Fl d .It Fl d

View file

@ -1,4 +1,4 @@
/* $OpenBSD: agintc.c,v 1.49 2023/06/17 22:10:19 kettenis Exp $ */ /* $OpenBSD: agintc.c,v 1.50 2023/06/18 16:25:21 kettenis Exp $ */
/* /*
* Copyright (c) 2007, 2009, 2011, 2017 Dale Rahn <drahn@dalerahn.com> * Copyright (c) 2007, 2009, 2011, 2017 Dale Rahn <drahn@dalerahn.com>
* Copyright (c) 2018 Mark Kettenis <kettenis@openbsd.org> * Copyright (c) 2018 Mark Kettenis <kettenis@openbsd.org>
@ -843,8 +843,6 @@ agintc_enable_wakeup(void)
cpu_dcache_wb_range((vaddr_t)&prop[irq], cpu_dcache_wb_range((vaddr_t)&prop[irq],
sizeof(*prop)); sizeof(*prop));
__asm volatile("dsb sy"); __asm volatile("dsb sy");
/* XXX: Invalidate cache? */
} }
/* Invalidate cache. */ /* Invalidate cache. */

View file

@ -311,7 +311,7 @@ ccpmic_power_opreg_handler(void *cookie, int iodir, uint64_t address,
return 0; return 0;
} }
/* /*
* We have 16 real GPIOs and a bunch of virtual ones. The virtual * We have 16 real GPIOs and a bunch of virtual ones. The virtual
* ones are mostly there to deal with a limitation of Microsoft * ones are mostly there to deal with a limitation of Microsoft
* Windows. We only implement the "panel" control GPIO, which * Windows. We only implement the "panel" control GPIO, which

View file

@ -356,7 +356,7 @@ chvgpio_intr_enable(void *cookie, int pin)
CHVGPIO_INTERRUPT_MASK); CHVGPIO_INTERRUPT_MASK);
bus_space_write_4(sc->sc_memt, sc->sc_memh, bus_space_write_4(sc->sc_memt, sc->sc_memh,
CHVGPIO_INTERRUPT_MASK, reg | (1 << line)); CHVGPIO_INTERRUPT_MASK, reg | (1 << line));
} }
void void
chvgpio_intr_disable(void *cookie, int pin) chvgpio_intr_disable(void *cookie, int pin)
@ -375,7 +375,7 @@ chvgpio_intr_disable(void *cookie, int pin)
CHVGPIO_INTERRUPT_MASK); CHVGPIO_INTERRUPT_MASK);
bus_space_write_4(sc->sc_memt, sc->sc_memh, bus_space_write_4(sc->sc_memt, sc->sc_memh,
CHVGPIO_INTERRUPT_MASK, reg & ~(1 << line)); CHVGPIO_INTERRUPT_MASK, reg & ~(1 << line));
} }
int int
chvgpio_intr(void *arg) chvgpio_intr(void *arg)

View file

@ -135,7 +135,7 @@ dwgpio_attach(struct device *parent, struct device *self, void *aux)
printf(": too many pins\n"); printf(": too many pins\n");
return; return;
} }
sc->sc_pin_ih = mallocarray(sc->sc_npins, sizeof(*sc->sc_pin_ih), sc->sc_pin_ih = mallocarray(sc->sc_npins, sizeof(*sc->sc_pin_ih),
M_DEVBUF, M_WAITOK | M_ZERO); M_DEVBUF, M_WAITOK | M_ZERO);

View file

@ -125,7 +125,7 @@ iosf_acpi_mbi_mdr_rd(struct iosf_mbi *mbi, uint32_t mcr, uint32_t mcrx)
struct iosf_acpi_softc *sc = (struct iosf_acpi_softc *)mbi->mbi_dev; struct iosf_acpi_softc *sc = (struct iosf_acpi_softc *)mbi->mbi_dev;
if (mcrx != 0) { if (mcrx != 0) {
bus_space_write_4(sc->sc_iot, sc->sc_ioh, bus_space_write_4(sc->sc_iot, sc->sc_ioh,
IOSF_ACPI_MBI_MCRX, mcrx); IOSF_ACPI_MBI_MCRX, mcrx);
} }
bus_space_write_4(sc->sc_iot, sc->sc_ioh, IOSF_ACPI_MBI_MCR, mcr); bus_space_write_4(sc->sc_iot, sc->sc_ioh, IOSF_ACPI_MBI_MCR, mcr);

View file

@ -130,7 +130,7 @@ const struct pchgpio_group spt_lp_groups[] =
{ 1, 0, 48, 71, 48 }, /* GPP_C */ { 1, 0, 48, 71, 48 }, /* GPP_C */
{ 1, 1, 72, 95, 72 }, /* GPP_D */ { 1, 1, 72, 95, 72 }, /* GPP_D */
{ 1, 2, 96, 119, 96 }, /* GPP_E */ { 1, 2, 96, 119, 96 }, /* GPP_E */
/* Community 3 */ /* Community 3 */
{ 2, 0, 120, 143, 120 }, /* GPP_F */ { 2, 0, 120, 143, 120 }, /* GPP_F */
{ 2, 1, 144, 151, 144 }, /* GPP_G */ { 2, 1, 144, 151, 144 }, /* GPP_G */

View file

@ -435,7 +435,7 @@ tipmic_power_opreg_handler(void *cookie, int iodir, uint64_t address,
return 0; return 0;
} }
/* /*
* Allegedly the GPIOs are virtual and only there to deal with a * Allegedly the GPIOs are virtual and only there to deal with a
* limitation of Microsoft Windows. * limitation of Microsoft Windows.
*/ */

View file

@ -620,7 +620,7 @@ static const keysym_t akbd_keydesc_sg_nodead[] = {
KC(30), KS_diaeresis, KS_exclam, KS_bracketright,KS_braceright, KC(30), KS_diaeresis, KS_exclam, KS_bracketright,KS_braceright,
KC(45), KS_n, KS_N, KS_asciitilde, KC(45), KS_n, KS_N, KS_asciitilde,
}; };
#define KBD_MAP(name, base, map) \ #define KBD_MAP(name, base, map) \
{ name, base, sizeof(map)/sizeof(keysym_t), map } { name, base, sizeof(map)/sizeof(keysym_t), map }

View file

@ -16,7 +16,7 @@
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
@ -186,7 +186,7 @@ struct ataparams {
#define ATA_CMD2_RWQ 0x0002 #define ATA_CMD2_RWQ 0x0002
#define WDC_CMD2_DM 0x0001 /* Download Microcode supported */ #define WDC_CMD2_DM 0x0001 /* Download Microcode supported */
u_int16_t atap_cmd_ext; /* 84: command/features supp. ext. */ u_int16_t atap_cmd_ext; /* 84: command/features supp. ext. */
#define ATAPI_CMDE_IIUF 0x2000 /* IDLE IMMEDIATE with UNLOAD FEATURE */ #define ATAPI_CMDE_IIUF 0x2000 /* IDLE IMMEDIATE with UNLOAD FEATURE */
#define ATAPI_CMDE_MSER 0x0004 /* Media serial number supported */ #define ATAPI_CMDE_MSER 0x0004 /* Media serial number supported */
#define ATAPI_CMDE_TEST 0x0002 /* SMART self-test supported */ #define ATAPI_CMDE_TEST 0x0002 /* SMART self-test supported */
#define ATAPI_CMDE_SLOG 0x0001 /* SMART error logging supported */ #define ATAPI_CMDE_SLOG 0x0001 /* SMART error logging supported */

View file

@ -271,7 +271,7 @@ struct ata_fis_d2h {
} __packed; } __packed;
/* /*
* SATA log page 10h - * SATA log page 10h -
* looks like a D2H FIS, with errored tag number in first byte. * looks like a D2H FIS, with errored tag number in first byte.
*/ */
struct ata_log_page_10h { struct ata_log_page_10h {

View file

@ -294,7 +294,7 @@ wdattach(struct device *parent, struct device *self, void *aux)
wdc_c.r_features = WDSF_EN_WR_CACHE; wdc_c.r_features = WDSF_EN_WR_CACHE;
wdc_c.timeout = 1000; wdc_c.timeout = 1000;
wdc_c.flags = at_poll; wdc_c.flags = at_poll;
if (wdc_exec_command(wd->drvp, &wdc_c) != WDC_COMPLETE) { if (wdc_exec_command(wd->drvp, &wdc_c) != WDC_COMPLETE) {
printf("%s: enable write cache command didn't " printf("%s: enable write cache command didn't "
"complete\n", wd->sc_dev.dv_xname); "complete\n", wd->sc_dev.dv_xname);

View file

@ -78,7 +78,7 @@ ehci_cardbus_match(struct device *parent, void *match, void *aux)
PCI_SUBCLASS(ca->ca_class) == PCI_SUBCLASS_SERIALBUS_USB && PCI_SUBCLASS(ca->ca_class) == PCI_SUBCLASS_SERIALBUS_USB &&
PCI_INTERFACE(ca->ca_class) == PCI_INTERFACE_EHCI) PCI_INTERFACE(ca->ca_class) == PCI_INTERFACE_EHCI)
return (1); return (1);
return (0); return (0);
} }
@ -138,7 +138,7 @@ ehci_cardbus_attach(struct device *parent, struct device *self, void *aux)
else else
snprintf(sc->sc.sc_vendor, sizeof(sc->sc.sc_vendor), snprintf(sc->sc.sc_vendor, sizeof(sc->sc.sc_vendor),
"vendor 0x%04x", PCI_VENDOR(ca->ca_id)); "vendor 0x%04x", PCI_VENDOR(ca->ca_id));
r = ehci_init(&sc->sc); r = ehci_init(&sc->sc);
if (r != USBD_NORMAL_COMPLETION) { if (r != USBD_NORMAL_COMPLETION) {
printf("%s: init failed, error=%d\n", devname, r); printf("%s: init failed, error=%d\n", devname, r);

View file

@ -33,8 +33,8 @@
*/ */
#include <sys/param.h> #include <sys/param.h>
#include <sys/systm.h> #include <sys/systm.h>
#include <sys/mbuf.h> #include <sys/mbuf.h>
#include <sys/malloc.h> #include <sys/malloc.h>
#include <sys/kernel.h> #include <sys/kernel.h>
#include <sys/socket.h> #include <sys/socket.h>
@ -43,11 +43,11 @@
#include <sys/device.h> #include <sys/device.h>
#include <sys/gpio.h> #include <sys/gpio.h>
#include <sys/endian.h> #include <sys/endian.h>
#include <net/if.h> #include <net/if.h>
#include <net/if_media.h> #include <net/if_media.h>
#include <netinet/in.h> #include <netinet/in.h>
#include <netinet/if_ether.h> #include <netinet/if_ether.h>
#include <net80211/ieee80211_var.h> #include <net80211/ieee80211_var.h>

View file

@ -39,8 +39,8 @@
#include "bpfilter.h" #include "bpfilter.h"
#include <sys/param.h> #include <sys/param.h>
#include <sys/systm.h> #include <sys/systm.h>
#include <sys/mbuf.h> #include <sys/mbuf.h>
#include <sys/malloc.h> #include <sys/malloc.h>
#include <sys/kernel.h> #include <sys/kernel.h>
#include <sys/socket.h> #include <sys/socket.h>
@ -48,7 +48,7 @@
#include <sys/errno.h> #include <sys/errno.h>
#include <sys/device.h> #include <sys/device.h>
#include <sys/endian.h> #include <sys/endian.h>
#include <net/if.h> #include <net/if.h>
#include <net/if_media.h> #include <net/if_media.h>
@ -58,9 +58,9 @@
#include <net80211/ieee80211_radiotap.h> #include <net80211/ieee80211_radiotap.h>
#include <net80211/ieee80211_var.h> #include <net80211/ieee80211_var.h>
#if NBPFILTER > 0 #if NBPFILTER > 0
#include <net/bpf.h> #include <net/bpf.h>
#endif #endif
#include <machine/bus.h> #include <machine/bus.h>
#include <machine/intr.h> #include <machine/intr.h>

View file

@ -168,7 +168,7 @@ fxp_cardbus_attach(struct device *parent, struct device *self, void *aux)
return; return;
} }
snprintf(intrstr, sizeof(intrstr), "irq %d", ca->ca_intrline); snprintf(intrstr, sizeof(intrstr), "irq %d", ca->ca_intrline);
sc->sc_revision = PCI_REVISION(ca->ca_class); sc->sc_revision = PCI_REVISION(ca->ca_class);
fxp_attach(sc, intrstr); fxp_attach(sc, intrstr);

View file

@ -31,7 +31,7 @@
/* /*
* if_rl_cardbus.c: * if_rl_cardbus.c:
* Cardbus specific routines for Realtek 8139 ethernet adapter. * Cardbus specific routines for Realtek 8139 ethernet adapter.
* Tested for * Tested for
* - elecom-Laneed LD-10/100CBA (Accton MPX5030) * - elecom-Laneed LD-10/100CBA (Accton MPX5030)
* - MELCO LPC3-TX-CB (Realtek 8139) * - MELCO LPC3-TX-CB (Realtek 8139)
*/ */
@ -79,7 +79,7 @@
* on the part of Realtek. Memory mapped mode does appear to work on * on the part of Realtek. Memory mapped mode does appear to work on
* uniprocessor systems though. * uniprocessor systems though.
*/ */
#define RL_USEIOSPACE #define RL_USEIOSPACE
#include <dev/ic/rtl81x9reg.h> #include <dev/ic/rtl81x9reg.h>
@ -99,7 +99,7 @@ const struct pci_matchid rl_cardbus_devices[] = {
}; };
struct rl_cardbus_softc { struct rl_cardbus_softc {
struct rl_softc sc_rl; /* real rtk softc */ struct rl_softc sc_rl; /* real rtk softc */
/* CardBus-specific goo. */ /* CardBus-specific goo. */
cardbus_devfunc_t sc_ct; cardbus_devfunc_t sc_ct;
@ -141,7 +141,7 @@ rl_cardbus_attach(struct device *parent, struct device *self, void *aux)
struct cardbus_softc *psc = struct cardbus_softc *psc =
(struct cardbus_softc *)sc->sc_dev.dv_parent; (struct cardbus_softc *)sc->sc_dev.dv_parent;
cardbus_chipset_tag_t cc = psc->sc_cc; cardbus_chipset_tag_t cc = psc->sc_cc;
cardbus_function_tag_t cf = psc->sc_cf; cardbus_function_tag_t cf = psc->sc_cf;
cardbus_devfunc_t ct = ca->ca_ct; cardbus_devfunc_t ct = ca->ca_ct;
bus_addr_t adr; bus_addr_t adr;
@ -199,7 +199,7 @@ rl_cardbus_attach(struct device *parent, struct device *self, void *aux)
rl_attach(sc); rl_attach(sc);
} }
int int
rl_cardbus_detach(struct device *self, int flags) rl_cardbus_detach(struct device *self, int flags)
{ {
struct rl_cardbus_softc *csc = (void *) self; struct rl_cardbus_softc *csc = (void *) self;
@ -219,7 +219,7 @@ rl_cardbus_detach(struct device *self, int flags)
*/ */
if (sc->sc_ih != NULL) if (sc->sc_ih != NULL)
cardbus_intr_disestablish(ct->ct_cc, ct->ct_cf, sc->sc_ih); cardbus_intr_disestablish(ct->ct_cc, ct->ct_cf, sc->sc_ih);
/* /*
* Release bus space and close window. * Release bus space and close window.
*/ */
@ -230,7 +230,7 @@ rl_cardbus_detach(struct device *self, int flags)
return (0); return (0);
} }
void void
rl_cardbus_setup(struct rl_cardbus_softc *csc) rl_cardbus_setup(struct rl_cardbus_softc *csc)
{ {
struct rl_softc *sc = &csc->sc_rl; struct rl_softc *sc = &csc->sc_rl;
@ -284,11 +284,11 @@ rl_cardbus_setup(struct rl_cardbus_softc *csc)
csc->sc_bar_reg, csc->sc_bar_val); csc->sc_bar_reg, csc->sc_bar_val);
/* Enable the appropriate bits in the CARDBUS CSR. */ /* Enable the appropriate bits in the CARDBUS CSR. */
reg = pci_conf_read(pc, csc->sc_tag, reg = pci_conf_read(pc, csc->sc_tag,
PCI_COMMAND_STATUS_REG); PCI_COMMAND_STATUS_REG);
reg &= ~(PCI_COMMAND_IO_ENABLE|PCI_COMMAND_MEM_ENABLE); reg &= ~(PCI_COMMAND_IO_ENABLE|PCI_COMMAND_MEM_ENABLE);
reg |= csc->sc_csr; reg |= csc->sc_csr;
pci_conf_write(pc, csc->sc_tag, pci_conf_write(pc, csc->sc_tag,
PCI_COMMAND_STATUS_REG, reg); PCI_COMMAND_STATUS_REG, reg);
/* /*

View file

@ -70,8 +70,8 @@
#include "bpfilter.h" #include "bpfilter.h"
#include <sys/param.h> #include <sys/param.h>
#include <sys/systm.h> #include <sys/systm.h>
#include <sys/mbuf.h> #include <sys/mbuf.h>
#include <sys/malloc.h> #include <sys/malloc.h>
#include <sys/kernel.h> #include <sys/kernel.h>
#include <sys/socket.h> #include <sys/socket.h>
@ -89,9 +89,9 @@
#include <net80211/ieee80211_radiotap.h> #include <net80211/ieee80211_radiotap.h>
#include <net80211/ieee80211_var.h> #include <net80211/ieee80211_var.h>
#if NBPFILTER > 0 #if NBPFILTER > 0
#include <net/bpf.h> #include <net/bpf.h>
#endif #endif
#include <machine/bus.h> #include <machine/bus.h>
@ -257,7 +257,7 @@ rtw_cardbus_attach(struct device *parent, struct device *self, void *aux)
csc->sc_intrline = ca->ca_intrline; csc->sc_intrline = ca->ca_intrline;
printf(": irq %d\n", csc->sc_intrline); printf(": irq %d\n", csc->sc_intrline);
/* /*
* Finish off the attach. * Finish off the attach.
*/ */

View file

@ -237,7 +237,7 @@ xl_cardbus_attach(struct device *parent, struct device *self, void *aux)
(ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE); (ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE);
pci_conf_write(ca->ca_pc, ca->ca_tag, PCI_COMMAND_STATUS_REG, pci_conf_write(ca->ca_pc, ca->ca_tag, PCI_COMMAND_STATUS_REG,
command); command);
/* /*
* set latency timer * set latency timer
*/ */

View file

@ -85,7 +85,7 @@ ohci_cardbus_match(struct device *parent, void *match, void *aux)
PCI_SUBCLASS(ca->ca_class) == PCI_SUBCLASS_SERIALBUS_USB && PCI_SUBCLASS(ca->ca_class) == PCI_SUBCLASS_SERIALBUS_USB &&
PCI_INTERFACE(ca->ca_class) == PCI_INTERFACE_OHCI) PCI_INTERFACE(ca->ca_class) == PCI_INTERFACE_OHCI)
return (1); return (1);
return (0); return (0);
} }

View file

@ -44,7 +44,7 @@
* Why recursive? * Why recursive?
* *
* The recursive bus-space administration has two reasons. For one * The recursive bus-space administration has two reasons. For one
* this modelling matches the actual memory and io space management * this modelling matches the actual memory and io space management
* of bridge devices quite well. Furthermore is the rbus a * of bridge devices quite well. Furthermore is the rbus a
* distributed management system, as such it plays well with * distributed management system, as such it plays well with
* multi-thread kernel. * multi-thread kernel.
@ -54,7 +54,7 @@
* rbus can model a bus-to-bus bridge in two ways: dedicated or shared * rbus can model a bus-to-bus bridge in two ways: dedicated or shared
* Dedicated: the bridge has its own bus space. * Dedicated: the bridge has its own bus space.
* Shared: the bridge has bus space, but this bus space is * Shared: the bridge has bus space, but this bus space is
* shared with other bus bridges. * shared with other bus bridges.
*/ */

View file

@ -75,7 +75,7 @@ uhci_cardbus_match(struct device *parent, void *match, void *aux)
PCI_SUBCLASS(ca->ca_class) == PCI_SUBCLASS_SERIALBUS_USB && PCI_SUBCLASS(ca->ca_class) == PCI_SUBCLASS_SERIALBUS_USB &&
PCI_INTERFACE(ca->ca_class) == PCI_INTERFACE_UHCI) PCI_INTERFACE(ca->ca_class) == PCI_INTERFACE_UHCI)
return (1); return (1);
return (0); return (0);
} }
@ -159,7 +159,7 @@ uhci_cardbus_attach(struct device *parent, struct device *self, void *aux)
else else
snprintf(sc->sc.sc_vendor, sizeof(sc->sc.sc_vendor), snprintf(sc->sc.sc_vendor, sizeof(sc->sc.sc_vendor),
"vendor 0x%04x", PCI_VENDOR(ca->ca_id)); "vendor 0x%04x", PCI_VENDOR(ca->ca_id));
r = uhci_init(&sc->sc); r = uhci_init(&sc->sc);
if (r != USBD_NORMAL_COMPLETION) { if (r != USBD_NORMAL_COMPLETION) {
printf("%s: init failed, error=%d\n", devname, r); printf("%s: init failed, error=%d\n", devname, r);

View file

@ -6,17 +6,17 @@
* All rights reserved. * All rights reserved.
* *
* Author: Chris G. Demetriou * Author: Chris G. Demetriou
* *
* Permission to use, copy, modify and distribute this software and * Permission to use, copy, modify and distribute this software and
* its documentation is hereby granted, provided that both the copyright * its documentation is hereby granted, provided that both the copyright
* notice and this permission notice appear in all copies of the * notice and this permission notice appear in all copies of the
* software, derivative works or modified versions, and any portions * software, derivative works or modified versions, and any portions
* thereof, and that both notices appear in supporting documentation. * thereof, and that both notices appear in supporting documentation.
* *
* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
* *
* Carnegie Mellon requests users of this software to return to * Carnegie Mellon requests users of this software to return to
* *
* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU

View file

@ -72,11 +72,11 @@ ahc_eisa_irq(bus_space_tag_t iot, bus_space_handle_t ioh)
int irq; int irq;
u_char intdef; u_char intdef;
u_char hcntrl; u_char hcntrl;
/* Pause the card preserving the IRQ type */ /* Pause the card preserving the IRQ type */
hcntrl = bus_space_read_1(iot, ioh, HCNTRL) & IRQMS; hcntrl = bus_space_read_1(iot, ioh, HCNTRL) & IRQMS;
bus_space_write_1(iot, ioh, HCNTRL, hcntrl | PAUSE); bus_space_write_1(iot, ioh, HCNTRL, hcntrl | PAUSE);
intdef = bus_space_read_1(iot, ioh, INTDEF); intdef = bus_space_read_1(iot, ioh, INTDEF);
switch (irq = (intdef & VECTOR)) { switch (irq = (intdef & VECTOR)) {
case 9: case 9:
@ -145,10 +145,10 @@ ahc_eisa_attach(struct device *parent, struct device *self, void *aux)
u_int scsiconf1; u_int scsiconf1;
u_int intdef; u_int intdef;
int i; int i;
ahc_set_name(ahc, ahc->sc_dev.dv_xname); ahc_set_name(ahc, ahc->sc_dev.dv_xname);
ahc_set_unit(ahc, ahc->sc_dev.dv_unit); ahc_set_unit(ahc, ahc->sc_dev.dv_unit);
/* set dma tags */ /* set dma tags */
ahc->parent_dmat = ea->ea_dmat; ahc->parent_dmat = ea->ea_dmat;
@ -167,7 +167,7 @@ ahc_eisa_attach(struct device *parent, struct device *self, void *aux)
ea->ea_idstring); ea->ea_idstring);
} }
printf(": %s\n", model); printf(": %s\n", model);
/* /*
* Instead of ahc_alloc() as in FreeBSD, do the few relevant * Instead of ahc_alloc() as in FreeBSD, do the few relevant
* initializations manually. * initializations manually.
@ -194,15 +194,15 @@ ahc_eisa_attach(struct device *parent, struct device *self, void *aux)
if (ahc_softc_init(ahc) != 0) if (ahc_softc_init(ahc) != 0)
return; return;
if (ahc_reset(ahc, /*reinit*/FALSE) != 0) if (ahc_reset(ahc, /*reinit*/FALSE) != 0)
return; return;
/* See if we are edge triggered */ /* See if we are edge triggered */
intdef = ahc_inb(ahc, INTDEF); intdef = ahc_inb(ahc, INTDEF);
if ((intdef & EDGE_TRIG) != 0) if ((intdef & EDGE_TRIG) != 0)
ahc->flags |= AHC_EDGE_INTERRUPT; ahc->flags |= AHC_EDGE_INTERRUPT;
if (eisa_intr_map(ec, irq, &ih)) { if (eisa_intr_map(ec, irq, &ih)) {
printf("%s: couldn't map interrupt (%d)\n", printf("%s: couldn't map interrupt (%d)\n",
ahc->sc_dev.dv_xname, irq); ahc->sc_dev.dv_xname, irq);
@ -221,7 +221,7 @@ ahc_eisa_attach(struct device *parent, struct device *self, void *aux)
} }
/* /*
* Now that we know we own the resources we need, do the * Now that we know we own the resources we need, do the
* card initialization. * card initialization.
* *
* First, the aic7770 card specific setup. * First, the aic7770 card specific setup.
@ -229,7 +229,7 @@ ahc_eisa_attach(struct device *parent, struct device *self, void *aux)
biosctrl = ahc_inb(ahc, HA_274_BIOSCTRL); biosctrl = ahc_inb(ahc, HA_274_BIOSCTRL);
scsiconf = ahc_inb(ahc, SCSICONF); scsiconf = ahc_inb(ahc, SCSICONF);
scsiconf1 = ahc_inb(ahc, SCSICONF + 1); scsiconf1 = ahc_inb(ahc, SCSICONF + 1);
/* Get the primary channel information */ /* Get the primary channel information */
if ((biosctrl & CHANNEL_B_PRIMARY) != 0) if ((biosctrl & CHANNEL_B_PRIMARY) != 0)
ahc->flags |= AHC_PRIMARY_CHANNEL; ahc->flags |= AHC_PRIMARY_CHANNEL;
@ -252,10 +252,10 @@ ahc_eisa_attach(struct device *parent, struct device *self, void *aux)
* We have no way to tell, so assume extended * We have no way to tell, so assume extended
* translation is enabled. * translation is enabled.
*/ */
ahc->flags |= AHC_EXTENDED_TRANS_A|AHC_EXTENDED_TRANS_B; ahc->flags |= AHC_EXTENDED_TRANS_A|AHC_EXTENDED_TRANS_B;
/* /*
* See if we have a Rev E or higher aic7770. Anything below a * See if we have a Rev E or higher aic7770. Anything below a
* Rev E will have a R/O autoflush disable configuration bit. * Rev E will have a R/O autoflush disable configuration bit.
* It's still not clear exactly what is different about the Rev E. * It's still not clear exactly what is different about the Rev E.
@ -303,12 +303,12 @@ ahc_eisa_attach(struct device *parent, struct device *self, void *aux)
ahc_free(ahc); ahc_free(ahc);
return; return;
} }
/* /*
* Link this softc in with all other ahc instances. * Link this softc in with all other ahc instances.
*/ */
ahc_softc_insert(ahc); ahc_softc_insert(ahc);
/* /*
* Enable the board's BUS drivers * Enable the board's BUS drivers
*/ */
@ -334,7 +334,7 @@ ahc_eisa_attach(struct device *parent, struct device *self, void *aux)
if (intrstr != NULL) if (intrstr != NULL)
printf("%s: interrupting at %s\n", ahc->sc_dev.dv_xname, printf("%s: interrupting at %s\n", ahc->sc_dev.dv_xname,
intrstr); intrstr);
ahc_intr_enable(ahc, TRUE); ahc_intr_enable(ahc, TRUE);
/* Attach sub-devices - always succeeds */ /* Attach sub-devices - always succeeds */

View file

@ -143,12 +143,12 @@ cac_eisa_attach(struct device *parent, struct device *self, void *aux)
bus_space_tag_t iot; bus_space_tag_t iot;
const char *intrstr; const char *intrstr;
int irq, i; int irq, i;
ea = aux; ea = aux;
sc = (struct cac_softc *)self; sc = (struct cac_softc *)self;
iot = ea->ea_iot; iot = ea->ea_iot;
ec = ea->ea_ec; ec = ea->ea_ec;
if (bus_space_map(iot, EISA_SLOT_ADDR(ea->ea_slot) + if (bus_space_map(iot, EISA_SLOT_ADDR(ea->ea_slot) +
CAC_EISA_SLOT_OFFSET, CAC_EISA_IOSIZE, 0, &ioh)) { CAC_EISA_SLOT_OFFSET, CAC_EISA_IOSIZE, 0, &ioh)) {
printf(": can't map i/o space\n"); printf(": can't map i/o space\n");
@ -171,7 +171,7 @@ cac_eisa_attach(struct device *parent, struct device *self, void *aux)
sc->sc_ioh = ioh; sc->sc_ioh = ioh;
sc->sc_dmat = ea->ea_dmat; sc->sc_dmat = ea->ea_dmat;
/* /*
* Map and establish the interrupt. * Map and establish the interrupt.
*/ */
switch (bus_space_read_1(iot, ioh, CAC_EISA_IOCONF) & 0xf0) { switch (bus_space_read_1(iot, ioh, CAC_EISA_IOCONF) & 0xf0) {
@ -196,7 +196,7 @@ cac_eisa_attach(struct device *parent, struct device *self, void *aux)
printf(": can't map interrupt (%d)\n", irq); printf(": can't map interrupt (%d)\n", irq);
return; return;
} }
intrstr = eisa_intr_string(ec, ih); intrstr = eisa_intr_string(ec, ih);
if ((sc->sc_ih = eisa_intr_establish(ec, ih, IST_LEVEL, IPL_BIO, if ((sc->sc_ih = eisa_intr_establish(ec, ih, IST_LEVEL, IPL_BIO,
cac_intr, sc, sc->sc_dv.dv_xname)) == NULL) { cac_intr, sc, sc->sc_dv.dv_xname)) == NULL) {

View file

@ -82,7 +82,7 @@ int
eisaprint(void *aux, const char *pnp) eisaprint(void *aux, const char *pnp)
{ {
register struct eisa_attach_args *ea = aux; register struct eisa_attach_args *ea = aux;
char devinfo[256]; char devinfo[256];
if (pnp) { if (pnp) {
eisa_devinfo(ea->ea_idstring, devinfo, sizeof devinfo); eisa_devinfo(ea->ea_idstring, devinfo, sizeof devinfo);

View file

@ -236,7 +236,7 @@ product ASU 4701 Mini 486AS Main Board
product ASU 4901 VL/EISA-486SV1 Main Board product ASU 4901 VL/EISA-486SV1 Main Board
product ASU 5101 PCI/E-P5MP4 or PCI/E-P54NP4 Main Board V2.3 product ASU 5101 PCI/E-P5MP4 or PCI/E-P54NP4 Main Board V2.3
product ASU 5201 P/E-P55T2P4D Main Board (CFG File V1.2) product ASU 5201 P/E-P55T2P4D Main Board (CFG File V1.2)
/* ATI products */ /* ATI products */
product ATI 1500 AT-1500 Ethernet product ATI 1500 AT-1500 Ethernet
product ATI 1700 AT-1700 Ethernet product ATI 1700 AT-1700 Ethernet

View file

@ -46,7 +46,7 @@
#include <machine/bus.h> #include <machine/bus.h>
#include <dev/eisa/eisareg.h> /* For ID register & string info. */ #include <dev/eisa/eisareg.h> /* For ID register & string info. */
/* /*
* Structures and definitions needed by the machine-dependent header. * Structures and definitions needed by the machine-dependent header.
*/ */
struct eisabus_attach_args; struct eisabus_attach_args;

View file

@ -254,7 +254,7 @@ amlclock_set_cpu_freq(struct amlclock_softc *sc, bus_size_t offset,
*/ */
reg = HREAD4(sc, offset); reg = HREAD4(sc, offset);
if (freq > 1000000000) { if (freq > 1000000000) {
/* /*
* Switch to a fixed clock if we're currently using * Switch to a fixed clock if we're currently using
* SYS_PLL/SYS1_PLL. Doesn't really matter which one. * SYS_PLL/SYS1_PLL. Doesn't really matter which one.
*/ */
@ -296,7 +296,7 @@ amlclock_set_cpu_freq(struct amlclock_softc *sc, bus_size_t offset,
if ((div % 2) == 0) { if ((div % 2) == 0) {
parent_freq /= 2; parent_freq /= 2;
div /= 2; div /= 2;
} else { } else {
parent_freq /= 3; parent_freq /= 3;
div /= 3; div /= 3;
} }

View file

@ -510,7 +510,7 @@ amlmmc_bus_clock(sdmmc_chipset_handle_t sch, int freq, int timing)
freq = 150000; freq = 150000;
pinctrl_byname(sc->sc_node, "clk-gate"); pinctrl_byname(sc->sc_node, "clk-gate");
if (freq == 0) if (freq == 0)
return 0; return 0;
@ -547,7 +547,7 @@ amlmmc_bus_clock(sdmmc_chipset_handle_t sch, int freq, int timing)
HCLR4(sc, SD_EMMC_CFG, SD_EMMC_CFG_STOP_CLOCK); HCLR4(sc, SD_EMMC_CFG, SD_EMMC_CFG_STOP_CLOCK);
pinctrl_byname(sc->sc_node, "default"); pinctrl_byname(sc->sc_node, "default");
return 0; return 0;
} }

View file

@ -191,7 +191,7 @@ void
amlpciephy_addr(struct amlpciephy_softc *sc, bus_addr_t addr) amlpciephy_addr(struct amlpciephy_softc *sc, bus_addr_t addr)
{ {
int timo; int timo;
HWRITE4(sc, PHY_R4, addr << 2); HWRITE4(sc, PHY_R4, addr << 2);
HWRITE4(sc, PHY_R4, addr << 2); HWRITE4(sc, PHY_R4, addr << 2);
HWRITE4(sc, PHY_R4, (addr << 2) | PHY_R4_PHY_CR_CAP_ADDR); HWRITE4(sc, PHY_R4, (addr << 2) | PHY_R4_PHY_CR_CAP_ADDR);

View file

@ -119,7 +119,7 @@ static inline void
amlpwrc_toggle(struct regmap *rm, bus_size_t reg, uint32_t mask, int on) amlpwrc_toggle(struct regmap *rm, bus_size_t reg, uint32_t mask, int on)
{ {
uint32_t val; uint32_t val;
val = regmap_read_4(rm, reg << 2); val = regmap_read_4(rm, reg << 2);
if (on) if (on)
val &= ~mask; val &= ~mask;

View file

@ -108,7 +108,7 @@ amlsm_attach(struct device *parent, struct device *self, void *aux)
ret = smc_call(AML_SM_GET_CHIP_ID, 0, 0, 0); ret = smc_call(AML_SM_GET_CHIP_ID, 0, 0, 0);
printf(": ver %u\n", info->version); printf(": ver %u\n", info->version);
if (ret != -1) { if (ret != -1) {
for (i = 0; i < nitems(info->chip_id); i++) for (i = 0; i < nitems(info->chip_id); i++)
enqueue_randomness(info->chip_id[i]); enqueue_randomness(info->chip_id[i]);

View file

@ -183,7 +183,7 @@ amltemp_calc_temp(struct amltemp_softc *sc, int32_t code)
const uint32_t m = 424; const uint32_t m = 424;
const uint32_t n = 324; const uint32_t n = 324;
int64_t tmp1, tmp2; int64_t tmp1, tmp2;
tmp1 = (code * m) / 100; tmp1 = (code * m) / 100;
tmp2 = (code * n) / 100; tmp2 = (code * n) / 100;
tmp1 = (tmp1 * (1 << 16)) / ((1 << 16) + tmp2); tmp1 = (tmp1 * (1 << 16)) / ((1 << 16) + tmp2);

View file

@ -392,7 +392,7 @@ amluartopen(dev_t dev, int flag, int mode, struct proc *p)
tp->t_lflag = TTYDEF_LFLAG; tp->t_lflag = TTYDEF_LFLAG;
tp->t_ispeed = tp->t_ospeed = tp->t_ispeed = tp->t_ospeed =
sc->sc_conspeed ? sc->sc_conspeed : B115200; sc->sc_conspeed ? sc->sc_conspeed : B115200;
s = spltty(); s = spltty();
amluart_param(tp, &tp->t_termios); amluart_param(tp, &tp->t_termios);
@ -481,7 +481,7 @@ amluartread(dev_t dev, struct uio *uio, int flag)
if (tp == NULL) if (tp == NULL)
return ENODEV; return ENODEV;
return (*linesw[tp->t_line].l_read)(tp, uio, flag); return (*linesw[tp->t_line].l_read)(tp, uio, flag);
} }
@ -492,7 +492,7 @@ amluartwrite(dev_t dev, struct uio *uio, int flag)
if (tp == NULL) if (tp == NULL)
return ENODEV; return ENODEV;
return (*linesw[tp->t_line].l_write)(tp, uio, flag); return (*linesw[tp->t_line].l_write)(tp, uio, flag);
} }
@ -598,7 +598,7 @@ int
amluartcngetc(dev_t dev) amluartcngetc(dev_t dev)
{ {
uint8_t c; uint8_t c;
while (bus_space_read_4(amluartconsiot, amluartconsioh, UART_STATUS) & while (bus_space_read_4(amluartconsiot, amluartconsioh, UART_STATUS) &
UART_STATUS_RX_FIFO_EMPTY) UART_STATUS_RX_FIFO_EMPTY)
CPU_BUSY_CYCLE(); CPU_BUSY_CYCLE();

View file

@ -278,7 +278,7 @@ const struct axppmic_sensdata axp803_sensdata[] = {
{ "", SENSOR_TEMP, 0x56, 5450000, 106250 }, { "", SENSOR_TEMP, 0x56, 5450000, 106250 },
{ NULL } { NULL }
}; };
const struct axppmic_sensdata axp803_battery_sensdata[] = { const struct axppmic_sensdata axp803_battery_sensdata[] = {
{ "ACIN", SENSOR_INDICATOR, 0x00, (1 << 7), (1 << 6) }, { "ACIN", SENSOR_INDICATOR, 0x00, (1 << 7), (1 << 6) },
{ "VBUS", SENSOR_INDICATOR, 0x00, (1 << 5), (1 << 4) }, { "VBUS", SENSOR_INDICATOR, 0x00, (1 << 5), (1 << 4) },

View file

@ -469,7 +469,7 @@ bcmpcie_bs_iomap(bus_space_tag_t t, bus_addr_t addr, bus_size_t size,
addr - pci_start + phys_start, size, flags, bshp); addr - pci_start + phys_start, size, flags, bshp);
} }
} }
return ENXIO; return ENXIO;
} }
@ -491,7 +491,7 @@ bcmpcie_bs_memmap(bus_space_tag_t t, bus_addr_t addr, bus_size_t size,
addr - pci_start + phys_start, size, flags, bshp); addr - pci_start + phys_start, size, flags, bshp);
} }
} }
return ENXIO; return ENXIO;
} }

View file

@ -77,7 +77,7 @@ bcmtmon_attach(struct device *parent, struct device *self, void *aux)
{ {
struct bcmtmon_softc *sc = (struct bcmtmon_softc *)self; struct bcmtmon_softc *sc = (struct bcmtmon_softc *)self;
struct fdt_attach_args *faa = aux; struct fdt_attach_args *faa = aux;
if (faa->fa_nreg < 1) { if (faa->fa_nreg < 1) {
printf(": no registers\n"); printf(": no registers\n");
return; return;

View file

@ -103,7 +103,7 @@ dwdog_reset(void)
{ {
struct dwdog_softc *sc = dwdog_cd.cd_devs[0]; struct dwdog_softc *sc = dwdog_cd.cd_devs[0];
/* /*
* Generate system reset when timer expires and select * Generate system reset when timer expires and select
* smallest timeout. * smallest timeout.
*/ */

View file

@ -554,7 +554,7 @@ dwmmc_intr(void *arg)
sdmmc_card_intr(sc->sc_sdmmc); sdmmc_card_intr(sc->sc_sdmmc);
handled = 1; handled = 1;
} }
return handled; return handled;
} }
@ -656,7 +656,7 @@ dwmmc_bus_clock(sdmmc_chipset_handle_t sch, int freq, int timing)
if (freq == 0) if (freq == 0)
return 0; return 0;
if (sc->sc_clkbase / 1000 > freq) { if (sc->sc_clkbase / 1000 > freq) {
for (div = 1; div < 256; div++) for (div = 1; div < 256; div++)
if (sc->sc_clkbase / (2 * 1000 * div) <= freq) if (sc->sc_clkbase / (2 * 1000 * div) <= freq)
@ -705,7 +705,7 @@ int
dwmmc_bus_width(sdmmc_chipset_handle_t sch, int width) dwmmc_bus_width(sdmmc_chipset_handle_t sch, int width)
{ {
struct dwmmc_softc *sc = sch; struct dwmmc_softc *sc = sch;
switch (width) { switch (width) {
case 1: case 1:
HCLR4(sc, SDMMC_CTYPE, SDMMC_CTYPE_8BIT|SDMMC_CTYPE_4BIT); HCLR4(sc, SDMMC_CTYPE, SDMMC_CTYPE_8BIT|SDMMC_CTYPE_4BIT);
@ -929,7 +929,7 @@ dwmmc_exec_command(sdmmc_chipset_handle_t sch, struct sdmmc_command *cmd)
if (ISSET(cmd->c_flags, SCF_CMD_READ)) { if (ISSET(cmd->c_flags, SCF_CMD_READ)) {
/* Set card read threshold to the size of a block. */ /* Set card read threshold to the size of a block. */
HWRITE4(sc, SDMMC_CARDTHRCTL, HWRITE4(sc, SDMMC_CARDTHRCTL,
cmd->c_blklen << SDMMC_CARDTHRCTL_RDTHR_SHIFT | cmd->c_blklen << SDMMC_CARDTHRCTL_RDTHR_SHIFT |
SDMMC_CARDTHRCTL_RDTHREN); SDMMC_CARDTHRCTL_RDTHREN);
} }
@ -1010,7 +1010,7 @@ dwmmc_exec_command(sdmmc_chipset_handle_t sch, struct sdmmc_command *cmd)
if (cmd->c_datalen > 0 && !cmd->c_dmamap) if (cmd->c_datalen > 0 && !cmd->c_dmamap)
dwmmc_transfer_data(sc, cmd); dwmmc_transfer_data(sc, cmd);
if (cmd->c_datalen > 0 && cmd->c_dmamap) { if (cmd->c_datalen > 0 && cmd->c_dmamap) {
while (sc->sc_idsts == 0) { while (sc->sc_idsts == 0) {
error = tsleep_nsec(&sc->sc_idsts, PWAIT, "idsts", error = tsleep_nsec(&sc->sc_idsts, PWAIT, "idsts",
@ -1021,7 +1021,7 @@ dwmmc_exec_command(sdmmc_chipset_handle_t sch, struct sdmmc_command *cmd)
goto done; goto done;
} }
} }
for (timeout = 10000; timeout > 0; timeout--) { for (timeout = 10000; timeout > 0; timeout--) {
status = HREAD4(sc, SDMMC_RINTSTS); status = HREAD4(sc, SDMMC_RINTSTS);
if (status & SDMMC_RINTSTS_DTO) if (status & SDMMC_RINTSTS_DTO)

View file

@ -42,7 +42,7 @@
#define EMMC_HOST_CTRL3_CMD_CONFLICT_CHECK (1U << 0) #define EMMC_HOST_CTRL3_CMD_CONFLICT_CHECK (1U << 0)
#define EMMC_HOST_CTRL3_SW_CG_DIS (1U << 4) #define EMMC_HOST_CTRL3_SW_CG_DIS (1U << 4)
#define EMMC_EMMC_CTRL 0x52c /* HW */ #define EMMC_EMMC_CTRL 0x52c /* HW */
#define EMMC_EMMC_CTRL_CARD_IS_EMMC (1U << 0) #define EMMC_EMMC_CTRL_CARD_IS_EMMC (1U << 0)
#define EMMC_EMMC_CTRL_DISABLE_DATA_CRC_CHK (1U << 1) #define EMMC_EMMC_CTRL_DISABLE_DATA_CRC_CHK (1U << 1)
#define EMMC_EMMC_CTRL_EMMC_RST_N (1U << 2) #define EMMC_EMMC_CTRL_EMMC_RST_N (1U << 2)
#define EMMC_EMMC_CTRL_EMMC_RST_N_OE (1U << 3) #define EMMC_EMMC_CTRL_EMMC_RST_N_OE (1U << 3)

View file

@ -1392,7 +1392,7 @@ dwpcie_rk3568_init(struct dwpcie_softc *sc)
err: err:
if (reset_gpiolen > 0) if (reset_gpiolen > 0)
free(reset_gpio, M_TEMP, reset_gpiolen); free(reset_gpio, M_TEMP, reset_gpiolen);
return error; return error;
} }

View file

@ -271,7 +271,7 @@ fanpwr_get_voltage(void *cookie)
{ {
struct fanpwr_softc *sc = cookie; struct fanpwr_softc *sc = cookie;
uint8_t vsel; uint8_t vsel;
vsel = fanpwr_read(sc, sc->sc_vsel); vsel = fanpwr_read(sc, sc->sc_vsel);
return sc->sc_vbase + (vsel & sc->sc_vsel_nsel_mask) * sc->sc_vstep; return sc->sc_vbase + (vsel & sc->sc_vsel_nsel_mask) * sc->sc_vstep;
} }

View file

@ -257,7 +257,7 @@ attach amldwusb at fdt
file dev/fdt/amldwusb.c amldwusb file dev/fdt/amldwusb.c amldwusb
device amliic: i2cbus device amliic: i2cbus
attach amliic at fdt attach amliic at fdt
file dev/fdt/amliic.c amliic file dev/fdt/amliic.c amliic
device amlmmc: sdmmcbus device amlmmc: sdmmcbus

View file

@ -330,7 +330,7 @@ fec_attach(struct device *parent, struct device *self, void *aux)
* active-low, even if it is marked as active-high in * active-low, even if it is marked as active-high in
* the device tree. As a result the device tree for * the device tree. As a result the device tree for
* many boards incorrectly marks the gpio as * many boards incorrectly marks the gpio as
* active-high. * active-high.
*/ */
phy_reset_gpio[2] = GPIO_ACTIVE_LOW; phy_reset_gpio[2] = GPIO_ACTIVE_LOW;
gpio_controller_config_pin(phy_reset_gpio, GPIO_CONFIG_OUTPUT); gpio_controller_config_pin(phy_reset_gpio, GPIO_CONFIG_OUTPUT);

View file

@ -1872,42 +1872,42 @@ static const struct mvneta_counter mvneta_counters[] = {
{ "1024-maxB", KSTAT_KV_U_PACKETS, 0x3034 }, { "1024-maxB", KSTAT_KV_U_PACKETS, 0x3034 },
[mvneta_stat_good_octets_sent] = [mvneta_stat_good_octets_sent] =
{ "tx good", KSTAT_KV_U_BYTES, 0x0 /* 64bit */ }, { "tx good", KSTAT_KV_U_BYTES, 0x0 /* 64bit */ },
[mvneta_stat_good_frames_sent] = [mvneta_stat_good_frames_sent] =
{ "tx good", KSTAT_KV_U_PACKETS, 0x3040 }, { "tx good", KSTAT_KV_U_PACKETS, 0x3040 },
[mvneta_stat_excessive_collision] = [mvneta_stat_excessive_collision] =
{ "tx excess coll", KSTAT_KV_U_PACKETS, 0x3044 }, { "tx excess coll", KSTAT_KV_U_PACKETS, 0x3044 },
[mvneta_stat_multicast_frames_sent] = [mvneta_stat_multicast_frames_sent] =
{ "tx mcast", KSTAT_KV_U_PACKETS, 0x3048 }, { "tx mcast", KSTAT_KV_U_PACKETS, 0x3048 },
[mvneta_stat_broadcast_frames_sent] = [mvneta_stat_broadcast_frames_sent] =
{ "tx bcast", KSTAT_KV_U_PACKETS, 0x304c }, { "tx bcast", KSTAT_KV_U_PACKETS, 0x304c },
[mvneta_stat_unrecog_mac_control_received] = [mvneta_stat_unrecog_mac_control_received] =
{ "rx unknown fc", KSTAT_KV_U_PACKETS, 0x3050 }, { "rx unknown fc", KSTAT_KV_U_PACKETS, 0x3050 },
[mvneta_stat_good_fc_received] = [mvneta_stat_good_fc_received] =
{ "rx fc good", KSTAT_KV_U_PACKETS, 0x3058 }, { "rx fc good", KSTAT_KV_U_PACKETS, 0x3058 },
[mvneta_stat_bad_fc_received] = [mvneta_stat_bad_fc_received] =
{ "rx fc bad", KSTAT_KV_U_PACKETS, 0x305c }, { "rx fc bad", KSTAT_KV_U_PACKETS, 0x305c },
[mvneta_stat_undersize] = [mvneta_stat_undersize] =
{ "rx undersize", KSTAT_KV_U_PACKETS, 0x3060 }, { "rx undersize", KSTAT_KV_U_PACKETS, 0x3060 },
[mvneta_stat_fc_sent] = [mvneta_stat_fc_sent] =
{ "tx fc", KSTAT_KV_U_PACKETS, 0x3054 }, { "tx fc", KSTAT_KV_U_PACKETS, 0x3054 },
[mvneta_stat_fragments] = [mvneta_stat_fragments] =
{ "rx fragments", KSTAT_KV_U_NONE, 0x3064 }, { "rx fragments", KSTAT_KV_U_NONE, 0x3064 },
[mvneta_stat_oversize] = [mvneta_stat_oversize] =
{ "rx oversize", KSTAT_KV_U_PACKETS, 0x3068 }, { "rx oversize", KSTAT_KV_U_PACKETS, 0x3068 },
[mvneta_stat_jabber] = [mvneta_stat_jabber] =
{ "rx jabber", KSTAT_KV_U_PACKETS, 0x306c }, { "rx jabber", KSTAT_KV_U_PACKETS, 0x306c },
[mvneta_stat_mac_rcv_error] = [mvneta_stat_mac_rcv_error] =
{ "rx mac errors", KSTAT_KV_U_PACKETS, 0x3070 }, { "rx mac errors", KSTAT_KV_U_PACKETS, 0x3070 },
[mvneta_stat_bad_crc] = [mvneta_stat_bad_crc] =
{ "rx bad crc", KSTAT_KV_U_PACKETS, 0x3074 }, { "rx bad crc", KSTAT_KV_U_PACKETS, 0x3074 },
[mvneta_stat_collisions] = [mvneta_stat_collisions] =
{ "rx colls", KSTAT_KV_U_PACKETS, 0x3078 }, { "rx colls", KSTAT_KV_U_PACKETS, 0x3078 },
[mvneta_stat_late_collisions] = [mvneta_stat_late_collisions] =
{ "rx late colls", KSTAT_KV_U_PACKETS, 0x307c }, { "rx late colls", KSTAT_KV_U_PACKETS, 0x307c },
[mvneta_stat_port_discard] = [mvneta_stat_port_discard] =
{ "rx discard", KSTAT_KV_U_PACKETS, MVNETA_PXDFC }, { "rx discard", KSTAT_KV_U_PACKETS, MVNETA_PXDFC },
[mvneta_stat_port_overrun] = [mvneta_stat_port_overrun] =
{ "rx overrun", KSTAT_KV_U_PACKETS, MVNETA_POFC }, { "rx overrun", KSTAT_KV_U_PACKETS, MVNETA_POFC },
}; };

View file

@ -453,7 +453,7 @@ imxccm_get_periphclk(struct imxccm_softc *sc)
default: default:
return 0; return 0;
} }
} else { } else {
switch((HREAD4(sc, CCM_CBCMR) switch((HREAD4(sc, CCM_CBCMR)
>> CCM_CBCMR_PRE_PERIPH_CLK_SEL_SHIFT) & CCM_CBCMR_PRE_PERIPH_CLK_SEL_MASK) { >> CCM_CBCMR_PRE_PERIPH_CLK_SEL_SHIFT) & CCM_CBCMR_PRE_PERIPH_CLK_SEL_MASK) {

View file

@ -125,7 +125,7 @@ imxsrc_match(struct device *parent, void *match, void *aux)
struct fdt_attach_args *faa = aux; struct fdt_attach_args *faa = aux;
if (OF_is_compatible(faa->fa_node, "fsl,imx51-src") || if (OF_is_compatible(faa->fa_node, "fsl,imx51-src") ||
OF_is_compatible(faa->fa_node, "fsl,imx8mq-src")) OF_is_compatible(faa->fa_node, "fsl,imx8mq-src"))
return 10; /* Must beat syscon(4). */ return 10; /* Must beat syscon(4). */
return 0; return 0;

View file

@ -139,7 +139,7 @@ pinctrl_pinctrl(uint32_t phandle, void *cookie)
struct pinctrl_softc *sc = cookie; struct pinctrl_softc *sc = cookie;
uint32_t *pins; uint32_t *pins;
int node, len, i; int node, len, i;
node = OF_getnodebyphandle(phandle); node = OF_getnodebyphandle(phandle);
if (node == 0) if (node == 0)
return -1; return -1;
@ -158,7 +158,7 @@ pinctrl_pinctrl(uint32_t phandle, void *cookie)
if (sc->sc_ncells == 2) if (sc->sc_ncells == 2)
func |= pins[i + 2]; func |= pins[i + 2];
if (sc->sc_reg_width == 16) if (sc->sc_reg_width == 16)
val = HREAD2(sc, reg); val = HREAD2(sc, reg);
else if (sc->sc_reg_width == 32) else if (sc->sc_reg_width == 32)

View file

@ -155,7 +155,7 @@ pwmreg_enable(void *cookie, int on)
if (ps.ps_enabled == on) if (ps.ps_enabled == on)
return 0; return 0;
ps.ps_enabled = on; ps.ps_enabled = on;
return pwm_set_state(sc->sc_pwm, &ps); return pwm_set_state(sc->sc_pwm, &ps);
} }

View file

@ -1,4 +1,4 @@
/* $OpenBSD: rkclock.c,v 1.76 2023/04/27 08:55:59 kettenis Exp $ */ /* $OpenBSD: rkclock.c,v 1.77 2023/06/19 09:54:15 kettenis Exp $ */
/* /*
* Copyright (c) 2017, 2018 Mark Kettenis <kettenis@openbsd.org> * Copyright (c) 2017, 2018 Mark Kettenis <kettenis@openbsd.org>
* *
@ -500,7 +500,7 @@ rkclock_div_con(struct rkclock_softc *sc, const struct rkclock *clk,
/* Derive maximum value from mask. */ /* Derive maximum value from mask. */
max_div_con = clk->div_mask >> (ffs(clk->div_mask) - 1); max_div_con = clk->div_mask >> (ffs(clk->div_mask) - 1);
parent_freq = sc->sc_cd.cd_get_frequency(sc, &idx); parent_freq = sc->sc_cd.cd_get_frequency(sc, &idx);
div = (parent_freq + freq - 1) / freq; div = (parent_freq + freq - 1) / freq;
div_con = (div > 0 ? div - 1 : 0); div_con = (div > 0 ? div - 1 : 0);
@ -706,7 +706,7 @@ rk3288_init(struct rkclock_softc *sc)
node = OF_finddevice("/"); node = OF_finddevice("/");
if (OF_is_compatible(node, "rockchip,rk3288-tinker")) { if (OF_is_compatible(node, "rockchip,rk3288-tinker")) {
uint32_t idx; uint32_t idx;
/* Run at 1.2 GHz. */ /* Run at 1.2 GHz. */
idx = RK3288_ARMCLK; idx = RK3288_ARMCLK;
rk3288_set_frequency(sc, &idx, 1200000000); rk3288_set_frequency(sc, &idx, 1200000000);
@ -1106,7 +1106,7 @@ const struct rkclock rk3308_clocks[] = {
RK3308_PCLK_MAC, 0, 0, 0, RK3308_PCLK_MAC, 0, 0, 0,
{ RK3308_PCLK_PERI } { RK3308_PCLK_PERI }
}, },
{ {
/* Sentinel */ /* Sentinel */
} }
@ -2221,8 +2221,8 @@ rk3328_reset(void *cookie, uint32_t *cells, int on)
mask << 16 | (on ? mask : 0)); mask << 16 | (on ? mask : 0));
} }
/* /*
* Rockchip RK3399 * Rockchip RK3399
*/ */
const struct rkclock rk3399_clocks[] = { const struct rkclock rk3399_clocks[] = {
@ -2692,7 +2692,7 @@ rk3399_get_armclk(struct rkclock_softc *sc, bus_size_t clksel)
div_con = (reg & RK3399_CRU_CLK_CORE_DIV_CON_MASK) >> div_con = (reg & RK3399_CRU_CLK_CORE_DIV_CON_MASK) >>
RK3399_CRU_CLK_CORE_DIV_CON_SHIFT; RK3399_CRU_CLK_CORE_DIV_CON_SHIFT;
idx = rk3399_armclk_parent(mux); idx = rk3399_armclk_parent(mux);
return rk3399_get_frequency(sc, &idx) / (div_con + 1); return rk3399_get_frequency(sc, &idx) / (div_con + 1);
} }
@ -2817,7 +2817,7 @@ rk3399_set_frac(struct rkclock_softc *sc, uint32_t parent, bus_size_t base,
if (q2 > 0xffff) if (q2 > 0xffff)
break; break;
p0 = p1; p1 = p2; p0 = p1; p1 = p2;
q0 = q1; q1 = q2; q0 = q1; q1 = q2;
} }
@ -3008,7 +3008,7 @@ const struct rkclock rk3399_pmu_clocks[] = {
/* Sentinel */ /* Sentinel */
} }
}; };
void void
rk3399_pmu_init(struct rkclock_softc *sc) rk3399_pmu_init(struct rkclock_softc *sc)
{ {
@ -3077,8 +3077,8 @@ rk3399_pmu_reset(void *cookie, uint32_t *cells, int on)
printf("%s: 0x%08x\n", __func__, idx); printf("%s: 0x%08x\n", __func__, idx);
} }
/* /*
* Rockchip RK3568 * Rockchip RK3568
*/ */
const struct rkclock rk3568_clocks[] = { const struct rkclock rk3568_clocks[] = {
@ -3829,8 +3829,8 @@ rk3568_pmu_reset(void *cookie, uint32_t *cells, int on)
printf("%s: 0x%08x\n", __func__, idx); printf("%s: 0x%08x\n", __func__, idx);
} }
/* /*
* Rockchip RK3588 * Rockchip RK3588
*/ */
const struct rkclock rk3588_clocks[] = { const struct rkclock rk3588_clocks[] = {
@ -4217,7 +4217,7 @@ rk3588_set_pll(struct rkclock_softc *sc, bus_size_t base, uint32_t freq)
/* Power down PLL. */ /* Power down PLL. */
HWRITE4(sc, base + 0x0004, HWRITE4(sc, base + 0x0004,
RK3588_CRU_PLL_RESETB << 16 | RK3588_CRU_PLL_RESETB); RK3588_CRU_PLL_RESETB << 16 | RK3588_CRU_PLL_RESETB);
/* Set PLL rate. */ /* Set PLL rate. */
HWRITE4(sc, base + 0x0000, HWRITE4(sc, base + 0x0000,
RK3588_CRU_PLL_M_MASK << 16 | m << RK3588_CRU_PLL_M_SHIFT); RK3588_CRU_PLL_M_MASK << 16 | m << RK3588_CRU_PLL_M_SHIFT);
@ -4341,6 +4341,10 @@ rk3588_reset(void *cookie, uint32_t *cells, int on)
reg = RK3588_CRU_SOFTRST_CON(33); reg = RK3588_CRU_SOFTRST_CON(33);
bit = 1; bit = 1;
break; break;
case RK3588_SRST_P_PCIE4:
reg = RK3588_CRU_SOFTRST_CON(34);
bit = 0;
break;
case RK3588_SRST_REF_PIPE_PHY0: case RK3588_SRST_REF_PIPE_PHY0:
reg = RK3588_CRU_SOFTRST_CON(77); reg = RK3588_CRU_SOFTRST_CON(77);
bit = 6; bit = 6;

View file

@ -468,5 +468,6 @@
#define RK3588_XIN24M 1023 #define RK3588_XIN24M 1023
#define RK3588_SRST_PCIE4_POWER_UP 298 #define RK3588_SRST_PCIE4_POWER_UP 298
#define RK3588_SRST_P_PCIE4 303
#define RK3588_SRST_REF_PIPE_PHY0 572 #define RK3588_SRST_REF_PIPE_PHY0 572
#define RK3588_SRST_P_PCIE2_PHY0 579 #define RK3588_SRST_P_PCIE2_PHY0 579

View file

@ -191,7 +191,7 @@ void
rkiic_release_bus(void *cookie, int flags) rkiic_release_bus(void *cookie, int flags)
{ {
struct rkiic_softc *sc = cookie; struct rkiic_softc *sc = cookie;
HCLR4(sc, RKI2C_CON, RKI2C_CON_I2C_EN); HCLR4(sc, RKI2C_CON, RKI2C_CON_I2C_EN);
} }
@ -241,7 +241,7 @@ rkiic_write(struct rkiic_softc *sc, i2c_addr_t addr, const void *cmd,
int len = 0; int len = 0;
int timo, i; int timo, i;
/* /*
* Lump slave address, command and data into one single buffer * Lump slave address, command and data into one single buffer
* and transfer it in a single operation. * and transfer it in a single operation.
*/ */

View file

@ -153,7 +153,7 @@ void rkpcie_intr_disestablish(void *, void *);
* When link training, the LTSSM configuration state exits to L0 state upon * When link training, the LTSSM configuration state exits to L0 state upon
* success. Wait for L0 state before proceeding after link training has been * success. Wait for L0 state before proceeding after link training has been
* initiated either by PCIE_CLIENT_LINK_TRAIN_EN or when triggered via * initiated either by PCIE_CLIENT_LINK_TRAIN_EN or when triggered via
* LCSR Retrain Link bit. See PCIE 2.0 Base Specification, 4.2.6.3.6 * LCSR Retrain Link bit. See PCIE 2.0 Base Specification, 4.2.6.3.6
* Configuration.Idle. * Configuration.Idle.
* *
* Checking link up alone is not sufficient for checking for L0 state. LTSSM * Checking link up alone is not sufficient for checking for L0 state. LTSSM
@ -256,7 +256,7 @@ rkpcie_attach(struct device *parent, struct device *self, void *aux)
reset_assert(sc->sc_node, "pipe"); reset_assert(sc->sc_node, "pipe");
delay(10); delay(10);
reset_deassert(sc->sc_node, "pm"); reset_deassert(sc->sc_node, "pm");
reset_deassert(sc->sc_node, "aclk"); reset_deassert(sc->sc_node, "aclk");
reset_deassert(sc->sc_node, "pclk"); reset_deassert(sc->sc_node, "pclk");
@ -305,7 +305,7 @@ rkpcie_attach(struct device *parent, struct device *self, void *aux)
if (max_link_speed > 1) { if (max_link_speed > 1) {
status = HREAD4(sc, PCIE_RC_LCSR); status = HREAD4(sc, PCIE_RC_LCSR);
if ((status & PCI_PCIE_LCSR_CLS) == PCI_PCIE_LCSR_CLS_2_5) { if ((status & PCI_PCIE_LCSR_CLS) == PCI_PCIE_LCSR_CLS_2_5) {
HWRITE4(sc, PCIE_RC_LCSR, HREAD4(sc, PCIE_RC_LCSR) | HWRITE4(sc, PCIE_RC_LCSR, HREAD4(sc, PCIE_RC_LCSR) |
PCI_PCIE_LCSR_RL); PCI_PCIE_LCSR_RL);
if (rkpcie_link_training_wait(sc)) { if (rkpcie_link_training_wait(sc)) {
@ -534,7 +534,7 @@ rkpcie_conf_read(void *v, pcitag_t tag, int reg)
KASSERT(dev == 0); KASSERT(dev == 0);
return bus_space_read_4(sc->sc_iot, sc->sc_axi_ioh, tag | reg); return bus_space_read_4(sc->sc_iot, sc->sc_axi_ioh, tag | reg);
} }
return 0xffffffff; return 0xffffffff;
} }
@ -750,7 +750,7 @@ rkpcie_phy_poweron(struct rkpcie_softc *sc)
regmap_write_4(rm, RK3399_GRF_SOC_CON8, regmap_write_4(rm, RK3399_GRF_SOC_CON8,
RK3399_PCIE_TEST_ADDR_MASK | RK3399_PCIE_TEST_ADDR_MASK |
RK3399_PCIE_PHY_CFG_PLL_LOCK << RK3399_PCIE_TEST_ADDR_SHIFT); RK3399_PCIE_PHY_CFG_PLL_LOCK << RK3399_PCIE_TEST_ADDR_SHIFT);
for (timo = 50; timo > 0; timo--) { for (timo = 50; timo > 0; timo--) {
status = regmap_read_4(rm, RK3399_GRF_SOC_STATUS1); status = regmap_read_4(rm, RK3399_GRF_SOC_STATUS1);
if (status & RK3399_PCIE_PHY_PLL_LOCKED) if (status & RK3399_PCIE_PHY_PLL_LOCKED)

View file

@ -1,4 +1,4 @@
/* $OpenBSD: rkpinctrl.c,v 1.11 2023/03/04 22:51:12 kettenis Exp $ */ /* $OpenBSD: rkpinctrl.c,v 1.12 2023/06/19 13:37:22 kettenis Exp $ */
/* /*
* Copyright (c) 2017, 2018 Mark Kettenis <kettenis@openbsd.org> * Copyright (c) 2017, 2018 Mark Kettenis <kettenis@openbsd.org>
* *
@ -407,7 +407,7 @@ rk3308_pinctrl(uint32_t phandle, void *cookie)
mux = pins[i + 2]; mux = pins[i + 2];
pull = rk3308_pull(bank, idx, pins[i + 3]); pull = rk3308_pull(bank, idx, pins[i + 3]);
strength = rk3308_strength(bank, idx, pins[i + 3]); strength = rk3308_strength(bank, idx, pins[i + 3]);
if (bank > 4 || idx > 32 || mux > 7) if (bank > 4 || idx > 32 || mux > 7)
continue; continue;
@ -626,8 +626,8 @@ fail:
return -1; return -1;
} }
/* /*
* Rockchip RK3399 * Rockchip RK3399
*/ */
int int
@ -801,7 +801,7 @@ fail:
return -1; return -1;
} }
/* /*
* Rockchip RK3568 * Rockchip RK3568
*/ */
@ -874,7 +874,7 @@ struct rockchip_route_table rk3568_route_table[] = {
{ 4, RK_PD0, 2, ROUTE_GRF, 0x0304, ROUTE_VAL(4, 1) }, /* I2C5 M1 */ { 4, RK_PD0, 2, ROUTE_GRF, 0x0304, ROUTE_VAL(4, 1) }, /* I2C5 M1 */
{ 3, RK_PB1, 5, ROUTE_GRF, 0x0304, ROUTE_VAL(14, 0) }, /* PWM8 M0 */ { 3, RK_PB1, 5, ROUTE_GRF, 0x0304, ROUTE_VAL(14, 0) }, /* PWM8 M0 */
{ 1, RK_PD5, 4, ROUTE_GRF, 0x0304, ROUTE_VAL(14, 1) }, /* PWM8 M1 */ { 1, RK_PD5, 4, ROUTE_GRF, 0x0304, ROUTE_VAL(14, 1) }, /* PWM8 M1 */
{ 3, RK_PB2, 5, ROUTE_GRF, 0x0308, ROUTE_VAL(0, 0) }, /* PWM9 M0 */ { 3, RK_PB2, 5, ROUTE_GRF, 0x0308, ROUTE_VAL(0, 0) }, /* PWM9 M0 */
{ 1, RK_PD6, 4, ROUTE_GRF, 0x0308, ROUTE_VAL(0, 1) }, /* PWM9 M1 */ { 1, RK_PD6, 4, ROUTE_GRF, 0x0308, ROUTE_VAL(0, 1) }, /* PWM9 M1 */
{ 3, RK_PB5, 5, ROUTE_GRF, 0x0308, ROUTE_VAL(2, 0) }, /* PWM10 M0 */ { 3, RK_PB5, 5, ROUTE_GRF, 0x0308, ROUTE_VAL(2, 0) }, /* PWM10 M0 */
@ -1058,7 +1058,7 @@ fail:
} }
/* /*
* Rockchip RK3588 * Rockchip RK3588
*/ */
@ -1114,7 +1114,7 @@ rk3588_schmitt(uint32_t bank, uint32_t idx, uint32_t phandle)
#define RK3588_PMU2_IOC 0x4000 #define RK3588_PMU2_IOC 0x4000
#define RK3588_BUS_IOC 0x8000 #define RK3588_BUS_IOC 0x8000
#define RK3588_VCCIO1_4_IOC 0x9000 #define RK3588_VCCIO1_4_IOC 0x9000
#define RK3588_VCCIO3_5_IOC 0xa000 #define RK3588_VCCIO3_5_IOC 0xa000
#define RK3588_VCCIO2_IOC 0xb000 #define RK3588_VCCIO2_IOC 0xb000
#define RK3588_VCCIO6_IOC 0xc000 #define RK3588_VCCIO6_IOC 0xc000
#define RK3588_EMMC_IOC 0xd000 #define RK3588_EMMC_IOC 0xd000
@ -1174,9 +1174,9 @@ rk3588_pinctrl(uint32_t phandle, void *cookie)
bank = pins[i]; bank = pins[i];
idx = pins[i + 1]; idx = pins[i + 1];
mux = pins[i + 2]; mux = pins[i + 2];
pull = rk3568_pull(bank, idx, pins[i + 3]); pull = rk3588_pull(bank, idx, pins[i + 3]);
strength = rk3568_strength(bank, idx, pins[i + 3]); strength = rk3588_strength(bank, idx, pins[i + 3]);
schmitt = rk3568_schmitt(bank, idx, pins[i + 3]); schmitt = rk3588_schmitt(bank, idx, pins[i + 3]);
if (bank > 5 || idx > 32 || mux > 15) if (bank > 5 || idx > 32 || mux > 15)
continue; continue;
@ -1237,7 +1237,7 @@ rk3588_pinctrl(uint32_t phandle, void *cookie)
if (strength >= 0) { if (strength >= 0) {
off = bank * 0x20 + (idx / 4) * 0x04; off = bank * 0x20 + (idx / 4) * 0x04;
mask = (0xf << ((idx % 4) * 4)); mask = (0xf << ((idx % 4) * 4));
bits = ((1 << (strength + 1)) - 1) << ((idx % 4) * 4); bits = (strength << ((idx % 4) * 4));
regmap_write_4(rm, ds_base + off, mask << 16 | bits); regmap_write_4(rm, ds_base + off, mask << 16 | bits);
} }
@ -1245,7 +1245,7 @@ rk3588_pinctrl(uint32_t phandle, void *cookie)
if (schmitt >= 0) { if (schmitt >= 0) {
off = bank * 0x10 + (idx / 8) * 0x04; off = bank * 0x10 + (idx / 8) * 0x04;
mask = (0x1 << (idx % 8)); mask = (0x1 << (idx % 8));
bits = schmitt << (idx % 8); bits = (schmitt << (idx % 8));
regmap_write_4(rm, smt_base + off, mask << 16 | bits); regmap_write_4(rm, smt_base + off, mask << 16 | bits);
} }

View file

@ -58,7 +58,7 @@ struct rkpmic_regdata {
const struct rkpmic_vsel_range *vsel_range; const struct rkpmic_vsel_range *vsel_range;
}; };
/* /*
* Used by RK805 for BUCK1, BUCK2 * Used by RK805 for BUCK1, BUCK2
* 0-59: 0.7125V-1.45V, step=12.5mV * 0-59: 0.7125V-1.45V, step=12.5mV
* 60-62: 1.8V-2.2V, step=200mV * 60-62: 1.8V-2.2V, step=200mV
@ -72,7 +72,7 @@ const struct rkpmic_vsel_range rk805_vsel_range1[] = {
}; };
/* /*
* Used by RK805 for BUCK4 * Used by RK805 for BUCK4
* 0-27: 0.8V-3.5V, step=100mV * 0-27: 0.8V-3.5V, step=100mV
*/ */
const struct rkpmic_vsel_range rk805_vsel_range2[] = { const struct rkpmic_vsel_range rk805_vsel_range2[] = {
@ -81,7 +81,7 @@ const struct rkpmic_vsel_range rk805_vsel_range2[] = {
}; };
/* /*
* Used by RK805 for LDO1-3 * Used by RK805 for LDO1-3
* 0-26: 0.8V-3.4V, step=100mV * 0-26: 0.8V-3.4V, step=100mV
*/ */
const struct rkpmic_vsel_range rk805_vsel_range3[] = { const struct rkpmic_vsel_range rk805_vsel_range3[] = {
@ -393,7 +393,7 @@ rkpmic_get_voltage(void *cookie)
uint32_t ret = 0; uint32_t ret = 0;
vsel = rkpmic_reg_read(rr->rr_sc, rr->rr_reg) & rr->rr_mask; vsel = rkpmic_reg_read(rr->rr_sc, rr->rr_reg) & rr->rr_mask;
while (vsel_range->base) { while (vsel_range->base) {
ret = vsel_range->base; ret = vsel_range->base;
if (vsel >= vsel_range->vsel_min && if (vsel >= vsel_range->vsel_min &&
@ -405,7 +405,7 @@ rkpmic_get_voltage(void *cookie)
ret += (vsel_range->vsel_max - vsel_range->vsel_min) * ret += (vsel_range->vsel_max - vsel_range->vsel_min) *
vsel_range->delta; vsel_range->delta;
vsel_range++; vsel_range++;
} }
return ret; return ret;

View file

@ -453,7 +453,7 @@ rktemp_rk3568_init(struct rktemp_softc *sc)
rm = regmap_byphandle(grf); rm = regmap_byphandle(grf);
if (rm == 0) if (rm == 0)
return; return;
regmap_write_4(rm, RK3568_GRF_TSADC_CON, regmap_write_4(rm, RK3568_GRF_TSADC_CON,
RK3568_GRF_TSADC_EN << 16 | RK3568_GRF_TSADC_EN); RK3568_GRF_TSADC_EN << 16 | RK3568_GRF_TSADC_EN);
delay(15); delay(15);

View file

@ -316,7 +316,7 @@ simplefb_alloc_screen(void *v, const struct wsscreen_descr *type,
void **cookiep, int *curxp, int *curyp, uint32_t *attrp) void **cookiep, int *curxp, int *curyp, uint32_t *attrp)
{ {
return rasops_alloc_screen(v, cookiep, curxp, curyp, attrp); return rasops_alloc_screen(v, cookiep, curxp, curyp, attrp);
} }
void void
simplefb_burn_screen(void *v, u_int on, u_int flags) simplefb_burn_screen(void *v, u_int on, u_int flags)
@ -343,7 +343,7 @@ simplefb_init_cons(bus_space_tag_t iot)
node = fdt_find_cons("simple-framebuffer"); node = fdt_find_cons("simple-framebuffer");
if (node == NULL) if (node == NULL)
return; return;
if (fdt_get_reg(node, 0, &reg)) if (fdt_get_reg(node, 0, &reg))
return; return;

View file

@ -66,7 +66,7 @@ uint8_t sncodec_bop_cfg[] = {
0x32, 0x40, 0x30, 0x02, 0x06, 0x38, 0x40, 0x30, 0x02, 0x32, 0x40, 0x30, 0x02, 0x06, 0x38, 0x40, 0x30, 0x02,
0x06, 0x3e, 0x37, 0x30, 0xff, 0xe6 0x06, 0x3e, 0x37, 0x30, 0xff, 0xe6
}; };
struct sncodec_softc { struct sncodec_softc {
struct device sc_dev; struct device sc_dev;

View file

@ -627,11 +627,11 @@ sxiccmu_pll6_get_frequency(void *cookie, uint32_t *cells)
freq = clock_get_frequency_idx(sc->sc_node, 0); freq = clock_get_frequency_idx(sc->sc_node, 0);
switch (idx) { switch (idx) {
case 0: case 0:
return (freq * n * k) / m / 6; /* pll6_sata */ return (freq * n * k) / m / 6; /* pll6_sata */
case 1: case 1:
return (freq * n * k) / 2; /* pll6_other */ return (freq * n * k) / 2; /* pll6_other */
case 2: case 2:
return (freq * n * k); /* pll6 */ return (freq * n * k); /* pll6 */
case 3: case 3:
return (freq * n * k) / 4; /* pll6_div_4 */ return (freq * n * k) / 4; /* pll6_div_4 */
@ -647,7 +647,7 @@ sxiccmu_pll6_enable(void *cookie, uint32_t *cells, int on)
uint32_t idx = cells[0]; uint32_t idx = cells[0];
uint32_t reg; uint32_t reg;
/* /*
* Since this clock has several outputs, we never turn it off. * Since this clock has several outputs, we never turn it off.
*/ */
@ -1878,7 +1878,7 @@ sxiccmu_ccu_reset(void *cookie, uint32_t *cells, int assert)
reset_deassert_all(sc->sc_node); reset_deassert_all(sc->sc_node);
if (idx >= sc->sc_nresets || if (idx >= sc->sc_nresets ||
(sc->sc_resets[idx].reg == 0 && sc->sc_gates[idx].bit == 0)) { (sc->sc_resets[idx].reg == 0 && sc->sc_gates[idx].bit == 0)) {
printf("%s: 0x%08x\n", __func__, cells[0]); printf("%s: 0x%08x\n", __func__, cells[0]);
return; return;
@ -1886,7 +1886,7 @@ sxiccmu_ccu_reset(void *cookie, uint32_t *cells, int assert)
reg = sc->sc_resets[idx].reg; reg = sc->sc_resets[idx].reg;
bit = sc->sc_resets[idx].bit; bit = sc->sc_resets[idx].bit;
if (assert) if (assert)
SXICLR4(sc, reg, (1U << bit)); SXICLR4(sc, reg, (1U << bit));
else else

View file

@ -201,7 +201,7 @@ struct sximmc_idma_descriptor {
} __packed; } __packed;
#define SXIMMC_NDESC 32 #define SXIMMC_NDESC 32
#define SXIMMC_DMA_FTRGLEVEL_A20 0x20070008 #define SXIMMC_DMA_FTRGLEVEL_A20 0x20070008
#define SXIMMC_DMA_FTRGLEVEL_A80 0x200f0010 #define SXIMMC_DMA_FTRGLEVEL_A80 0x200f0010
@ -1019,7 +1019,7 @@ sximmc_exec_command(sdmmc_chipset_handle_t sch, struct sdmmc_command *cmd)
#endif #endif
goto done; goto done;
} }
if (cmd->c_datalen > 0) { if (cmd->c_datalen > 0) {
cmd->c_error = sximmc_wait_rint(sc, cmd->c_error = sximmc_wait_rint(sc,
SXIMMC_INT_ERROR| SXIMMC_INT_ERROR|

View file

@ -582,7 +582,7 @@ sxipio_attach_gpio(struct device *parent)
gba.gba_gc = &sc->sc_gpio_tag[i]; gba.gba_gc = &sc->sc_gpio_tag[i];
gba.gba_pins = &sc->sc_gpio_pins[i][0]; gba.gba_pins = &sc->sc_gpio_pins[i][0];
gba.gba_npins = 32; gba.gba_npins = 32;
#if NGPIO > 0 #if NGPIO > 0
config_found(&sc->sc_dev, &gba, gpiobus_print); config_found(&sc->sc_dev, &gba, gpiobus_print);
#endif #endif

View file

@ -44,7 +44,7 @@
#define LEAPYEAR(y) \ #define LEAPYEAR(y) \
(((y) % 4 == 0 && \ (((y) % 4 == 0 && \
(y) % 100 != 0) || \ (y) % 100 != 0) || \
(y) % 400 == 0) (y) % 400 == 0)
struct sxirtc_softc { struct sxirtc_softc {
struct device sc_dev; struct device sc_dev;

View file

@ -245,7 +245,7 @@ sxitwi_attach(struct device *parent, struct device *self, void *aux)
rw_init(&sc->sc_buslock, sc->sc_dev.dv_xname); rw_init(&sc->sc_buslock, sc->sc_dev.dv_xname);
/* /*
* On the Allwinner A31 we need to write 1 to clear a pending * On the Allwinner A31 we need to write 1 to clear a pending
* interrupt. * interrupt.
*/ */

View file

@ -172,7 +172,7 @@ sypwr_get_voltage(void *cookie)
{ {
struct sypwr_softc *sc = cookie; struct sypwr_softc *sc = cookie;
uint8_t value; uint8_t value;
value = sypwr_read(sc, SY8106A_VOUT1_SEL); value = sypwr_read(sc, SY8106A_VOUT1_SEL);
if (value & SY8106A_VOUT1_SEL_I2C) if (value & SY8106A_VOUT1_SEL_I2C)
return 680000 + (value & SY8106A_VOUT1_SEL_MASK) * 10000; return 680000 + (value & SY8106A_VOUT1_SEL_MASK) * 10000;

View file

@ -160,7 +160,7 @@ tipd_intr(void *arg)
error = tipd_read_4(sc, TPS_STATUS, &status); error = tipd_read_4(sc, TPS_STATUS, &status);
if (error) if (error)
goto fail; goto fail;
if (status & TPS_STATUS_PLUG_PRESENT) if (status & TPS_STATUS_PLUG_PRESENT)
tipd_connect(sc); tipd_connect(sc);
else else

View file

@ -133,7 +133,7 @@ xhci_fdt_attach(struct device *parent, struct device *self, void *aux)
clock_set_assigned(sc->sc_node); clock_set_assigned(sc->sc_node);
clock_enable_all(sc->sc_node); clock_enable_all(sc->sc_node);
/* /*
* Cadence and Synopsys DesignWare USB3 controllers need some * Cadence and Synopsys DesignWare USB3 controllers need some
* extra attention because of the additional OTG * extra attention because of the additional OTG
* functionality. * functionality.
@ -233,7 +233,7 @@ void
xhci_snps_do_connect(void *arg) xhci_snps_do_connect(void *arg)
{ {
struct xhci_fdt_softc *sc = arg; struct xhci_fdt_softc *sc = arg;
xhci_reinit(&sc->sc); xhci_reinit(&sc->sc);
} }

View file

@ -500,7 +500,7 @@ gpio_ioctl(struct gpio_softc *sc, u_long cmd, caddr_t data, int flag)
return (EINVAL); return (EINVAL);
} else } else
pin = set->gp_pin; pin = set->gp_pin;
if (pin < 0 || pin >= sc->sc_npins) if (pin < 0 || pin >= sc->sc_npins)
return (EINVAL); return (EINVAL);
if (sc->sc_pins[pin].pin_mapped) if (sc->sc_pins[pin].pin_mapped)

View file

@ -45,7 +45,7 @@ int gpiodcfdebug = 0;
struct gpiodcf_softc { struct gpiodcf_softc {
struct device sc_dev; /* base device */ struct device sc_dev; /* base device */
void *sc_gpio; void *sc_gpio;
struct gpio_pinmap sc_map; struct gpio_pinmap sc_map;
int __map[GPIODCF_NPINS]; int __map[GPIODCF_NPINS];
u_char sc_dying; /* disconnecting */ u_char sc_dying; /* disconnecting */
@ -96,10 +96,10 @@ void gpiodcf_mg_probe(void *);
void gpiodcf_sl_probe(void *); void gpiodcf_sl_probe(void *);
void gpiodcf_invalidate(void *); void gpiodcf_invalidate(void *);
int gpiodcf_match(struct device *, void *, void *); int gpiodcf_match(struct device *, void *, void *);
void gpiodcf_attach(struct device *, struct device *, void *); void gpiodcf_attach(struct device *, struct device *, void *);
int gpiodcf_detach(struct device *, int); int gpiodcf_detach(struct device *, int);
int gpiodcf_activate(struct device *, int); int gpiodcf_activate(struct device *, int);
int gpiodcf_signal(struct gpiodcf_softc *); int gpiodcf_signal(struct gpiodcf_softc *);
@ -316,7 +316,7 @@ gpiodcf_bv_probe(void *xsc)
if (data == -1) { if (data == -1) {
DPRINTF(("bit detection failed\n")); DPRINTF(("bit detection failed\n"));
return; return;
} }
DPRINTFN(1, (data ? "0" : "1")); DPRINTFN(1, (data ? "0" : "1"));
if (!(data)) if (!(data))
@ -364,7 +364,7 @@ gpiodcf_mg_probe(void *xsc)
p2_bit = sc->sc_tbits >> 35 & 1; p2_bit = sc->sc_tbits >> 35 & 1;
p3_bit = sc->sc_tbits >> 58 & 1; p3_bit = sc->sc_tbits >> 58 & 1;
minute_bits = sc->sc_tbits >> 21 & 0x7f; minute_bits = sc->sc_tbits >> 21 & 0x7f;
hour_bits = sc->sc_tbits >> 29 & 0x3f; hour_bits = sc->sc_tbits >> 29 & 0x3f;
day_bits = sc->sc_tbits >> 36 & 0x3f; day_bits = sc->sc_tbits >> 36 & 0x3f;
wday = (sc->sc_tbits >> 42) & 0x07; wday = (sc->sc_tbits >> 42) & 0x07;

View file

@ -126,7 +126,7 @@ gpioiic_attach(struct device *parent, struct device *self, void *aux)
printf(": can't map pins\n"); printf(": can't map pins\n");
return; return;
} }
if (ga->ga_flags & GPIOIIC_PIN_REVERSE) { if (ga->ga_flags & GPIOIIC_PIN_REVERSE) {
sc->sc_pin_sda = GPIOIIC_PIN_SCL; sc->sc_pin_sda = GPIOIIC_PIN_SCL;
sc->sc_pin_scl = GPIOIIC_PIN_SDA; sc->sc_pin_scl = GPIOIIC_PIN_SDA;

View file

@ -467,9 +467,9 @@ hid_get_item(struct hid_data *s, struct hid_item *h)
if ((s->nusage < MAXUSAGE) && if ((s->nusage < MAXUSAGE) &&
(c->usage_minimum <= c->usage_maximum)) { (c->usage_minimum <= c->usage_maximum)) {
/* add usage range */ /* add usage range */
s->usages_min[s->nusage] = s->usages_min[s->nusage] =
c->usage_minimum; c->usage_minimum;
s->usages_max[s->nusage] = s->usages_max[s->nusage] =
c->usage_maximum; c->usage_maximum;
s->nusage ++; s->nusage ++;
} else { } else {

View file

@ -189,7 +189,7 @@ hidms_setup(struct device *self, struct hidms *ms, uint32_t quirks,
break; break;
ms->sc_num_buttons = i - 1; ms->sc_num_buttons = i - 1;
/* /*
* The Kensington Slimblade reports some of its buttons as binary * The Kensington Slimblade reports some of its buttons as binary
* inputs in the first vendor usage page (0xff00). Add such inputs * inputs in the first vendor usage page (0xff00). Add such inputs
* as buttons if the device has this quirk. * as buttons if the device has this quirk.

View file

@ -353,7 +353,7 @@ hil_process_int(struct hil_softc *sc, u_int8_t stat, u_int8_t c)
if (sc->sc_cmdending) { if (sc->sc_cmdending) {
sc->sc_cmddone = 1; sc->sc_cmddone = 1;
sc->sc_cmdending = 0; sc->sc_cmdending = 0;
} else } else
*sc->sc_cmdbp++ = c; *sc->sc_cmdbp++ = c;
} }
} }
@ -516,7 +516,7 @@ hilconfig(struct hil_softc *sc, u_int knowndevs)
for (id = knowndevs + 1; id <= sc->sc_maxdev; id++) { for (id = knowndevs + 1; id <= sc->sc_maxdev; id++) {
int len; int len;
const struct hildevice *hd; const struct hildevice *hd;
if (send_device_cmd(sc, id, HIL_IDENTIFY) != 0) { if (send_device_cmd(sc, id, HIL_IDENTIFY) != 0) {
printf("%s: no answer from device %d\n", printf("%s: no answer from device %d\n",
sc->sc_dev.dv_xname, id); sc->sc_dev.dv_xname, id);
@ -650,7 +650,7 @@ send_hil_cmd(struct hil_softc *sc, u_int cmd, u_int8_t *data, u_int dlen,
{ {
u_int8_t status; u_int8_t status;
int s; int s;
s = splhil(); s = splhil();
if (hilwait(sc) == 0) { if (hilwait(sc) == 0) {
@ -760,7 +760,7 @@ send_hildev_cmd(struct hildev_softc *dev, u_int cmd,
{ {
struct hil_softc *sc = (struct hil_softc *)dev->sc_dev.dv_parent; struct hil_softc *sc = (struct hil_softc *)dev->sc_dev.dv_parent;
int s, rc; int s, rc;
s = splhil(); s = splhil();
if ((rc = send_device_cmd(sc, dev->sc_code, cmd)) == 0) { if ((rc = send_device_cmd(sc, dev->sc_code, cmd)) == 0) {
@ -811,7 +811,7 @@ polloff(struct hil_softc *sc)
/* /*
* Must wait until polling is really stopped * Must wait until polling is really stopped
*/ */
do { do {
hilwait(sc); hilwait(sc);
bus_space_write_1(sc->sc_bst, sc->sc_bsh, HILP_CMD, HIL_READBUSY); bus_space_write_1(sc->sc_bst, sc->sc_bsh, HILP_CMD, HIL_READBUSY);
hildatawait(sc); hildatawait(sc);

View file

@ -327,7 +327,7 @@ hilms_callback(struct hildev_softc *dev, u_int buflen, u_int8_t *buf)
} }
/* buf++; */ /* buf++; */
} }
if (sc->sc_wsmousedev == NULL) if (sc->sc_wsmousedev == NULL)
return; return;

View file

@ -129,7 +129,7 @@
/* HIL packet headers */ /* HIL packet headers */
#define HIL_MOUSEDATA 0x02 #define HIL_MOUSEDATA 0x02
#define HIL_KBDDATA 0x70 #define HIL_KBDDATA 0x70
#define HIL_MOUSEMOTION 0x02 /* mouse movement event */ #define HIL_MOUSEMOTION 0x02 /* mouse movement event */
#define HIL_TABLET 0x02 /* tablet motion event */ #define HIL_TABLET 0x02 /* tablet motion event */
#define HIL_KNOBBOX 0x03 /* knob box motion data */ #define HIL_KNOBBOX 0x03 /* knob box motion data */

View file

@ -208,7 +208,7 @@ adt_attach(struct device *parent, struct device *self, void *aux)
sc->sc_sensor[ADT_2_5V].type = SENSOR_VOLTS_DC; sc->sc_sensor[ADT_2_5V].type = SENSOR_VOLTS_DC;
strlcpy(sc->sc_sensor[ADT_2_5V].desc, "+2.5Vin", strlcpy(sc->sc_sensor[ADT_2_5V].desc, "+2.5Vin",
sizeof(sc->sc_sensor[ADT_2_5V].desc)); sizeof(sc->sc_sensor[ADT_2_5V].desc));
if (sc->chip->type == 5017) if (sc->chip->type == 5017)
strlcpy(sc->sc_sensor[ADT_2_5V].desc, "+5VTR", strlcpy(sc->sc_sensor[ADT_2_5V].desc, "+5VTR",
sizeof(sc->sc_sensor[ADT_2_5V].desc)); sizeof(sc->sc_sensor[ADT_2_5V].desc));

View file

@ -268,4 +268,4 @@ fintek_fullspeed(struct fintek_softc *sc)
data = 0xff; /* Maximum voltage */ data = 0xff; /* Maximum voltage */
fintek_write_reg(sc, FINTEK_PWM_DUTY1, &data, sizeof data); fintek_write_reg(sc, FINTEK_PWM_DUTY1, &data, sizeof data);
fintek_write_reg(sc, FINTEK_PWM_DUTY2, &data, sizeof data); fintek_write_reg(sc, FINTEK_PWM_DUTY2, &data, sizeof data);
} }

View file

@ -107,7 +107,7 @@ glenv_attach(struct device *parent, struct device *self, void *aux)
printf(": cannot read revision register\n"); printf(": cannot read revision register\n");
return; return;
} }
printf(": GL518SM rev 0x%02x", data); printf(": GL518SM rev 0x%02x", data);
cmd = GL518SM_MISC; cmd = GL518SM_MISC;
@ -184,7 +184,7 @@ glenv_refresh(void *arg)
sc->sc_sensor[GLENV_VIN3].flags &= ~SENSOR_FINVALID; sc->sc_sensor[GLENV_VIN3].flags &= ~SENSOR_FINVALID;
sc->sc_sensor[GLENV_VIN3].value = data * 19000; sc->sc_sensor[GLENV_VIN3].value = data * 19000;
} }
cmd = GL518SM_TEMP; cmd = GL518SM_TEMP;
if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0)) { sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0)) {

View file

@ -179,6 +179,6 @@ fail:
void void
pcaled_gpio_pin_ctl (void *arg, int pin, int flags) pcaled_gpio_pin_ctl (void *arg, int pin, int flags)
{ {
/* XXX all pins are inout */ /* XXX all pins are inout */
} }

View file

@ -78,7 +78,7 @@ spdmem_iic_match(struct device *parent, void *match, void *aux)
struct i2c_attach_args *ia = aux; struct i2c_attach_args *ia = aux;
struct spdmem_iic_softc sc; struct spdmem_iic_softc sc;
/* clever attachments like openfirmware informed macppc */ /* clever attachments like openfirmware informed macppc */
if (strcmp(ia->ia_name, "spd") == 0) if (strcmp(ia->ia_name, "spd") == 0)
return (1); return (1);

View file

@ -139,7 +139,7 @@ thmc_refresh(void *arg)
} else } else
sc->sc_sensor[THMC_TEMP1].flags |= SENSOR_FINVALID; sc->sc_sensor[THMC_TEMP1].flags |= SENSOR_FINVALID;
if (sc->sc_sensor[THMC_TEMP2].type > 0) { if (sc->sc_sensor[THMC_TEMP2].type > 0) {
cmd = THMC50_TEMP2; cmd = THMC50_TEMP2;
if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc->sc_addr, &cmd, sizeof cmd, &sdata, sizeof sdata, 0) == 0) { sc->sc_addr, &cmd, sizeof cmd, &sdata, sizeof sdata, 0) == 0) {

View file

@ -192,7 +192,7 @@ midi_ointr(void *addr)
MUTEX_ASSERT_LOCKED(&audio_lock); MUTEX_ASSERT_LOCKED(&audio_lock);
if (!(sc->dev.dv_flags & DVF_ACTIVE) || !(sc->flags & FWRITE)) if (!(sc->dev.dv_flags & DVF_ACTIVE) || !(sc->flags & FWRITE))
return; return;
mb = &sc->outbuf; mb = &sc->outbuf;
if (mb->used > 0) { if (mb->used > 0) {
#ifdef MIDI_DEBUG #ifdef MIDI_DEBUG

View file

@ -37,7 +37,7 @@ struct midi_buffer {
void *softintr; /* context to call selwakeup() */ void *softintr; /* context to call selwakeup() */
struct selinfo sel; /* to record & wakeup poll(2) */ struct selinfo sel; /* to record & wakeup poll(2) */
int blocking; /* read/write blocking */ int blocking; /* read/write blocking */
unsigned char data[MIDIBUF_SIZE]; unsigned char data[MIDIBUF_SIZE];
unsigned start, used; unsigned start, used;
}; };
@ -68,7 +68,7 @@ struct midi_buffer {
do { \ do { \
(buf)->start = (buf)->used = 0; \ (buf)->start = (buf)->used = 0; \
} while(0) } while(0)
struct midi_softc { struct midi_softc {
struct device dev; struct device dev;

View file

@ -2544,8 +2544,6 @@ static int amdgpu_device_ip_init(struct amdgpu_device *adev)
amdgpu_fru_get_product_info(adev); amdgpu_fru_get_product_info(adev);
init_failed: init_failed:
if (amdgpu_sriov_vf(adev))
amdgpu_virt_release_full_gpu(adev, true);
return r; return r;
} }
@ -3593,6 +3591,7 @@ int amdgpu_device_init(struct amdgpu_device *adev,
int r, i; int r, i;
bool px = false; bool px = false;
u32 max_MBps; u32 max_MBps;
int tmp;
adev->shutdown = false; adev->shutdown = false;
adev->flags = flags; adev->flags = flags;
@ -3774,6 +3773,12 @@ int amdgpu_device_init(struct amdgpu_device *adev,
adev->have_atomics_support = ((struct amd_sriov_msg_pf2vf_info *) adev->have_atomics_support = ((struct amd_sriov_msg_pf2vf_info *)
adev->virt.fw_reserve.p_pf2vf)->pcie_atomic_ops_support_flags == adev->virt.fw_reserve.p_pf2vf)->pcie_atomic_ops_support_flags ==
(PCI_EXP_DEVCAP2_ATOMIC_COMP32 | PCI_EXP_DEVCAP2_ATOMIC_COMP64); (PCI_EXP_DEVCAP2_ATOMIC_COMP32 | PCI_EXP_DEVCAP2_ATOMIC_COMP64);
/* APUs w/ gfx9 onwards doesn't reply on PCIe atomics, rather it is a
* internal path natively support atomics, set have_atomics_support to true.
*/
else if ((adev->flags & AMD_IS_APU) &&
(adev->ip_versions[GC_HWIP][0] > IP_VERSION(9, 0, 0)))
adev->have_atomics_support = true;
else else
adev->have_atomics_support = adev->have_atomics_support =
!pci_enable_atomic_ops_to_root(adev->pdev, !pci_enable_atomic_ops_to_root(adev->pdev,
@ -3782,7 +3787,14 @@ int amdgpu_device_init(struct amdgpu_device *adev,
if (!adev->have_atomics_support) if (!adev->have_atomics_support)
dev_info(adev->dev, "PCIE atomic ops is not supported\n"); dev_info(adev->dev, "PCIE atomic ops is not supported\n");
#else #else
adev->have_atomics_support = false; /* APUs w/ gfx9 onwards doesn't reply on PCIe atomics, rather it is a
* internal path natively support atomics, set have_atomics_support to true.
*/
if ((adev->flags & AMD_IS_APU) &&
(adev->ip_versions[GC_HWIP][0] > IP_VERSION(9, 0, 0)))
adev->have_atomics_support = true;
else
adev->have_atomics_support = false;
#endif #endif
/* doorbell bar mapping and doorbell index init*/ /* doorbell bar mapping and doorbell index init*/
@ -3820,7 +3832,13 @@ int amdgpu_device_init(struct amdgpu_device *adev,
} }
} }
} else { } else {
tmp = amdgpu_reset_method;
/* It should do a default reset when loading or reloading the driver,
* regardless of the module parameter reset_method.
*/
amdgpu_reset_method = AMD_RESET_METHOD_NONE;
r = amdgpu_asic_reset(adev); r = amdgpu_asic_reset(adev);
amdgpu_reset_method = tmp;
if (r) { if (r) {
dev_err(adev->dev, "asic reset on init failed\n"); dev_err(adev->dev, "asic reset on init failed\n");
goto failed; goto failed;
@ -3880,18 +3898,6 @@ fence_driver_init:
r = amdgpu_device_ip_init(adev); r = amdgpu_device_ip_init(adev);
if (r) { if (r) {
/* failed in exclusive mode due to timeout */
if (amdgpu_sriov_vf(adev) &&
!amdgpu_sriov_runtime(adev) &&
amdgpu_virt_mmio_blocked(adev) &&
!amdgpu_virt_wait_reset(adev)) {
dev_err(adev->dev, "VF exclusive mode timeout\n");
/* Don't send request since VF is inactive. */
adev->virt.caps &= ~AMDGPU_SRIOV_CAPS_RUNTIME;
adev->virt.ops = NULL;
r = -EAGAIN;
goto release_ras_con;
}
dev_err(adev->dev, "amdgpu_device_ip_init failed\n"); dev_err(adev->dev, "amdgpu_device_ip_init failed\n");
amdgpu_vf_error_put(adev, AMDGIM_ERROR_VF_AMDGPU_INIT_FAIL, 0, 0); amdgpu_vf_error_put(adev, AMDGIM_ERROR_VF_AMDGPU_INIT_FAIL, 0, 0);
goto release_ras_con; goto release_ras_con;
@ -4000,8 +4006,10 @@ fence_driver_init:
msecs_to_jiffies(AMDGPU_RESUME_MS)); msecs_to_jiffies(AMDGPU_RESUME_MS));
} }
if (amdgpu_sriov_vf(adev)) if (amdgpu_sriov_vf(adev)) {
amdgpu_virt_release_full_gpu(adev, true);
flush_delayed_work(&adev->delayed_init_work); flush_delayed_work(&adev->delayed_init_work);
}
r = sysfs_create_files(&adev->dev->kobj, amdgpu_dev_attributes); r = sysfs_create_files(&adev->dev->kobj, amdgpu_dev_attributes);
if (r) if (r)
@ -4043,6 +4051,20 @@ fence_driver_init:
return 0; return 0;
release_ras_con: release_ras_con:
if (amdgpu_sriov_vf(adev))
amdgpu_virt_release_full_gpu(adev, true);
/* failed in exclusive mode due to timeout */
if (amdgpu_sriov_vf(adev) &&
!amdgpu_sriov_runtime(adev) &&
amdgpu_virt_mmio_blocked(adev) &&
!amdgpu_virt_wait_reset(adev)) {
dev_err(adev->dev, "VF exclusive mode timeout\n");
/* Don't send request since VF is inactive. */
adev->virt.caps &= ~AMDGPU_SRIOV_CAPS_RUNTIME;
adev->virt.ops = NULL;
r = -EAGAIN;
}
amdgpu_release_ras_context(adev); amdgpu_release_ras_context(adev);
failed: failed:

View file

@ -545,7 +545,8 @@ void amdgpu_fence_driver_hw_fini(struct amdgpu_device *adev)
if (r) if (r)
amdgpu_fence_driver_force_completion(ring); amdgpu_fence_driver_force_completion(ring);
if (ring->fence_drv.irq_src) if (!drm_dev_is_unplugged(adev_to_drm(adev)) &&
ring->fence_drv.irq_src)
amdgpu_irq_put(adev, ring->fence_drv.irq_src, amdgpu_irq_put(adev, ring->fence_drv.irq_src,
ring->fence_drv.irq_type); ring->fence_drv.irq_type);

View file

@ -526,6 +526,8 @@ void amdgpu_gmc_tmz_set(struct amdgpu_device *adev)
case IP_VERSION(9, 3, 0): case IP_VERSION(9, 3, 0):
/* GC 10.3.7 */ /* GC 10.3.7 */
case IP_VERSION(10, 3, 7): case IP_VERSION(10, 3, 7):
/* GC 11.0.1 */
case IP_VERSION(11, 0, 1):
if (amdgpu_tmz == 0) { if (amdgpu_tmz == 0) {
adev->gmc.tmz_enabled = false; adev->gmc.tmz_enabled = false;
dev_info(adev->dev, dev_info(adev->dev,
@ -548,7 +550,6 @@ void amdgpu_gmc_tmz_set(struct amdgpu_device *adev)
case IP_VERSION(10, 3, 1): case IP_VERSION(10, 3, 1):
/* YELLOW_CARP*/ /* YELLOW_CARP*/
case IP_VERSION(10, 3, 3): case IP_VERSION(10, 3, 3):
case IP_VERSION(11, 0, 1):
case IP_VERSION(11, 0, 4): case IP_VERSION(11, 0, 4):
/* Don't enable it by default yet. /* Don't enable it by default yet.
*/ */

View file

@ -2765,7 +2765,7 @@ static int dm_resume(void *handle)
* this is the case when traversing through already created * this is the case when traversing through already created
* MST connectors, should be skipped * MST connectors, should be skipped
*/ */
if (aconnector->dc_link->type == dc_connection_mst_branch) if (aconnector && aconnector->mst_port)
continue; continue;
mutex_lock(&aconnector->hpd_lock); mutex_lock(&aconnector->hpd_lock);
@ -6494,7 +6494,7 @@ static int dm_encoder_helper_atomic_check(struct drm_encoder *encoder,
int clock, bpp = 0; int clock, bpp = 0;
bool is_y420 = false; bool is_y420 = false;
if (!aconnector->port || !aconnector->dc_sink) if (!aconnector->port)
return 0; return 0;
mst_port = aconnector->port; mst_port = aconnector->port;

View file

@ -6925,23 +6925,6 @@ static int si_dpm_enable(struct amdgpu_device *adev)
return 0; return 0;
} }
static int si_set_temperature_range(struct amdgpu_device *adev)
{
int ret;
ret = si_thermal_enable_alert(adev, false);
if (ret)
return ret;
ret = si_thermal_set_temperature_range(adev, R600_TEMP_RANGE_MIN, R600_TEMP_RANGE_MAX);
if (ret)
return ret;
ret = si_thermal_enable_alert(adev, true);
if (ret)
return ret;
return ret;
}
static void si_dpm_disable(struct amdgpu_device *adev) static void si_dpm_disable(struct amdgpu_device *adev)
{ {
struct rv7xx_power_info *pi = rv770_get_pi(adev); struct rv7xx_power_info *pi = rv770_get_pi(adev);
@ -7626,18 +7609,6 @@ static int si_dpm_process_interrupt(struct amdgpu_device *adev,
static int si_dpm_late_init(void *handle) static int si_dpm_late_init(void *handle)
{ {
int ret;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
if (!adev->pm.dpm_enabled)
return 0;
ret = si_set_temperature_range(adev);
if (ret)
return ret;
#if 0 //TODO ?
si_dpm_powergate_uvd(adev, true);
#endif
return 0; return 0;
} }

View file

@ -588,7 +588,7 @@ static int vangogh_print_legacy_clk_levels(struct smu_context *smu,
DpmClocks_t *clk_table = smu->smu_table.clocks_table; DpmClocks_t *clk_table = smu->smu_table.clocks_table;
SmuMetrics_legacy_t metrics; SmuMetrics_legacy_t metrics;
struct smu_dpm_context *smu_dpm_ctx = &(smu->smu_dpm); struct smu_dpm_context *smu_dpm_ctx = &(smu->smu_dpm);
int i, size = 0, ret = 0; int i, idx, size = 0, ret = 0;
uint32_t cur_value = 0, value = 0, count = 0; uint32_t cur_value = 0, value = 0, count = 0;
bool cur_value_match_level = false; bool cur_value_match_level = false;
@ -662,7 +662,8 @@ static int vangogh_print_legacy_clk_levels(struct smu_context *smu,
case SMU_MCLK: case SMU_MCLK:
case SMU_FCLK: case SMU_FCLK:
for (i = 0; i < count; i++) { for (i = 0; i < count; i++) {
ret = vangogh_get_dpm_clk_limited(smu, clk_type, i, &value); idx = (clk_type == SMU_FCLK || clk_type == SMU_MCLK) ? (count - i - 1) : i;
ret = vangogh_get_dpm_clk_limited(smu, clk_type, idx, &value);
if (ret) if (ret)
return ret; return ret;
if (!value) if (!value)
@ -689,7 +690,7 @@ static int vangogh_print_clk_levels(struct smu_context *smu,
DpmClocks_t *clk_table = smu->smu_table.clocks_table; DpmClocks_t *clk_table = smu->smu_table.clocks_table;
SmuMetrics_t metrics; SmuMetrics_t metrics;
struct smu_dpm_context *smu_dpm_ctx = &(smu->smu_dpm); struct smu_dpm_context *smu_dpm_ctx = &(smu->smu_dpm);
int i, size = 0, ret = 0; int i, idx, size = 0, ret = 0;
uint32_t cur_value = 0, value = 0, count = 0; uint32_t cur_value = 0, value = 0, count = 0;
bool cur_value_match_level = false; bool cur_value_match_level = false;
uint32_t min, max; uint32_t min, max;
@ -771,7 +772,8 @@ static int vangogh_print_clk_levels(struct smu_context *smu,
case SMU_MCLK: case SMU_MCLK:
case SMU_FCLK: case SMU_FCLK:
for (i = 0; i < count; i++) { for (i = 0; i < count; i++) {
ret = vangogh_get_dpm_clk_limited(smu, clk_type, i, &value); idx = (clk_type == SMU_FCLK || clk_type == SMU_MCLK) ? (count - i - 1) : i;
ret = vangogh_get_dpm_clk_limited(smu, clk_type, idx, &value);
if (ret) if (ret)
return ret; return ret;
if (!value) if (!value)

View file

@ -494,7 +494,7 @@ static int renoir_set_fine_grain_gfx_freq_parameters(struct smu_context *smu)
static int renoir_print_clk_levels(struct smu_context *smu, static int renoir_print_clk_levels(struct smu_context *smu,
enum smu_clk_type clk_type, char *buf) enum smu_clk_type clk_type, char *buf)
{ {
int i, size = 0, ret = 0; int i, idx, size = 0, ret = 0;
uint32_t cur_value = 0, value = 0, count = 0, min = 0, max = 0; uint32_t cur_value = 0, value = 0, count = 0, min = 0, max = 0;
SmuMetrics_t metrics; SmuMetrics_t metrics;
struct smu_dpm_context *smu_dpm_ctx = &(smu->smu_dpm); struct smu_dpm_context *smu_dpm_ctx = &(smu->smu_dpm);
@ -594,7 +594,8 @@ static int renoir_print_clk_levels(struct smu_context *smu,
case SMU_VCLK: case SMU_VCLK:
case SMU_DCLK: case SMU_DCLK:
for (i = 0; i < count; i++) { for (i = 0; i < count; i++) {
ret = renoir_get_dpm_clk_limited(smu, clk_type, i, &value); idx = (clk_type == SMU_FCLK || clk_type == SMU_MCLK) ? (count - i - 1) : i;
ret = renoir_get_dpm_clk_limited(smu, clk_type, idx, &value);
if (ret) if (ret)
return ret; return ret;
if (!value) if (!value)

View file

@ -478,7 +478,7 @@ static int smu_v13_0_4_get_dpm_level_count(struct smu_context *smu,
static int smu_v13_0_4_print_clk_levels(struct smu_context *smu, static int smu_v13_0_4_print_clk_levels(struct smu_context *smu,
enum smu_clk_type clk_type, char *buf) enum smu_clk_type clk_type, char *buf)
{ {
int i, size = 0, ret = 0; int i, idx, size = 0, ret = 0;
uint32_t cur_value = 0, value = 0, count = 0; uint32_t cur_value = 0, value = 0, count = 0;
uint32_t min, max; uint32_t min, max;
@ -512,7 +512,8 @@ static int smu_v13_0_4_print_clk_levels(struct smu_context *smu,
break; break;
for (i = 0; i < count; i++) { for (i = 0; i < count; i++) {
ret = smu_v13_0_4_get_dpm_freq_by_index(smu, clk_type, i, &value); idx = (clk_type == SMU_FCLK || clk_type == SMU_MCLK) ? (count - i - 1) : i;
ret = smu_v13_0_4_get_dpm_freq_by_index(smu, clk_type, idx, &value);
if (ret) if (ret)
break; break;

View file

@ -866,7 +866,7 @@ out:
static int smu_v13_0_5_print_clk_levels(struct smu_context *smu, static int smu_v13_0_5_print_clk_levels(struct smu_context *smu,
enum smu_clk_type clk_type, char *buf) enum smu_clk_type clk_type, char *buf)
{ {
int i, size = 0, ret = 0; int i, idx, size = 0, ret = 0;
uint32_t cur_value = 0, value = 0, count = 0; uint32_t cur_value = 0, value = 0, count = 0;
uint32_t min = 0, max = 0; uint32_t min = 0, max = 0;
@ -898,7 +898,8 @@ static int smu_v13_0_5_print_clk_levels(struct smu_context *smu,
goto print_clk_out; goto print_clk_out;
for (i = 0; i < count; i++) { for (i = 0; i < count; i++) {
ret = smu_v13_0_5_get_dpm_freq_by_index(smu, clk_type, i, &value); idx = (clk_type == SMU_MCLK) ? (count - i - 1) : i;
ret = smu_v13_0_5_get_dpm_freq_by_index(smu, clk_type, idx, &value);
if (ret) if (ret)
goto print_clk_out; goto print_clk_out;

View file

@ -1000,7 +1000,7 @@ out:
static int yellow_carp_print_clk_levels(struct smu_context *smu, static int yellow_carp_print_clk_levels(struct smu_context *smu,
enum smu_clk_type clk_type, char *buf) enum smu_clk_type clk_type, char *buf)
{ {
int i, size = 0, ret = 0; int i, idx, size = 0, ret = 0;
uint32_t cur_value = 0, value = 0, count = 0; uint32_t cur_value = 0, value = 0, count = 0;
uint32_t min, max; uint32_t min, max;
@ -1033,7 +1033,8 @@ static int yellow_carp_print_clk_levels(struct smu_context *smu,
goto print_clk_out; goto print_clk_out;
for (i = 0; i < count; i++) { for (i = 0; i < count; i++) {
ret = yellow_carp_get_dpm_freq_by_index(smu, clk_type, i, &value); idx = (clk_type == SMU_FCLK || clk_type == SMU_MCLK) ? (count - i - 1) : i;
ret = yellow_carp_get_dpm_freq_by_index(smu, clk_type, idx, &value);
if (ret) if (ret)
goto print_clk_out; goto print_clk_out;

View file

@ -37,7 +37,7 @@
struct radio_hw_if { struct radio_hw_if {
/* open hardware */ /* open hardware */
int (*open)(void *, int, int, struct proc *); int (*open)(void *, int, int, struct proc *);
/* close hardware */ /* close hardware */
int (*close)(void *, int, int, struct proc *); int (*close)(void *, int, int, struct proc *);

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