sync code with last improvements from OpenBSD
This commit is contained in:
commit
88965415ff
GPG key ID:
F42C07F07E2E35B7
26235 changed files with 29195616 additions and 0 deletions
45
lib/libdrm/nouveau/nvif/cl0080.h
Normal file
45
lib/libdrm/nouveau/nvif/cl0080.h
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#ifndef __NVIF_CL0080_H__
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#define __NVIF_CL0080_H__
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struct nv_device_v0 {
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__u8 version;
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||||
__u8 pad01[7];
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||||
__u64 device; /* device identifier, ~0 for client default */
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};
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#define NV_DEVICE_V0_INFO 0x00
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#define NV_DEVICE_V0_TIME 0x01
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struct nv_device_info_v0 {
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__u8 version;
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#define NV_DEVICE_INFO_V0_IGP 0x00
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#define NV_DEVICE_INFO_V0_PCI 0x01
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#define NV_DEVICE_INFO_V0_AGP 0x02
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#define NV_DEVICE_INFO_V0_PCIE 0x03
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#define NV_DEVICE_INFO_V0_SOC 0x04
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__u8 platform;
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__u16 chipset; /* from NV_PMC_BOOT_0 */
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__u8 revision; /* from NV_PMC_BOOT_0 */
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#define NV_DEVICE_INFO_V0_TNT 0x01
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#define NV_DEVICE_INFO_V0_CELSIUS 0x02
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#define NV_DEVICE_INFO_V0_KELVIN 0x03
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#define NV_DEVICE_INFO_V0_RANKINE 0x04
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#define NV_DEVICE_INFO_V0_CURIE 0x05
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#define NV_DEVICE_INFO_V0_TESLA 0x06
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#define NV_DEVICE_INFO_V0_FERMI 0x07
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#define NV_DEVICE_INFO_V0_KEPLER 0x08
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#define NV_DEVICE_INFO_V0_MAXWELL 0x09
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__u8 family;
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__u8 pad06[2];
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__u64 ram_size;
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__u64 ram_user;
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char chip[16];
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char name[64];
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};
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struct nv_device_time_v0 {
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__u8 version;
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__u8 pad01[7];
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__u64 time;
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};
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#endif
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44
lib/libdrm/nouveau/nvif/cl9097.h
Normal file
44
lib/libdrm/nouveau/nvif/cl9097.h
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#ifndef __NVIF_CL9097_H__
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#define __NVIF_CL9097_H__
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#define FERMI_A_ZBC_COLOR 0x00
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#define FERMI_A_ZBC_DEPTH 0x01
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struct fermi_a_zbc_color_v0 {
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__u8 version;
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#define FERMI_A_ZBC_COLOR_V0_FMT_ZERO 0x01
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#define FERMI_A_ZBC_COLOR_V0_FMT_UNORM_ONE 0x02
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#define FERMI_A_ZBC_COLOR_V0_FMT_RF32_GF32_BF32_AF32 0x04
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#define FERMI_A_ZBC_COLOR_V0_FMT_R16_G16_B16_A16 0x08
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#define FERMI_A_ZBC_COLOR_V0_FMT_RN16_GN16_BN16_AN16 0x0c
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#define FERMI_A_ZBC_COLOR_V0_FMT_RS16_GS16_BS16_AS16 0x10
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#define FERMI_A_ZBC_COLOR_V0_FMT_RU16_GU16_BU16_AU16 0x14
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#define FERMI_A_ZBC_COLOR_V0_FMT_RF16_GF16_BF16_AF16 0x16
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#define FERMI_A_ZBC_COLOR_V0_FMT_A8R8G8B8 0x18
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#define FERMI_A_ZBC_COLOR_V0_FMT_A8RL8GL8BL8 0x1c
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#define FERMI_A_ZBC_COLOR_V0_FMT_A2B10G10R10 0x20
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#define FERMI_A_ZBC_COLOR_V0_FMT_AU2BU10GU10RU10 0x24
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#define FERMI_A_ZBC_COLOR_V0_FMT_A8B8G8R8 0x28
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#define FERMI_A_ZBC_COLOR_V0_FMT_A8BL8GL8RL8 0x2c
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#define FERMI_A_ZBC_COLOR_V0_FMT_AN8BN8GN8RN8 0x30
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#define FERMI_A_ZBC_COLOR_V0_FMT_AS8BS8GS8RS8 0x34
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#define FERMI_A_ZBC_COLOR_V0_FMT_AU8BU8GU8RU8 0x38
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#define FERMI_A_ZBC_COLOR_V0_FMT_A2R10G10B10 0x3c
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#define FERMI_A_ZBC_COLOR_V0_FMT_BF10GF11RF11 0x40
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__u8 format;
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__u8 index;
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__u8 pad03[5];
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__u32 ds[4];
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__u32 l2[4];
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};
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struct fermi_a_zbc_depth_v0 {
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__u8 version;
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#define FERMI_A_ZBC_DEPTH_V0_FMT_FP32 0x01
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__u8 format;
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__u8 index;
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__u8 pad03[5];
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__u32 ds;
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__u32 l2;
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};
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#endif
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141
lib/libdrm/nouveau/nvif/class.h
Normal file
141
lib/libdrm/nouveau/nvif/class.h
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#ifndef __NVIF_CLASS_H__
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#define __NVIF_CLASS_H__
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/* these class numbers are made up by us, and not nvidia-assigned */
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#define NVIF_CLASS_CONTROL /* if0001.h */ -1
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#define NVIF_CLASS_PERFMON /* if0002.h */ -2
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#define NVIF_CLASS_PERFDOM /* if0003.h */ -3
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#define NVIF_CLASS_SW_NV04 /* if0004.h */ -4
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#define NVIF_CLASS_SW_NV10 /* if0005.h */ -5
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#define NVIF_CLASS_SW_NV50 /* if0005.h */ -6
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#define NVIF_CLASS_SW_GF100 /* if0005.h */ -7
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/* the below match nvidia-assigned (either in hw, or sw) class numbers */
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#define NV_DEVICE /* cl0080.h */ 0x00000080
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#define NV_DMA_FROM_MEMORY /* cl0002.h */ 0x00000002
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#define NV_DMA_TO_MEMORY /* cl0002.h */ 0x00000003
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#define NV_DMA_IN_MEMORY /* cl0002.h */ 0x0000003d
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#define FERMI_TWOD_A 0x0000902d
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#define FERMI_MEMORY_TO_MEMORY_FORMAT_A 0x00009039
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#define KEPLER_INLINE_TO_MEMORY_A 0x0000a040
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#define KEPLER_INLINE_TO_MEMORY_B 0x0000a140
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#define NV04_DISP /* cl0046.h */ 0x00000046
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#define NV03_CHANNEL_DMA /* cl506b.h */ 0x0000006b
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#define NV10_CHANNEL_DMA /* cl506b.h */ 0x0000006e
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#define NV17_CHANNEL_DMA /* cl506b.h */ 0x0000176e
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#define NV40_CHANNEL_DMA /* cl506b.h */ 0x0000406e
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#define NV50_CHANNEL_DMA /* cl506e.h */ 0x0000506e
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#define G82_CHANNEL_DMA /* cl826e.h */ 0x0000826e
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#define NV50_CHANNEL_GPFIFO /* cl506f.h */ 0x0000506f
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#define G82_CHANNEL_GPFIFO /* cl826f.h */ 0x0000826f
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#define FERMI_CHANNEL_GPFIFO /* cl906f.h */ 0x0000906f
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#define KEPLER_CHANNEL_GPFIFO_A /* cla06f.h */ 0x0000a06f
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#define MAXWELL_CHANNEL_GPFIFO_A /* cla06f.h */ 0x0000b06f
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#define NV50_DISP /* cl5070.h */ 0x00005070
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#define G82_DISP /* cl5070.h */ 0x00008270
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#define GT200_DISP /* cl5070.h */ 0x00008370
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#define GT214_DISP /* cl5070.h */ 0x00008570
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#define GT206_DISP /* cl5070.h */ 0x00008870
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#define GF110_DISP /* cl5070.h */ 0x00009070
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#define GK104_DISP /* cl5070.h */ 0x00009170
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#define GK110_DISP /* cl5070.h */ 0x00009270
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#define GM107_DISP /* cl5070.h */ 0x00009470
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#define GM204_DISP /* cl5070.h */ 0x00009570
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#define NV31_MPEG 0x00003174
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#define G82_MPEG 0x00008274
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#define NV74_VP2 0x00007476
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||||
#define NV50_DISP_CURSOR /* cl507a.h */ 0x0000507a
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#define G82_DISP_CURSOR /* cl507a.h */ 0x0000827a
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#define GT214_DISP_CURSOR /* cl507a.h */ 0x0000857a
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#define GF110_DISP_CURSOR /* cl507a.h */ 0x0000907a
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#define GK104_DISP_CURSOR /* cl507a.h */ 0x0000917a
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#define NV50_DISP_OVERLAY /* cl507b.h */ 0x0000507b
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#define G82_DISP_OVERLAY /* cl507b.h */ 0x0000827b
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#define GT214_DISP_OVERLAY /* cl507b.h */ 0x0000857b
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#define GF110_DISP_OVERLAY /* cl507b.h */ 0x0000907b
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#define GK104_DISP_OVERLAY /* cl507b.h */ 0x0000917b
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#define NV50_DISP_BASE_CHANNEL_DMA /* cl507c.h */ 0x0000507c
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#define G82_DISP_BASE_CHANNEL_DMA /* cl507c.h */ 0x0000827c
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#define GT200_DISP_BASE_CHANNEL_DMA /* cl507c.h */ 0x0000837c
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#define GT214_DISP_BASE_CHANNEL_DMA /* cl507c.h */ 0x0000857c
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#define GF110_DISP_BASE_CHANNEL_DMA /* cl507c.h */ 0x0000907c
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#define GK104_DISP_BASE_CHANNEL_DMA /* cl507c.h */ 0x0000917c
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#define GK110_DISP_BASE_CHANNEL_DMA /* cl507c.h */ 0x0000927c
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#define NV50_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000507d
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#define G82_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000827d
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#define GT200_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000837d
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#define GT214_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000857d
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#define GT206_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000887d
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#define GF110_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000907d
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#define GK104_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000917d
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#define GK110_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000927d
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#define GM107_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000947d
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#define GM204_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000957d
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#define NV50_DISP_OVERLAY_CHANNEL_DMA /* cl507e.h */ 0x0000507e
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#define G82_DISP_OVERLAY_CHANNEL_DMA /* cl507e.h */ 0x0000827e
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#define GT200_DISP_OVERLAY_CHANNEL_DMA /* cl507e.h */ 0x0000837e
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#define GT214_DISP_OVERLAY_CHANNEL_DMA /* cl507e.h */ 0x0000857e
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#define GF110_DISP_OVERLAY_CONTROL_DMA /* cl507e.h */ 0x0000907e
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#define GK104_DISP_OVERLAY_CONTROL_DMA /* cl507e.h */ 0x0000917e
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#define FERMI_A /* cl9097.h */ 0x00009097
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#define FERMI_B /* cl9097.h */ 0x00009197
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#define FERMI_C /* cl9097.h */ 0x00009297
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#define KEPLER_A /* cl9097.h */ 0x0000a097
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#define KEPLER_B /* cl9097.h */ 0x0000a197
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#define KEPLER_C /* cl9097.h */ 0x0000a297
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#define MAXWELL_A /* cl9097.h */ 0x0000b097
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#define MAXWELL_B /* cl9097.h */ 0x0000b197
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#define NV74_BSP 0x000074b0
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#define GT212_MSVLD 0x000085b1
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#define IGT21A_MSVLD 0x000086b1
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#define G98_MSVLD 0x000088b1
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#define GF100_MSVLD 0x000090b1
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#define GK104_MSVLD 0x000095b1
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|
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#define GT212_MSPDEC 0x000085b2
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#define G98_MSPDEC 0x000088b2
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#define GF100_MSPDEC 0x000090b2
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#define GK104_MSPDEC 0x000095b2
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#define GT212_MSPPP 0x000085b3
|
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#define G98_MSPPP 0x000088b3
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#define GF100_MSPPP 0x000090b3
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|
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#define G98_SEC 0x000088b4
|
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|
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#define GT212_DMA 0x000085b5
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#define FERMI_DMA 0x000090b5
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#define KEPLER_DMA_COPY_A 0x0000a0b5
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#define MAXWELL_DMA_COPY_A 0x0000b0b5
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#define FERMI_DECOMPRESS 0x000090b8
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#define FERMI_COMPUTE_A 0x000090c0
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#define FERMI_COMPUTE_B 0x000091c0
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#define KEPLER_COMPUTE_A 0x0000a0c0
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#define KEPLER_COMPUTE_B 0x0000a1c0
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#define MAXWELL_COMPUTE_A 0x0000b0c0
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#define MAXWELL_COMPUTE_B 0x0000b1c0
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#define NV74_CIPHER 0x000074c1
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#endif
|
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38
lib/libdrm/nouveau/nvif/if0002.h
Normal file
38
lib/libdrm/nouveau/nvif/if0002.h
Normal file
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@ -0,0 +1,38 @@
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|||
#ifndef __NVIF_IF0002_H__
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#define __NVIF_IF0002_H__
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|
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#define NVIF_PERFMON_V0_QUERY_DOMAIN 0x00
|
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#define NVIF_PERFMON_V0_QUERY_SIGNAL 0x01
|
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#define NVIF_PERFMON_V0_QUERY_SOURCE 0x02
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|
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struct nvif_perfmon_query_domain_v0 {
|
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__u8 version;
|
||||
__u8 id;
|
||||
__u8 counter_nr;
|
||||
__u8 iter;
|
||||
__u16 signal_nr;
|
||||
__u8 pad05[2];
|
||||
char name[64];
|
||||
};
|
||||
|
||||
struct nvif_perfmon_query_signal_v0 {
|
||||
__u8 version;
|
||||
__u8 domain;
|
||||
__u16 iter;
|
||||
__u8 signal;
|
||||
__u8 source_nr;
|
||||
__u8 pad05[2];
|
||||
char name[64];
|
||||
};
|
||||
|
||||
struct nvif_perfmon_query_source_v0 {
|
||||
__u8 version;
|
||||
__u8 domain;
|
||||
__u8 signal;
|
||||
__u8 iter;
|
||||
__u8 pad04[4];
|
||||
__u32 source;
|
||||
__u32 mask;
|
||||
char name[64];
|
||||
};
|
||||
#endif
|
||||
33
lib/libdrm/nouveau/nvif/if0003.h
Normal file
33
lib/libdrm/nouveau/nvif/if0003.h
Normal file
|
|
@ -0,0 +1,33 @@
|
|||
#ifndef __NVIF_IF0003_H__
|
||||
#define __NVIF_IF0003_H__
|
||||
|
||||
struct nvif_perfdom_v0 {
|
||||
__u8 version;
|
||||
__u8 domain;
|
||||
__u8 mode;
|
||||
__u8 pad03[1];
|
||||
struct {
|
||||
__u8 signal[4];
|
||||
__u64 source[4][8];
|
||||
__u16 logic_op;
|
||||
} ctr[4];
|
||||
};
|
||||
|
||||
#define NVIF_PERFDOM_V0_INIT 0x00
|
||||
#define NVIF_PERFDOM_V0_SAMPLE 0x01
|
||||
#define NVIF_PERFDOM_V0_READ 0x02
|
||||
|
||||
struct nvif_perfdom_init {
|
||||
};
|
||||
|
||||
struct nvif_perfdom_sample {
|
||||
};
|
||||
|
||||
struct nvif_perfdom_read_v0 {
|
||||
__u8 version;
|
||||
__u8 pad01[7];
|
||||
__u32 ctr[4];
|
||||
__u32 clk;
|
||||
__u8 pad04[4];
|
||||
};
|
||||
#endif
|
||||
132
lib/libdrm/nouveau/nvif/ioctl.h
Normal file
132
lib/libdrm/nouveau/nvif/ioctl.h
Normal file
|
|
@ -0,0 +1,132 @@
|
|||
#ifndef __NVIF_IOCTL_H__
|
||||
#define __NVIF_IOCTL_H__
|
||||
|
||||
#define NVIF_VERSION_LATEST 0x0000000000000000ULL
|
||||
|
||||
struct nvif_ioctl_v0 {
|
||||
__u8 version;
|
||||
#define NVIF_IOCTL_V0_NOP 0x00
|
||||
#define NVIF_IOCTL_V0_SCLASS 0x01
|
||||
#define NVIF_IOCTL_V0_NEW 0x02
|
||||
#define NVIF_IOCTL_V0_DEL 0x03
|
||||
#define NVIF_IOCTL_V0_MTHD 0x04
|
||||
#define NVIF_IOCTL_V0_RD 0x05
|
||||
#define NVIF_IOCTL_V0_WR 0x06
|
||||
#define NVIF_IOCTL_V0_MAP 0x07
|
||||
#define NVIF_IOCTL_V0_UNMAP 0x08
|
||||
#define NVIF_IOCTL_V0_NTFY_NEW 0x09
|
||||
#define NVIF_IOCTL_V0_NTFY_DEL 0x0a
|
||||
#define NVIF_IOCTL_V0_NTFY_GET 0x0b
|
||||
#define NVIF_IOCTL_V0_NTFY_PUT 0x0c
|
||||
__u8 type;
|
||||
__u8 pad02[4];
|
||||
#define NVIF_IOCTL_V0_OWNER_NVIF 0x00
|
||||
#define NVIF_IOCTL_V0_OWNER_ANY 0xff
|
||||
__u8 owner;
|
||||
#define NVIF_IOCTL_V0_ROUTE_NVIF 0x00
|
||||
#define NVIF_IOCTL_V0_ROUTE_HIDDEN 0xff
|
||||
__u8 route;
|
||||
__u64 token;
|
||||
__u64 object;
|
||||
__u8 data[]; /* ioctl data (below) */
|
||||
};
|
||||
|
||||
struct nvif_ioctl_nop_v0 {
|
||||
__u64 version;
|
||||
};
|
||||
|
||||
struct nvif_ioctl_sclass_v0 {
|
||||
/* nvif_ioctl ... */
|
||||
__u8 version;
|
||||
__u8 count;
|
||||
__u8 pad02[6];
|
||||
struct nvif_ioctl_sclass_oclass_v0 {
|
||||
__s32 oclass;
|
||||
__s16 minver;
|
||||
__s16 maxver;
|
||||
} oclass[];
|
||||
};
|
||||
|
||||
struct nvif_ioctl_new_v0 {
|
||||
/* nvif_ioctl ... */
|
||||
__u8 version;
|
||||
__u8 pad01[6];
|
||||
__u8 route;
|
||||
__u64 token;
|
||||
__u64 object;
|
||||
__u32 handle;
|
||||
__s32 oclass;
|
||||
__u8 data[]; /* class data (class.h) */
|
||||
};
|
||||
|
||||
struct nvif_ioctl_del {
|
||||
};
|
||||
|
||||
struct nvif_ioctl_rd_v0 {
|
||||
/* nvif_ioctl ... */
|
||||
__u8 version;
|
||||
__u8 size;
|
||||
__u8 pad02[2];
|
||||
__u32 data;
|
||||
__u64 addr;
|
||||
};
|
||||
|
||||
struct nvif_ioctl_wr_v0 {
|
||||
/* nvif_ioctl ... */
|
||||
__u8 version;
|
||||
__u8 size;
|
||||
__u8 pad02[2];
|
||||
__u32 data;
|
||||
__u64 addr;
|
||||
};
|
||||
|
||||
struct nvif_ioctl_map_v0 {
|
||||
/* nvif_ioctl ... */
|
||||
__u8 version;
|
||||
__u8 pad01[3];
|
||||
__u32 length;
|
||||
__u64 handle;
|
||||
};
|
||||
|
||||
struct nvif_ioctl_unmap {
|
||||
};
|
||||
|
||||
struct nvif_ioctl_ntfy_new_v0 {
|
||||
/* nvif_ioctl ... */
|
||||
__u8 version;
|
||||
__u8 event;
|
||||
__u8 index;
|
||||
__u8 pad03[5];
|
||||
__u8 data[]; /* event request data (event.h) */
|
||||
};
|
||||
|
||||
struct nvif_ioctl_ntfy_del_v0 {
|
||||
/* nvif_ioctl ... */
|
||||
__u8 version;
|
||||
__u8 index;
|
||||
__u8 pad02[6];
|
||||
};
|
||||
|
||||
struct nvif_ioctl_ntfy_get_v0 {
|
||||
/* nvif_ioctl ... */
|
||||
__u8 version;
|
||||
__u8 index;
|
||||
__u8 pad02[6];
|
||||
};
|
||||
|
||||
struct nvif_ioctl_ntfy_put_v0 {
|
||||
/* nvif_ioctl ... */
|
||||
__u8 version;
|
||||
__u8 index;
|
||||
__u8 pad02[6];
|
||||
};
|
||||
|
||||
struct nvif_ioctl_mthd_v0 {
|
||||
/* nvif_ioctl ... */
|
||||
__u8 version;
|
||||
__u8 method;
|
||||
__u8 pad02[6];
|
||||
__u8 data[]; /* method data (class.h) */
|
||||
};
|
||||
|
||||
#endif
|
||||
28
lib/libdrm/nouveau/nvif/unpack.h
Normal file
28
lib/libdrm/nouveau/nvif/unpack.h
Normal file
|
|
@ -0,0 +1,28 @@
|
|||
#ifndef __NVIF_UNPACK_H__
|
||||
#define __NVIF_UNPACK_H__
|
||||
|
||||
#define nvif_unvers(r,d,s,m) ({ \
|
||||
void **_data = (d); __u32 *_size = (s); int _ret = (r); \
|
||||
if (_ret == -ENOSYS && *_size == sizeof(m)) { \
|
||||
*_data = NULL; \
|
||||
*_size = _ret = 0; \
|
||||
} \
|
||||
_ret; \
|
||||
})
|
||||
|
||||
#define nvif_unpack(r,d,s,m,vl,vh,x) ({ \
|
||||
void **_data = (d); __u32 *_size = (s); \
|
||||
int _ret = (r), _vl = (vl), _vh = (vh); \
|
||||
if (_ret == -ENOSYS && *_size >= sizeof(m) && \
|
||||
(m).version >= _vl && (m).version <= _vh) { \
|
||||
*_data = (__u8 *)*_data + sizeof(m); \
|
||||
*_size = *_size - sizeof(m); \
|
||||
if (_ret = 0, !(x)) { \
|
||||
_ret = *_size ? -E2BIG : 0; \
|
||||
*_data = NULL; \
|
||||
*_size = 0; \
|
||||
} \
|
||||
} \
|
||||
_ret; \
|
||||
})
|
||||
#endif
|
||||
Loading…
Add table
Add a link
Reference in a new issue