sync code with last improvements from OpenBSD
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26235 changed files with 29195616 additions and 0 deletions
305
driver/xf86-video-siliconmotion/src/smilynx_output.c
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305
driver/xf86-video-siliconmotion/src/smilynx_output.c
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/*
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Copyright (C) 1994-1999 The XFree86 Project, Inc. All Rights Reserved.
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Copyright (C) 2000 Silicon Motion, Inc. All Rights Reserved.
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Copyright (C) 2008 Francisco Jerez. All Rights Reserved.
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Permission is hereby granted, free of charge, to any person obtaining a copy of
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this software and associated documentation files (the "Software"), to deal in
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the Software without restriction, including without limitation the rights to
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use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
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of the Software, and to permit persons to whom the Software is furnished to do
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so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in all
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copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FIT-
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NESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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XFREE86 PROJECT BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
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AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
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WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the names of The XFree86 Project and
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Silicon Motion shall not be used in advertising or otherwise to promote the
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sale, use or other dealings in this Software without prior written
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authorization from The XFree86 Project or Silicon Motion.
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*/
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include "smi.h"
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#include "smi_crtc.h"
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#include "smilynx.h"
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static void
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SMILynx_OutputDPMS_crt(xf86OutputPtr output, int mode)
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{
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ScrnInfoPtr pScrn = output->scrn;
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SMIPtr pSmi = SMIPTR(pScrn);
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SMIRegPtr reg = pSmi->mode;
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vgaHWPtr hwp = VGAHWPTR(pScrn);
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ENTER();
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switch (mode) {
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case DPMSModeOn:
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reg->SR31 |= 0x02; /* Enable CRT display*/
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reg->SR22 = (reg->SR22 & ~0x30) | 0x00; /* Set DPMS state*/
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break;
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case DPMSModeStandby:
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reg->SR31 |= 0x02; /* Enable CRT display*/
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reg->SR22 = (reg->SR22 & ~0x30) | 0x10; /* Set DPMS state*/
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break;
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case DPMSModeSuspend:
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reg->SR31 |= 0x02; /* Enable CRT display*/
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reg->SR22 = (reg->SR22 & ~0x30) | 0x20; /* Set DPMS state*/
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break;
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case DPMSModeOff:
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reg->SR31 &= ~0x02; /* Disable CRT display*/
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reg->SR22 = (reg->SR22 & ~0x30) | 0x30; /* Set DPMS state*/
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break;
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}
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/* Wait for vertical retrace */
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while (hwp->readST01(hwp) & 0x8) ;
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while (!(hwp->readST01(hwp) & 0x8)) ;
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/* Write the registers */
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VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x22, reg->SR22);
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VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x31, reg->SR31);
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LEAVE();
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}
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static void
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SMILynx_OutputDPMS_lcd(xf86OutputPtr output, int mode)
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{
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ScrnInfoPtr pScrn = output->scrn;
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SMIPtr pSmi = SMIPTR(pScrn);
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SMIRegPtr reg = pSmi->mode;
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xf86CrtcConfigPtr crtcConf = XF86_CRTC_CONFIG_PTR(pScrn);
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ENTER();
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switch (mode) {
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case DPMSModeOn:
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if(pSmi->Dualhead &&
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output->crtc == crtcConf->crtc[1]){
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/* Virtual Refresh is enabled */
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reg->SR21 &= ~0x10; /* Enable LCD framebuffer read operation and DSTN dithering engine */
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}else{
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if(pSmi->lcd == 2){
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/* LCD is DSTN */
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reg->SR21 &= ~0x10; /* Enable LCD framebuffer read operation and DSTN dithering engine */
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reg->SR21 &= ~0x20; /* Enable LCD framebuffer write operation */
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}
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}
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reg->SR31 |= 0x01; /* Enable LCD display*/
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break;
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case DPMSModeStandby:
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case DPMSModeSuspend:
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case DPMSModeOff:
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reg->SR21 |= 0x30; /* Disable LCD framebuffer r/w operation */
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reg->SR31 &= ~0x01; /* Disable LCD display*/
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break;
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}
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/* Write the registers */
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VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x21, reg->SR21);
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VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x31, reg->SR31);
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LEAVE();
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}
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static void
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SMILynx_OutputDPMS_bios(xf86OutputPtr output, int mode)
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{
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ScrnInfoPtr pScrn = output->scrn;
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SMIPtr pSmi = SMIPTR(pScrn);
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ENTER();
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pSmi->pInt10->ax = 0x4F10;
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switch (mode) {
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case DPMSModeOn:
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pSmi->pInt10->bx = 0x0001;
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break;
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case DPMSModeStandby:
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pSmi->pInt10->bx = 0x0101;
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break;
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case DPMSModeSuspend:
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pSmi->pInt10->bx = 0x0201;
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break;
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case DPMSModeOff:
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pSmi->pInt10->bx = 0x0401;
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break;
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}
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pSmi->pInt10->cx = 0x0000;
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pSmi->pInt10->num = 0x10;
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xf86ExecX86int10(pSmi->pInt10);
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LEAVE();
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}
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static DisplayModePtr
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SMILynx_OutputGetModes_crt(xf86OutputPtr output)
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{
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ScrnInfoPtr pScrn = output->scrn;
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SMIPtr pSmi = SMIPTR(pScrn);
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xf86MonPtr pMon = NULL;
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ENTER();
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if(xf86LoaderCheckSymbol("xf86PrintEDID")){ /* Ensure the DDC module is loaded*/
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/* Try VBE */
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if(pSmi->pVbe){
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pMon = vbeDoEDID(pSmi->pVbe, NULL);
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if ( pMon != NULL &&
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(pMon->rawData[0] == 0x00) &&
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(pMon->rawData[1] == 0xFF) &&
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(pMon->rawData[2] == 0xFF) &&
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(pMon->rawData[3] == 0xFF) &&
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(pMon->rawData[4] == 0xFF) &&
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(pMon->rawData[5] == 0xFF) &&
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(pMon->rawData[6] == 0xFF) &&
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(pMon->rawData[7] == 0x00)) {
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xf86OutputSetEDID(output,pMon);
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LEAVE(xf86OutputGetEDIDModes(output));
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}
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}
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/* Try DDC2 */
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if(pSmi->I2C){
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pMon=xf86OutputGetEDID(output,pSmi->I2C);
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if(pMon){
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xf86OutputSetEDID(output,pMon);
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LEAVE(xf86OutputGetEDIDModes(output));
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}
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}
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/* Try DDC1 */
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pMon=SMILynx_ddc1(pScrn);
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if(pMon){
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xf86OutputSetEDID(output,pMon);
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LEAVE(xf86OutputGetEDIDModes(output));
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}
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}
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LEAVE(NULL);
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}
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static xf86OutputStatus
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SMILynx_OutputDetect_crt(xf86OutputPtr output)
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{
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SMIPtr pSmi = SMIPTR(output->scrn);
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SMIRegPtr mode = pSmi->mode;
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vgaHWPtr hwp = VGAHWPTR(output->scrn);
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CARD8 SR7D;
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Bool status;
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ENTER();
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SR7D = VGAIN8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x7D);
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VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x21, mode->SR21 & ~0x88); /* Enable DAC and color palette RAM */
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VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x7B, 0x40); /* "TV and RAMDAC Testing Power", Green component */
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VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x7D, SR7D | 0x10); /* Enable monitor detect */
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/* Wait for vertical retrace */
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while (!(hwp->readST01(hwp) & 0x8)) ;
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while (hwp->readST01(hwp) & 0x8) ;
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status = VGAIN8(pSmi, 0x3C2) & 0x10;
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/* Restore previous state */
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VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x21, mode->SR21);
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VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x7D, SR7D);
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if(status)
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LEAVE(XF86OutputStatusConnected);
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else
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LEAVE(XF86OutputStatusDisconnected);
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}
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Bool
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SMILynx_OutputPreInit(ScrnInfoPtr pScrn)
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{
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SMIPtr pSmi = SMIPTR(pScrn);
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xf86OutputPtr output;
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xf86OutputFuncsPtr outputFuncs;
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ENTER();
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if(pSmi->Chipset == SMI_COUGAR3DR){
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/* Output 0 is LCD */
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SMI_OutputFuncsInit_base(&outputFuncs);
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if(pSmi->useBIOS)
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outputFuncs->dpms = SMILynx_OutputDPMS_bios;
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else
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outputFuncs->dpms = SMILynx_OutputDPMS_lcd;
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outputFuncs->get_modes = SMI_OutputGetModes_native;
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outputFuncs->detect = SMI_OutputDetect_lcd;
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if(! (output = xf86OutputCreate(pScrn,outputFuncs,"LVDS")))
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LEAVE(FALSE);
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output->possible_crtcs = 1 << 0;
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output->possible_clones = 0;
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output->interlaceAllowed = FALSE;
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output->doubleScanAllowed = FALSE;
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}else{
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/* Output 0 is LCD */
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SMI_OutputFuncsInit_base(&outputFuncs);
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if(pSmi->useBIOS)
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outputFuncs->dpms = SMILynx_OutputDPMS_bios;
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else
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outputFuncs->dpms = SMILynx_OutputDPMS_lcd;
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outputFuncs->get_modes = SMI_OutputGetModes_native;
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outputFuncs->detect = SMI_OutputDetect_lcd;
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if(! (output = xf86OutputCreate(pScrn,outputFuncs,"LVDS")))
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LEAVE(FALSE);
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output->interlaceAllowed = FALSE;
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output->doubleScanAllowed = FALSE;
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output->possible_crtcs = (1 << 0) | (1 << 1);
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output->possible_clones = 1 << 1;
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if(pSmi->Dualhead){
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/* Output 1 is CRT */
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SMI_OutputFuncsInit_base(&outputFuncs);
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outputFuncs->dpms = SMILynx_OutputDPMS_crt;
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outputFuncs->get_modes = SMILynx_OutputGetModes_crt;
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if(pSmi->Chipset == SMI_LYNX3DM)
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outputFuncs->detect = SMILynx_OutputDetect_crt;
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if(! (output = xf86OutputCreate(pScrn,outputFuncs,"VGA")))
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LEAVE(FALSE);
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output->interlaceAllowed = FALSE;
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output->doubleScanAllowed = FALSE;
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output->possible_crtcs = 1 << 0;
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output->possible_clones = 1 << 0;
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}
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}
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LEAVE(TRUE);
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}
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