sync code with last improvements from OpenBSD
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178
driver/xf86-video-mach64/src/ativalid.c
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178
driver/xf86-video-mach64/src/ativalid.c
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/*
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* Copyright 1997 through 2004 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
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*
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* Permission to use, copy, modify, distribute, and sell this software and its
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* documentation for any purpose is hereby granted without fee, provided that
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* the above copyright notice appear in all copies and that both that copyright
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* notice and this permission notice appear in supporting documentation, and
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* that the name of Marc Aurele La France not be used in advertising or
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* publicity pertaining to distribution of the software without specific,
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* written prior permission. Marc Aurele La France makes no representations
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* about the suitability of this software for any purpose. It is provided
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* "as-is" without express or implied warranty.
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*
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* MARC AURELE LA FRANCE DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
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* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO
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* EVENT SHALL MARC AURELE LA FRANCE BE LIABLE FOR ANY SPECIAL, INDIRECT OR
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* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
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* DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
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* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
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* PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include "xf86.h"
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#include "atichip.h"
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#include "atistruct.h"
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#include "ativalid.h"
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/*
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* ATIValidMode --
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*
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* This checks for hardware-related limits on mode timings.
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*/
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ModeStatus
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ATIValidMode
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(
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SCRN_ARG_TYPE arg,
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DisplayModePtr pMode,
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Bool Verbose,
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int flags
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)
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{
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SCRN_INFO_PTR(arg);
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ATIPtr pATI = ATIPTR(pScreenInfo);
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int HBlankWidth, HAdjust, VScan, VInterlace;
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if (flags & MODECHECK_FINAL)
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{
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return MODE_OK;
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}
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{
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int maxHValue, maxVValue;
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maxHValue = (MaxBits(CRTC_H_TOTAL) + 1) << 3;
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if (pATI->Chip < ATI_CHIP_264VT)
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{
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/* CRTC_H_TOTAL is one bit narrower */
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maxHValue >>= 1;
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}
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if (pMode->HTotal > maxHValue)
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return MODE_BAD_HVALUE;
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maxVValue = MaxBits(CRTC_V_TOTAL) + 1;
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if (pMode->VTotal > maxVValue)
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return MODE_BAD_VVALUE;
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}
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/*
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* The following is done for every mode in the monitor section that
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* survives the common layer's basic checks.
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*/
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if (pMode->VScan <= 1)
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VScan = 1;
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else
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VScan = pMode->VScan;
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if (pMode->Flags & V_DBLSCAN)
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VScan <<= 1;
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if (pATI->OptionPanelDisplay && (pATI->LCDPanelID >= 0))
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{
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if ((pMode->CrtcHDisplay > pATI->LCDHorizontal) ||
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(pMode->CrtcVDisplay > pATI->LCDVertical))
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return MODE_PANEL;
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if (!pATI->OptionLCDSync || (pMode->type & M_T_BUILTIN))
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{
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if ((pMode->HDisplay > pATI->LCDHorizontal) ||
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(pMode->VDisplay > pATI->LCDVertical))
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return MODE_PANEL;
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return MODE_OK;
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}
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/*
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* Adjust effective timings for monitor checks. Here the modeline
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* clock is ignored. Horizontal timings are scaled by the stretch
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* ratio used for the displayed area. The vertical porch is scaled by
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* the native resolution's aspect ratio. This seems rather arbitrary,
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* and it is, but it does make all applicable VESA modes sync on a
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* panel after stretching. This has the unfortunate, but necessary,
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* side-effect of changing the mode's horizontal sync and vertical
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* refresh rates. With some exceptions, this tends to increase the
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* mode's horizontal sync rate, and decrease its vertical refresh rate.
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*/
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pMode->SynthClock = pATI->LCDClock;
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pMode->CrtcHTotal = pMode->CrtcHBlankEnd =
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ATIDivide(pMode->CrtcHTotal * pATI->LCDHorizontal,
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pMode->CrtcHDisplay, -3, 1) << 3;
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pMode->CrtcHSyncEnd =
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ATIDivide(pMode->CrtcHSyncEnd * pATI->LCDHorizontal,
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pMode->CrtcHDisplay, -3, 1) << 3;
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pMode->CrtcHSyncStart =
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ATIDivide(pMode->CrtcHSyncStart * pATI->LCDHorizontal,
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pMode->CrtcHDisplay, -3, -1) << 3;
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pMode->CrtcHDisplay = pMode->CrtcHBlankStart = pATI->LCDHorizontal;
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pMode->CrtcVTotal = pMode->CrtcVBlankEnd =
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ATIDivide((pMode->CrtcVTotal - pMode->CrtcVDisplay) *
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pATI->LCDVertical, pATI->LCDHorizontal, 0, 1) +
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pATI->LCDVertical;
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pMode->CrtcVSyncEnd =
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ATIDivide((pMode->CrtcVSyncEnd - pMode->CrtcVDisplay) *
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pATI->LCDVertical, pATI->LCDHorizontal, 0, 1) +
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pATI->LCDVertical;
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pMode->CrtcVSyncStart =
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ATIDivide((pMode->CrtcVSyncStart - pMode->CrtcVDisplay) *
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pATI->LCDVertical, pATI->LCDHorizontal, 0, -1) +
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pATI->LCDVertical;
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pMode->CrtcVDisplay = pMode->CrtcVBlankStart = pATI->LCDVertical;
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/*
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* The CRTC only stretches the mode's displayed area, not its porches.
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* Reverse-engineer the mode's timings back into the user specified
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* values so that the stretched mode is produced when the CRTC is
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* eventually programmed. The reverse-engineered mode is then checked
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* against CRTC limits below.
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*/
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pMode->Clock = pATI->LCDClock;
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HAdjust = pATI->LCDHorizontal - pMode->HDisplay;
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# define ATIReverseHorizontal(_x) \
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(pMode->_x - HAdjust)
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pMode->HSyncStart = ATIReverseHorizontal(CrtcHSyncStart);
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pMode->HSyncEnd = ATIReverseHorizontal(CrtcHSyncEnd);
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pMode->HTotal = ATIReverseHorizontal(CrtcHTotal);
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VInterlace = GetBits(pMode->Flags, V_INTERLACE) + 1;
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# define ATIReverseVertical(_y) \
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((((pMode->_y - pATI->LCDVertical) * VInterlace) / VScan) + \
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pMode->VDisplay)
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pMode->VSyncStart = ATIReverseVertical(CrtcVSyncStart);
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pMode->VSyncEnd = ATIReverseVertical(CrtcVSyncEnd);
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pMode->VTotal = ATIReverseVertical(CrtcVTotal);
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# undef ATIReverseHorizontal
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# undef ATIReverseVertical
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}
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HBlankWidth = (pMode->HTotal >> 3) - (pMode->HDisplay >> 3);
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if (!HBlankWidth)
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return MODE_HBLANK_NARROW;
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{
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if (VScan > 2)
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return MODE_NO_VSCAN;
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}
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return MODE_OK;
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}
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