134 lines
3.4 KiB
C
134 lines
3.4 KiB
C
/* $OpenBSD: arm64cap.c,v 1.3 2023/07/26 09:57:34 jsing Exp $ */
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <setjmp.h>
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#include <signal.h>
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#include <openssl/crypto.h>
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#if defined(__OpenBSD__)
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#include <sys/sysctl.h>
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#include <machine/cpu.h> /* CPU_ID_AA64ISAR0 */
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#endif
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#include "arm64_arch.h"
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/* ID_AA64ISAR0_EL1 required for OPENSSL_cpuid_setup */
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#define ID_AA64ISAR0_AES_SHIFT 4
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#define ID_AA64ISAR0_AES_MASK (0xf << ID_AA64ISAR0_AES_SHIFT)
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#define ID_AA64ISAR0_AES(x) ((x) & ID_AA64ISAR0_AES_MASK)
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#define ID_AA64ISAR0_AES_BASE (0x1 << ID_AA64ISAR0_AES_SHIFT)
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#define ID_AA64ISAR0_AES_PMULL (0x2 << ID_AA64ISAR0_AES_SHIFT)
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#define ID_AA64ISAR0_SHA1_SHIFT 8
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#define ID_AA64ISAR0_SHA1_MASK (0xf << ID_AA64ISAR0_SHA1_SHIFT)
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#define ID_AA64ISAR0_SHA1(x) ((x) & ID_AA64ISAR0_SHA1_MASK)
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#define ID_AA64ISAR0_SHA1_BASE (0x1 << ID_AA64ISAR0_SHA1_SHIFT)
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#define ID_AA64ISAR0_SHA2_SHIFT 12
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#define ID_AA64ISAR0_SHA2_MASK (0xf << ID_AA64ISAR0_SHA2_SHIFT)
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#define ID_AA64ISAR0_SHA2(x) ((x) & ID_AA64ISAR0_SHA2_MASK)
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#define ID_AA64ISAR0_SHA2_BASE (0x1 << ID_AA64ISAR0_SHA2_SHIFT)
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unsigned int OPENSSL_armcap_P;
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#if defined(CPU_ID_AA64ISAR0)
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void
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OPENSSL_cpuid_setup(void)
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{
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int isar0_mib[] = { CTL_MACHDEP, CPU_ID_AA64ISAR0 };
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size_t len = sizeof(uint64_t);
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uint64_t cpu_id = 0;
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if (OPENSSL_armcap_P != 0)
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return;
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if (sysctl(isar0_mib, 2, &cpu_id, &len, NULL, 0) < 0)
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return;
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OPENSSL_armcap_P |= ARMV7_NEON;
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if (ID_AA64ISAR0_AES(cpu_id) >= ID_AA64ISAR0_AES_BASE)
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OPENSSL_armcap_P |= ARMV8_AES;
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if (ID_AA64ISAR0_AES(cpu_id) >= ID_AA64ISAR0_AES_PMULL)
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OPENSSL_armcap_P |= ARMV8_PMULL;
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if (ID_AA64ISAR0_SHA1(cpu_id) >= ID_AA64ISAR0_SHA1_BASE)
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OPENSSL_armcap_P |= ARMV8_SHA1;
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if (ID_AA64ISAR0_SHA2(cpu_id) >= ID_AA64ISAR0_SHA2_BASE)
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OPENSSL_armcap_P |= ARMV8_SHA256;
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}
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#else
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#if __ARM_ARCH__ >= 7
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static sigset_t all_masked;
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static sigjmp_buf ill_jmp;
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static void ill_handler (int sig) { siglongjmp(ill_jmp, sig);
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}
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/*
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* Following subroutines could have been inlined, but it's not all
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* ARM compilers support inline assembler...
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*/
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void _armv7_neon_probe(void);
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void _armv8_aes_probe(void);
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void _armv8_sha1_probe(void);
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void _armv8_sha256_probe(void);
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void _armv8_pmull_probe(void);
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#endif
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void
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OPENSSL_cpuid_setup(void)
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{
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#if __ARM_ARCH__ >= 7
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struct sigaction ill_oact, ill_act;
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sigset_t oset;
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#endif
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static int trigger = 0;
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if (trigger)
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return;
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trigger = 1;
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OPENSSL_armcap_P = 0;
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#if __ARM_ARCH__ >= 7
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sigfillset(&all_masked);
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sigdelset(&all_masked, SIGILL);
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sigdelset(&all_masked, SIGTRAP);
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sigdelset(&all_masked, SIGFPE);
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sigdelset(&all_masked, SIGBUS);
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sigdelset(&all_masked, SIGSEGV);
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memset(&ill_act, 0, sizeof(ill_act));
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ill_act.sa_handler = ill_handler;
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ill_act.sa_mask = all_masked;
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sigprocmask(SIG_SETMASK, &ill_act.sa_mask, &oset);
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sigaction(SIGILL, &ill_act, &ill_oact);
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if (sigsetjmp(ill_jmp, 1) == 0) {
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_armv7_neon_probe();
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OPENSSL_armcap_P |= ARMV7_NEON;
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if (sigsetjmp(ill_jmp, 1) == 0) {
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_armv8_pmull_probe();
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OPENSSL_armcap_P |= ARMV8_PMULL | ARMV8_AES;
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} else if (sigsetjmp(ill_jmp, 1) == 0) {
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_armv8_aes_probe();
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OPENSSL_armcap_P |= ARMV8_AES;
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}
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if (sigsetjmp(ill_jmp, 1) == 0) {
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_armv8_sha1_probe();
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OPENSSL_armcap_P |= ARMV8_SHA1;
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}
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if (sigsetjmp(ill_jmp, 1) == 0) {
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_armv8_sha256_probe();
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OPENSSL_armcap_P |= ARMV8_SHA256;
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}
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}
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sigaction (SIGILL, &ill_oact, NULL);
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sigprocmask(SIG_SETMASK, &oset, NULL);
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#endif
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}
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#endif
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