657 lines
17 KiB
C
657 lines
17 KiB
C
/* $OpenBSD: bba.c,v 1.12 2022/10/26 20:19:09 kn Exp $ */
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/* $NetBSD: bba.c,v 1.38 2011/06/04 01:27:57 tsutsui Exp $ */
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/*
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* Copyright (c) 2011 Miodrag Vallat.
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*
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* Permission to use, copy, modify, and distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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/*
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* Copyright (c) 2000 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/* maxine/alpha baseboard audio (bba) */
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/device.h>
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#include <sys/malloc.h>
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#include <machine/autoconf.h>
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#include <machine/bus.h>
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#include <machine/cpu.h>
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#include <sys/audioio.h>
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#include <dev/audio_if.h>
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#include <dev/ic/am7930reg.h>
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#include <dev/ic/am7930var.h>
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#include <dev/tc/tcvar.h>
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#include <dev/tc/ioasicreg.h>
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#include <dev/tc/ioasicvar.h>
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#ifdef AUDIO_DEBUG
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#define DPRINTF(x) if (am7930debug) printf x
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#else
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#define DPRINTF(x)
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#endif /* AUDIO_DEBUG */
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#define BBA_MAX_DMA_SEGMENTS 16
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#define BBA_DMABUF_SIZE (BBA_MAX_DMA_SEGMENTS*IOASIC_DMA_BLOCKSIZE)
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#define BBA_DMABUF_ALIGN IOASIC_DMA_BLOCKSIZE
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#define BBA_DMABUF_BOUNDARY 0
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struct bba_mem {
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struct bba_mem *next;
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bus_addr_t addr;
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bus_size_t size;
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void *kva;
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};
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struct bba_dma_state {
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bus_dmamap_t dmam; /* DMA map */
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size_t size;
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int active;
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int curseg; /* current segment in DMA buffer */
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void (*intr)(void *); /* higher-level audio handler */
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void *intr_arg;
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};
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struct bba_softc {
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struct am7930_softc sc_am7930; /* glue to MI code */
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bus_space_tag_t sc_bst; /* IOASIC bus tag/handle */
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bus_space_handle_t sc_bsh;
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bus_dma_tag_t sc_dmat;
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bus_space_handle_t sc_codec_bsh; /* codec bus space handle */
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struct bba_mem *sc_mem_head; /* list of buffers */
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struct bba_dma_state sc_tx_dma_state;
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struct bba_dma_state sc_rx_dma_state;
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};
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int bba_match(struct device *, void *, void *);
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void bba_attach(struct device *, struct device *, void *);
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struct cfdriver bba_cd = {
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NULL, "bba", DV_DULL
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};
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const struct cfattach bba_ca = {
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sizeof(struct bba_softc), bba_match, bba_attach
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};
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/*
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* Define our interface into the am7930 MI driver.
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*/
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uint8_t bba_codec_iread(struct am7930_softc *, int);
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uint16_t bba_codec_iread16(struct am7930_softc *, int);
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void bba_codec_iwrite(struct am7930_softc *, int, uint8_t);
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void bba_codec_iwrite16(struct am7930_softc *, int, uint16_t);
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void bba_onopen(struct am7930_softc *);
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void bba_onclose(struct am7930_softc *);
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struct am7930_glue bba_glue = {
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bba_codec_iread,
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bba_codec_iwrite,
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bba_codec_iread16,
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bba_codec_iwrite16,
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bba_onopen,
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bba_onclose,
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24
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};
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/*
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* Define our interface to the higher level audio driver.
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*/
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int bba_round_blocksize(void *, int);
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int bba_halt_output(void *);
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int bba_halt_input(void *);
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void *bba_allocm(void *, int, size_t, int, int);
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void bba_freem(void *, void *, int);
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size_t bba_round_buffersize(void *, int, size_t);
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int bba_trigger_output(void *, void *, void *, int,
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void (*)(void *), void *, struct audio_params *);
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int bba_trigger_input(void *, void *, void *, int,
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void (*)(void *), void *, struct audio_params *);
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const struct audio_hw_if bba_hw_if = {
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.open = am7930_open,
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.close = am7930_close,
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.set_params = am7930_set_params,
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.round_blocksize = bba_round_blocksize,
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.commit_settings = am7930_commit_settings,
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.halt_output = bba_halt_output,
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.halt_input = bba_halt_input,
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.set_port = am7930_set_port,
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.get_port = am7930_get_port,
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.query_devinfo = am7930_query_devinfo,
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.allocm = bba_allocm,
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.freem = bba_freem,
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.round_buffersize = bba_round_buffersize,
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.trigger_output = bba_trigger_output,
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.trigger_input = bba_trigger_input,
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};
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int bba_intr(void *);
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void bba_reset(struct bba_softc *, int);
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void bba_codec_dwrite(struct am7930_softc *, int, uint8_t);
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uint8_t bba_codec_dread(struct am7930_softc *, int);
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int
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bba_match(struct device *parent, void *vcf, void *aux)
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{
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struct ioasicdev_attach_args *ia = aux;
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if (strcmp(ia->iada_modname, "isdn") != 0 &&
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strcmp(ia->iada_modname, "AMD79c30") != 0)
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return 0;
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return 1;
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}
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void
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bba_attach(struct device *parent, struct device *self, void *aux)
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{
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struct ioasicdev_attach_args *ia = aux;
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struct bba_softc *sc = (struct bba_softc *)self;
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struct ioasic_softc *iosc = (struct ioasic_softc *)parent;
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sc->sc_bst = iosc->sc_bst;
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sc->sc_bsh = iosc->sc_bsh;
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sc->sc_dmat = iosc->sc_dmat;
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/* get the bus space handle for codec */
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if (bus_space_subregion(sc->sc_bst, sc->sc_bsh,
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ia->iada_offset, 0, &sc->sc_codec_bsh)) {
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printf(": unable to map device\n");
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return;
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}
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printf("\n");
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bba_reset(sc,1);
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/*
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* Set up glue for MI code early; we use some of it here.
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*/
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sc->sc_am7930.sc_glue = &bba_glue;
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/*
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* MI initialisation. We will be doing DMA.
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*/
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am7930_init(&sc->sc_am7930, AUDIOAMD_DMA_MODE);
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ioasic_intr_establish(parent, ia->iada_cookie, IPL_AUDIO,
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bba_intr, sc, self->dv_xname);
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audio_attach_mi(&bba_hw_if, sc, NULL, self);
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}
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void
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bba_onopen(struct am7930_softc *sc)
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{
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}
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void
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bba_onclose(struct am7930_softc *sc)
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{
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}
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void
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bba_reset(struct bba_softc *sc, int reset)
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{
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uint32_t ssr;
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/* disable any DMA and reset the codec */
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ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR);
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ssr &= ~(IOASIC_CSR_DMAEN_ISDN_T | IOASIC_CSR_DMAEN_ISDN_R);
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if (reset)
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ssr &= ~IOASIC_CSR_ISDN_ENABLE;
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bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
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DELAY(10); /* 400ns required for codec to reset */
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/* initialise DMA pointers */
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bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_DMAPTR, 0);
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bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_NEXTPTR, 0);
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bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_DMAPTR, 0);
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bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_NEXTPTR, 0);
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/* take out of reset state */
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if (reset) {
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ssr |= IOASIC_CSR_ISDN_ENABLE;
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bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
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}
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}
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void *
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bba_allocm(void *v, int direction, size_t size, int mtype, int flags)
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{
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struct bba_softc *sc = v;
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bus_dma_segment_t seg;
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int rseg;
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caddr_t kva;
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struct bba_mem *m;
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int w;
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int state;
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DPRINTF(("bba_allocm: size = %zu\n", size));
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state = 0;
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w = (flags & M_NOWAIT) ? BUS_DMA_NOWAIT : BUS_DMA_WAITOK;
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if (bus_dmamem_alloc(sc->sc_dmat, size, BBA_DMABUF_ALIGN,
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BBA_DMABUF_BOUNDARY, &seg, 1, &rseg, w)) {
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printf("%s: can't allocate DMA buffer\n",
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sc->sc_am7930.sc_dev.dv_xname);
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goto bad;
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}
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state |= 1;
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if (bus_dmamem_map(sc->sc_dmat, &seg, rseg, size,
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&kva, w | BUS_DMA_COHERENT)) {
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printf("%s: can't map DMA buffer\n",
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sc->sc_am7930.sc_dev.dv_xname);
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goto bad;
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}
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state |= 2;
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m = malloc(sizeof(struct bba_mem), mtype, flags | M_CANFAIL);
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if (m == NULL)
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goto bad;
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m->addr = seg.ds_addr;
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m->size = seg.ds_len;
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m->kva = kva;
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m->next = sc->sc_mem_head;
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sc->sc_mem_head = m;
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return (void *)kva;
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bad:
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if (state & 2)
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bus_dmamem_unmap(sc->sc_dmat, kva, size);
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if (state & 1)
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bus_dmamem_free(sc->sc_dmat, &seg, 1);
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return NULL;
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}
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void
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bba_freem(void *v, void *ptr, int mtype)
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{
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struct bba_softc *sc = v;
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struct bba_mem **mp, *m;
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bus_dma_segment_t seg;
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void *kva;
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kva = (void *)ptr;
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for (mp = &sc->sc_mem_head; *mp && (*mp)->kva != kva; mp = &(*mp)->next)
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continue;
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m = *mp;
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if (m == NULL) {
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printf("bba_freem: freeing unallocated memory\n");
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return;
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}
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*mp = m->next;
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bus_dmamem_unmap(sc->sc_dmat, kva, m->size);
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seg.ds_addr = m->addr;
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seg.ds_len = m->size;
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bus_dmamem_free(sc->sc_dmat, &seg, 1);
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free(m, mtype, 0);
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}
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size_t
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bba_round_buffersize(void *v, int direction, size_t size)
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{
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DPRINTF(("bba_round_buffersize: size=%zu\n", size));
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return size > BBA_DMABUF_SIZE ? BBA_DMABUF_SIZE :
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roundup(size, IOASIC_DMA_BLOCKSIZE);
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}
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int
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bba_halt_output(void *v)
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{
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struct bba_softc *sc = v;
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struct bba_dma_state *d;
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uint32_t ssr;
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mtx_enter(&audio_lock);
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d = &sc->sc_tx_dma_state;
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/* disable any DMA */
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ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR);
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ssr &= ~IOASIC_CSR_DMAEN_ISDN_T;
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bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
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bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_DMAPTR, 0);
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bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_NEXTPTR, 0);
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mtx_leave(&audio_lock);
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if (d->active) {
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bus_dmamap_sync(sc->sc_dmat, d->dmam, 0, d->size,
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BUS_DMASYNC_POSTWRITE);
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bus_dmamap_unload(sc->sc_dmat, d->dmam);
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bus_dmamap_destroy(sc->sc_dmat, d->dmam);
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d->active = 0;
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}
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return 0;
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}
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int
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bba_halt_input(void *v)
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{
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struct bba_softc *sc = v;
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struct bba_dma_state *d;
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uint32_t ssr;
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mtx_enter(&audio_lock);
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d = &sc->sc_rx_dma_state;
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/* disable any DMA */
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ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR);
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ssr &= ~IOASIC_CSR_DMAEN_ISDN_R;
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bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
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bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_DMAPTR, 0);
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bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_NEXTPTR, 0);
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mtx_leave(&audio_lock);
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if (d->active) {
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bus_dmamap_sync(sc->sc_dmat, d->dmam, 0, d->size,
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BUS_DMASYNC_POSTREAD);
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bus_dmamap_unload(sc->sc_dmat, d->dmam);
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bus_dmamap_destroy(sc->sc_dmat, d->dmam);
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d->active = 0;
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}
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return 0;
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}
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int
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bba_trigger_output(void *v, void *start, void *end, int blksize,
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void (*intr)(void *), void *arg, struct audio_params *param)
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{
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struct bba_softc *sc = v;
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struct bba_dma_state *d;
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uint32_t ssr;
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tc_addr_t phys, nphys;
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int state;
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DPRINTF(("bba_trigger_output: sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n",
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sc, start, end, blksize, intr, arg));
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d = &sc->sc_tx_dma_state;
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state = 0;
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/* disable any DMA */
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ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR);
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ssr &= ~IOASIC_CSR_DMAEN_ISDN_T;
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bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
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d->size = (vaddr_t)end - (vaddr_t)start;
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if (bus_dmamap_create(sc->sc_dmat, d->size,
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BBA_MAX_DMA_SEGMENTS, IOASIC_DMA_BLOCKSIZE,
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BBA_DMABUF_BOUNDARY, BUS_DMA_NOWAIT, &d->dmam)) {
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printf("bba_trigger_output: can't create DMA map\n");
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goto bad;
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}
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state |= 1;
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if (bus_dmamap_load(sc->sc_dmat, d->dmam, start, d->size, NULL,
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BUS_DMA_WRITE | BUS_DMA_NOWAIT)) {
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printf("bba_trigger_output: can't load DMA map\n");
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goto bad;
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}
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bus_dmamap_sync(sc->sc_dmat, d->dmam, 0, d->size, BUS_DMASYNC_PREWRITE);
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state |= 2;
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d->intr = intr;
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d->intr_arg = arg;
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d->curseg = 1;
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/* get physical address of buffer start */
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phys = (tc_addr_t)d->dmam->dm_segs[0].ds_addr;
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nphys = (tc_addr_t)d->dmam->dm_segs[1 % d->dmam->dm_nsegs].ds_addr;
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/* setup DMA pointer */
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bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_DMAPTR,
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IOASIC_DMA_ADDR(phys));
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bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_NEXTPTR,
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IOASIC_DMA_ADDR(nphys));
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/* kick off DMA */
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mtx_enter(&audio_lock);
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ssr |= IOASIC_CSR_DMAEN_ISDN_T;
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bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
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|
|
d->active = 1;
|
|
mtx_leave(&audio_lock);
|
|
return 0;
|
|
|
|
bad:
|
|
if (state & 2)
|
|
bus_dmamap_unload(sc->sc_dmat, d->dmam);
|
|
if (state & 1)
|
|
bus_dmamap_destroy(sc->sc_dmat, d->dmam);
|
|
return 1;
|
|
}
|
|
|
|
int
|
|
bba_trigger_input(void *v, void *start, void *end, int blksize,
|
|
void (*intr)(void *), void *arg, struct audio_params *param)
|
|
{
|
|
struct bba_softc *sc = v;
|
|
struct bba_dma_state *d;
|
|
uint32_t ssr;
|
|
tc_addr_t phys, nphys;
|
|
int state;
|
|
|
|
DPRINTF(("bba_trigger_input: sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n",
|
|
sc, start, end, blksize, intr, arg));
|
|
d = &sc->sc_rx_dma_state;
|
|
state = 0;
|
|
|
|
/* disable any DMA */
|
|
ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR);
|
|
ssr &= ~IOASIC_CSR_DMAEN_ISDN_R;
|
|
bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
|
|
|
|
d->size = (vaddr_t)end - (vaddr_t)start;
|
|
if (bus_dmamap_create(sc->sc_dmat, d->size,
|
|
BBA_MAX_DMA_SEGMENTS, IOASIC_DMA_BLOCKSIZE,
|
|
BBA_DMABUF_BOUNDARY, BUS_DMA_NOWAIT, &d->dmam)) {
|
|
printf("bba_trigger_input: can't create DMA map\n");
|
|
goto bad;
|
|
}
|
|
state |= 1;
|
|
|
|
if (bus_dmamap_load(sc->sc_dmat, d->dmam, start, d->size, NULL,
|
|
BUS_DMA_READ | BUS_DMA_NOWAIT)) {
|
|
printf("bba_trigger_input: can't load DMA map\n");
|
|
goto bad;
|
|
}
|
|
bus_dmamap_sync(sc->sc_dmat, d->dmam, 0, d->size, BUS_DMASYNC_PREREAD);
|
|
state |= 2;
|
|
|
|
d->intr = intr;
|
|
d->intr_arg = arg;
|
|
d->curseg = 1;
|
|
|
|
/* get physical address of buffer start */
|
|
phys = (tc_addr_t)d->dmam->dm_segs[0].ds_addr;
|
|
nphys = (tc_addr_t)d->dmam->dm_segs[1 % d->dmam->dm_nsegs].ds_addr;
|
|
|
|
/* setup DMA pointer */
|
|
bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_DMAPTR,
|
|
IOASIC_DMA_ADDR(phys));
|
|
bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_NEXTPTR,
|
|
IOASIC_DMA_ADDR(nphys));
|
|
|
|
/* kick off DMA */
|
|
mtx_enter(&audio_lock);
|
|
ssr |= IOASIC_CSR_DMAEN_ISDN_R;
|
|
bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
|
|
|
|
d->active = 1;
|
|
mtx_leave(&audio_lock);
|
|
return 0;
|
|
|
|
bad:
|
|
if (state & 2)
|
|
bus_dmamap_unload(sc->sc_dmat, d->dmam);
|
|
if (state & 1)
|
|
bus_dmamap_destroy(sc->sc_dmat, d->dmam);
|
|
return 1;
|
|
}
|
|
|
|
int
|
|
bba_intr(void *v)
|
|
{
|
|
struct bba_softc *sc = v;
|
|
struct bba_dma_state *d;
|
|
tc_addr_t nphys;
|
|
int mask;
|
|
|
|
mtx_enter(&audio_lock);
|
|
|
|
mask = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_INTR);
|
|
|
|
if (mask & IOASIC_INTR_ISDN_TXLOAD) {
|
|
d = &sc->sc_tx_dma_state;
|
|
d->curseg = (d->curseg+1) % d->dmam->dm_nsegs;
|
|
nphys = (tc_addr_t)d->dmam->dm_segs[d->curseg].ds_addr;
|
|
bus_space_write_4(sc->sc_bst, sc->sc_bsh,
|
|
IOASIC_ISDN_X_NEXTPTR, IOASIC_DMA_ADDR(nphys));
|
|
if (d->intr != NULL)
|
|
(*d->intr)(d->intr_arg);
|
|
}
|
|
if (mask & IOASIC_INTR_ISDN_RXLOAD) {
|
|
d = &sc->sc_rx_dma_state;
|
|
d->curseg = (d->curseg+1) % d->dmam->dm_nsegs;
|
|
nphys = (tc_addr_t)d->dmam->dm_segs[d->curseg].ds_addr;
|
|
bus_space_write_4(sc->sc_bst, sc->sc_bsh,
|
|
IOASIC_ISDN_R_NEXTPTR, IOASIC_DMA_ADDR(nphys));
|
|
if (d->intr != NULL)
|
|
(*d->intr)(d->intr_arg);
|
|
}
|
|
|
|
mtx_leave(&audio_lock);
|
|
|
|
return 0;
|
|
}
|
|
|
|
int
|
|
bba_round_blocksize(void *v, int blk)
|
|
{
|
|
return IOASIC_DMA_BLOCKSIZE;
|
|
}
|
|
|
|
|
|
/* indirect write */
|
|
void
|
|
bba_codec_iwrite(struct am7930_softc *sc, int reg, uint8_t val)
|
|
{
|
|
DPRINTF(("bba_codec_iwrite(): sc=%p, reg=%02x, val=%02x\n", sc, reg, val));
|
|
bba_codec_dwrite(sc, AM7930_DREG_CR, reg);
|
|
bba_codec_dwrite(sc, AM7930_DREG_DR, val);
|
|
}
|
|
|
|
|
|
void
|
|
bba_codec_iwrite16(struct am7930_softc *sc, int reg, uint16_t val)
|
|
{
|
|
DPRINTF(("bba_codec_iwrite16(): sc=%p, reg=%02x, val=%04x\n", sc, reg, val));
|
|
bba_codec_dwrite(sc, AM7930_DREG_CR, reg);
|
|
bba_codec_dwrite(sc, AM7930_DREG_DR, val);
|
|
bba_codec_dwrite(sc, AM7930_DREG_DR, val >> 8);
|
|
}
|
|
|
|
|
|
/* indirect read */
|
|
uint8_t
|
|
bba_codec_iread(struct am7930_softc *sc, int reg)
|
|
{
|
|
uint8_t val;
|
|
|
|
DPRINTF(("bba_codec_iread(): sc=%p, reg=%02x\n", sc, reg));
|
|
bba_codec_dwrite(sc, AM7930_DREG_CR, reg);
|
|
val = bba_codec_dread(sc, AM7930_DREG_DR);
|
|
|
|
DPRINTF(("read 0x%02x (%d)\n", val, val));
|
|
|
|
return val;
|
|
}
|
|
|
|
uint16_t
|
|
bba_codec_iread16(struct am7930_softc *sc, int reg)
|
|
{
|
|
uint16_t val;
|
|
|
|
DPRINTF(("bba_codec_iread16(): sc=%p, reg=%02x\n", sc, reg));
|
|
bba_codec_dwrite(sc, AM7930_DREG_CR, reg);
|
|
val = bba_codec_dread(sc, AM7930_DREG_DR);
|
|
val |= bba_codec_dread(sc, AM7930_DREG_DR) << 8;
|
|
|
|
return val;
|
|
}
|
|
|
|
|
|
/* direct write */
|
|
void
|
|
bba_codec_dwrite(struct am7930_softc *asc, int reg, uint8_t val)
|
|
{
|
|
struct bba_softc *sc = (struct bba_softc *)asc;
|
|
|
|
#if defined(__alpha__)
|
|
bus_space_write_4(sc->sc_bst, sc->sc_codec_bsh, reg << 2, val << 8);
|
|
#else
|
|
bus_space_write_4(sc->sc_bst, sc->sc_codec_bsh, reg << 6, val);
|
|
#endif
|
|
}
|
|
|
|
/* direct read */
|
|
uint8_t
|
|
bba_codec_dread(struct am7930_softc *asc, int reg)
|
|
{
|
|
struct bba_softc *sc = (struct bba_softc *)asc;
|
|
|
|
#if defined(__alpha__)
|
|
return (bus_space_read_4(sc->sc_bst, sc->sc_codec_bsh, reg << 2) >> 8) &
|
|
0xff;
|
|
#else
|
|
return bus_space_read_4(sc->sc_bst, sc->sc_codec_bsh, reg << 6) & 0xff;
|
|
#endif
|
|
}
|