288 lines
7.7 KiB
C
288 lines
7.7 KiB
C
/* $OpenBSD: if_ix.h,v 1.48 2024/10/04 05:22:10 yasuoka Exp $ */
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/******************************************************************************
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Copyright (c) 2001-2012, Intel Corporation
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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3. Neither the name of the Intel Corporation nor the names of its
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contributors may be used to endorse or promote products derived from
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this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
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******************************************************************************/
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/*$FreeBSD: src/sys/dev/ixgbe/ixgbe.h,v 1.38 2012/12/20 22:29:29 svnexp Exp $*/
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#ifndef _IX_H_
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#define _IX_H_
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#include <dev/pci/ixgbe.h>
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/* Tunables */
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/*
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* TxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the
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* number of transmit descriptors allocated by the driver. Increasing this
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* value allows the driver to queue more transmits. Each descriptor is 16
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* bytes. Performance tests have show the 2K value to be optimal for top
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* performance.
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*/
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#define DEFAULT_TXD 256
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#define PERFORM_TXD 2048
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#define MAX_TXD 4096
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#define MIN_TXD 64
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/*
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* RxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the
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* number of receive descriptors allocated for each RX queue. Increasing this
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* value allows the driver to buffer more incoming packets. Each descriptor
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* is 16 bytes. A receive buffer is also allocated for each descriptor.
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*
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* Note: with 8 rings and a dual port card, it is possible to bump up
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* against the system mbuf pool limit, you can tune nmbclusters
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* to adjust for this.
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*/
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#define DEFAULT_RXD 256
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#define PERFORM_RXD 2048
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#define MAX_RXD 4096
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#define MIN_RXD 64
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/* Alignment for rings */
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#define DBA_ALIGN 128
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/*
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* This parameter controls the duration of transmit watchdog timer.
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*/
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#define IXGBE_TX_TIMEOUT 5 /* set to 5 seconds */
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/*
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* This parameter controls the minimum number of available transmit
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* descriptors needed before we attempt transmission of a packet.
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*/
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#define IXGBE_TX_OP_THRESHOLD (sc->num_segs + 2)
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#define IXGBE_MAX_FRAME_SIZE 9216
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/* Flow control constants */
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#define IXGBE_FC_PAUSE 0xFFFF
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#define IXGBE_FC_HI 0x20000
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#define IXGBE_FC_LO 0x10000
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/* Defines for printing debug information */
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#define DEBUG_INIT 0
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#define DEBUG_IOCTL 0
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#define DEBUG_HW 0
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#define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n")
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#define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A)
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#define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B)
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#define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n")
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#define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A)
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#define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B)
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#define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n")
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#define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A)
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#define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B)
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#define MAX_NUM_MULTICAST_ADDRESSES 128
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#define IXGBE_82598_SCATTER 100
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#define IXGBE_82599_SCATTER 32
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#define MSIX_82598_BAR 3
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#define MSIX_82599_BAR 4
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#define IXGBE_TSO_SIZE 262140
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#define IXGBE_TX_BUFFER_SIZE ((uint32_t) 1514)
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#define IXGBE_RX_HDR 128
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#define IXGBE_VFTA_SIZE 128
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#define IXGBE_BR_SIZE 4096
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#define IXGBE_QUEUE_MIN_FREE 32
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/*
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* Interrupt Moderation parameters
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*/
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#define IXGBE_INTS_PER_SEC 8000
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#define IXGBE_LINK_ITR 1000
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struct ixgbe_tx_buf {
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uint32_t eop_index;
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struct mbuf *m_head;
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bus_dmamap_t map;
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};
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struct ixgbe_rx_buf {
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struct mbuf *buf;
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struct mbuf *fmp;
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bus_dmamap_t map;
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};
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/*
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* Bus dma allocation structure used by ixgbe_dma_malloc and ixgbe_dma_free.
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*/
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struct ixgbe_dma_alloc {
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caddr_t dma_vaddr;
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bus_dma_tag_t dma_tag;
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bus_dmamap_t dma_map;
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bus_dma_segment_t dma_seg;
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bus_size_t dma_size;
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int dma_nseg;
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};
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/*
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* Driver queue struct: this is the interrupt container
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* for the associated tx and rx ring.
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*/
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struct ix_queue {
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struct ix_softc *sc;
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uint32_t msix; /* This queue's MSIX vector */
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uint32_t eims; /* This queue's EIMS bit */
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uint32_t eitr_setting;
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char name[8];
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pci_intr_handle_t ih;
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void *tag;
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struct ix_txring *txr;
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struct ix_rxring *rxr;
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};
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/*
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* The transmit ring, one per tx queue
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*/
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struct ix_txring {
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struct ix_softc *sc;
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struct ifqueue *ifq;
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uint32_t me;
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uint32_t tail;
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uint32_t watchdog_timer;
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union ixgbe_adv_tx_desc *tx_base;
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struct ixgbe_tx_buf *tx_buffers;
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struct ixgbe_dma_alloc txdma;
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uint32_t next_avail_desc;
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uint32_t next_to_clean;
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enum {
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IXGBE_QUEUE_IDLE,
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IXGBE_QUEUE_WORKING,
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IXGBE_QUEUE_HUNG,
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} queue_status;
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uint32_t txd_cmd;
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bus_dma_tag_t txtag;
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struct kstat *kstat;
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};
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/*
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* The Receive ring, one per rx queue
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*/
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struct ix_rxring {
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struct ix_softc *sc;
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struct ifiqueue *ifiq;
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uint32_t me;
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uint32_t tail;
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union ixgbe_adv_rx_desc *rx_base;
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struct ixgbe_dma_alloc rxdma;
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#if 0
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struct lro_ctrl lro;
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#endif
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bool lro_enabled;
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bool hw_rsc;
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bool discard;
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uint next_to_refresh;
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uint next_to_check;
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uint last_desc_filled;
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struct timeout rx_refill;
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struct if_rxring rx_ring;
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struct ixgbe_rx_buf *rx_buffers;
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struct kstat *kstat;
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};
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/* Our adapter structure */
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struct ix_softc {
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struct device dev;
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struct arpcom arpcom;
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struct ixgbe_hw hw;
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struct ixgbe_osdep osdep;
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void *tag;
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struct ifmedia media;
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struct intrmap *sc_intrmap;
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int if_flags;
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uint16_t num_vlans;
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uint16_t num_queues;
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/*
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* Shadow VFTA table, this is needed because
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* the real vlan filter table gets cleared during
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* a soft reset and the driver needs to be able
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* to repopulate it.
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*/
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uint32_t shadow_vfta[IXGBE_VFTA_SIZE];
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/* Info about the interface */
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uint64_t phy_layer;
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uint32_t fc; /* local flow ctrl setting */
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uint16_t max_frame_size;
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uint16_t num_segs;
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uint32_t link_speed;
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bool link_up;
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bool link_enabled;
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uint32_t linkvec;
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struct rwlock sfflock;
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/* Mbuf cluster size */
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uint32_t rx_mbuf_sz;
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/*
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* Queues:
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* This is the irq holder, it has
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* and RX/TX pair or rings associated
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* with it.
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*/
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struct ix_queue *queues;
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/*
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* Transmit rings:
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* Allocated at run time, an array of rings.
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*/
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struct ix_txring *tx_rings;
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int num_tx_desc;
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/*
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* Receive rings:
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* Allocated at run time, an array of rings.
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*/
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struct ix_rxring *rx_rings;
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uint64_t que_mask;
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int num_rx_desc;
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/* Multicast array memory */
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uint8_t *mta;
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/* Misc stats maintained by the driver */
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struct mutex sc_kstat_mtx;
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struct timeout sc_kstat_tmo;
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struct kstat *sc_kstat;
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};
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#endif /* _IX_H_ */
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