621 lines
13 KiB
C
621 lines
13 KiB
C
/* $OpenBSD: amluart.c,v 1.4 2022/07/15 17:14:49 kettenis Exp $ */
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/*
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* Copyright (c) 2019 Mark Kettenis <kettenis@openbsd.org>
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*
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* Permission to use, copy, modify, and distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#include <sys/param.h>
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#include <sys/conf.h>
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#include <sys/fcntl.h>
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#include <sys/proc.h>
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#include <sys/systm.h>
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#include <sys/tty.h>
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#include <machine/bus.h>
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#include <machine/fdt.h>
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#include <dev/cons.h>
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#include <dev/ofw/fdt.h>
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#include <dev/ofw/openfirm.h>
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#define UART_WFIFO 0x0000
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#define UART_RFIFO 0x0004
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#define UART_CONTROL 0x0008
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#define UART_CONTROL_TX_INT (1 << 28)
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#define UART_CONTROL_RX_INT (1 << 27)
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#define UART_CONTROL_CLEAR_ERROR (1 << 24)
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#define UART_STATUS 0x000c
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#define UART_STATUS_RX_FIFO_OVERFLOW (1 << 24)
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#define UART_STATUS_TX_FIFO_FULL (1 << 21)
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#define UART_STATUS_RX_FIFO_EMPTY (1 << 20)
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#define UART_STATUS_FRAME_ERROR (1 << 17)
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#define UART_STATUS_PARITY_ERROR (1 << 16)
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#define UART_STATUS_ERROR (1 << 24 | 0x7 << 16)
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#define UART_MISC 0x0010
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#define UART_MISC_TX_INT_CNT_MASK (0xff << 16)
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#define UART_MISC_TX_INT_CNT_SHIFT 16
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#define UART_MISC_RX_INT_CNT_MASK (0xff << 0)
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#define UART_MISC_RX_INT_CNT_SHIFT 0
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#define UART_SPACE 24
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#define HREAD4(sc, reg) \
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(bus_space_read_4((sc)->sc_iot, (sc)->sc_ioh, (reg)))
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#define HWRITE4(sc, reg, val) \
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bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, (reg), (val))
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#define HSET4(sc, reg, bits) \
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HWRITE4((sc), (reg), HREAD4((sc), (reg)) | (bits))
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#define HCLR4(sc, reg, bits) \
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HWRITE4((sc), (reg), HREAD4((sc), (reg)) & ~(bits))
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cdev_decl(com);
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cdev_decl(amluart);
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#define DEVUNIT(x) (minor(x) & 0x7f)
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#define DEVCUA(x) (minor(x) & 0x80)
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struct cdevsw amluartdev = cdev_tty_init(3, amluart);
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struct amluart_softc {
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struct device sc_dev;
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bus_space_tag_t sc_iot;
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bus_space_handle_t sc_ioh;
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struct soft_intrhand *sc_si;
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void *sc_ih;
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struct tty *sc_tty;
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int sc_conspeed;
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int sc_floods;
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int sc_overflows;
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int sc_halt;
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int sc_cua;
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int *sc_ibuf, *sc_ibufp, *sc_ibufhigh, *sc_ibufend;
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#define AMLUART_IBUFSIZE 128
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#define AMLUART_IHIGHWATER 100
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int sc_ibufs[2][AMLUART_IBUFSIZE];
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};
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int amluart_match(struct device *, void *, void *);
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void amluart_attach(struct device *, struct device *, void *);
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struct cfdriver amluart_cd = {
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NULL, "amluart", DV_TTY
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};
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const struct cfattach amluart_ca = {
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sizeof(struct amluart_softc), amluart_match, amluart_attach
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};
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bus_space_tag_t amluartconsiot;
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bus_space_handle_t amluartconsioh;
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struct amluart_softc *amluart_sc(dev_t);
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int amluart_intr(void *);
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void amluart_softintr(void *);
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void amluart_start(struct tty *);
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int amluartcnattach(bus_space_tag_t, bus_addr_t);
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int amluartcngetc(dev_t);
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void amluartcnputc(dev_t, int);
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void amluartcnpollc(dev_t, int);
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void
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amluart_init_cons(void)
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{
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struct fdt_reg reg;
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void *node;
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if ((node = fdt_find_cons("amlogic,meson-gx-uart")) == NULL)
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return;
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if (fdt_get_reg(node, 0, ®))
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return;
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amluartcnattach(fdt_cons_bs_tag, reg.addr);
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}
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int
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amluart_match(struct device *parent, void *match, void *aux)
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{
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struct fdt_attach_args *faa = aux;
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return OF_is_compatible(faa->fa_node, "amlogic,meson-gx-uart");
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}
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void
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amluart_attach(struct device *parent, struct device *self, void *aux)
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{
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struct amluart_softc *sc = (struct amluart_softc *)self;
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struct fdt_attach_args *faa = aux;
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uint32_t reg;
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int maj;
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if (faa->fa_nreg < 1) {
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printf(": no registers\n");
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return;
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}
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sc->sc_iot = faa->fa_iot;
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if (bus_space_map(sc->sc_iot, faa->fa_reg[0].addr,
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faa->fa_reg[0].size, 0, &sc->sc_ioh)) {
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printf(": can't map registers\n");
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return;
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}
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if (faa->fa_node == stdout_node) {
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/* Locate the major number. */
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for (maj = 0; maj < nchrdev; maj++)
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if (cdevsw[maj].d_open == amluartopen)
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break;
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cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit);
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sc->sc_conspeed = stdout_speed;
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printf(": console");
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}
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sc->sc_si = softintr_establish(IPL_TTY, amluart_softintr, sc);
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if (sc->sc_si == NULL) {
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printf(": can't establish soft interrupt\n");
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return;
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}
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sc->sc_ih = fdt_intr_establish_idx(faa->fa_node, 0, IPL_TTY,
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amluart_intr, sc, sc->sc_dev.dv_xname);
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if (sc->sc_ih == NULL) {
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printf(": can't establish hard interrupt\n");
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return;
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}
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printf("\n");
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/*
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* Generate interrupts if the Tx FIFO is half-empty or if
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* there is anything in the Rx FIFO.
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*/
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reg = HREAD4(sc, UART_MISC);
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reg &= ~UART_MISC_TX_INT_CNT_MASK;
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reg |= (32 << UART_MISC_TX_INT_CNT_SHIFT);
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reg &= ~UART_MISC_RX_INT_CNT_MASK;
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reg |= (1 << UART_MISC_RX_INT_CNT_SHIFT);
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HWRITE4(sc, UART_MISC, reg);
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}
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int
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amluart_intr(void *arg)
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{
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struct amluart_softc *sc = arg;
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struct tty *tp = sc->sc_tty;
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int *p;
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u_int32_t stat;
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u_char c;
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int handled = 0;
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if (tp == NULL)
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return 0;
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stat = HREAD4(sc, UART_STATUS);
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if (!ISSET(stat, UART_STATUS_TX_FIFO_FULL) &&
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ISSET(tp->t_state, TS_BUSY)) {
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CLR(tp->t_state, TS_BUSY | TS_FLUSH);
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if (sc->sc_halt > 0)
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wakeup(&tp->t_outq);
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(*linesw[tp->t_line].l_start)(tp);
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handled = 1;
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}
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p = sc->sc_ibufp;
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while (!ISSET(stat, UART_STATUS_RX_FIFO_EMPTY)) {
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c = HREAD4(sc, UART_RFIFO);
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if (ISSET(stat, UART_STATUS_FRAME_ERROR))
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c |= TTY_FE;
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if (ISSET(stat, UART_STATUS_PARITY_ERROR))
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c |= TTY_PE;
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if (ISSET(stat, UART_STATUS_RX_FIFO_OVERFLOW))
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sc->sc_overflows++;
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if (p >= sc->sc_ibufend)
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sc->sc_floods++;
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else
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*p++ = c;
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if (stat & UART_STATUS_ERROR)
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HSET4(sc, UART_CONTROL, UART_CONTROL_CLEAR_ERROR);
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stat = HREAD4(sc, UART_STATUS);
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handled = 1;
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}
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if (sc->sc_ibufp != p) {
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sc->sc_ibufp = p;
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softintr_schedule(sc->sc_si);
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}
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return handled;
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}
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void
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amluart_softintr(void *arg)
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{
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struct amluart_softc *sc = arg;
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struct tty *tp = sc->sc_tty;
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int *ibufp, *ibufend;
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int s;
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if (sc->sc_ibufp == sc->sc_ibuf)
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return;
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s = spltty();
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ibufp = sc->sc_ibuf;
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ibufend = sc->sc_ibufp;
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if (ibufp == ibufend) {
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splx(s);
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return;
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}
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sc->sc_ibufp = sc->sc_ibuf = (ibufp == sc->sc_ibufs[0]) ?
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sc->sc_ibufs[1] : sc->sc_ibufs[0];
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sc->sc_ibufhigh = sc->sc_ibuf + AMLUART_IHIGHWATER;
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sc->sc_ibufend = sc->sc_ibuf + AMLUART_IBUFSIZE;
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if (tp == NULL || !ISSET(tp->t_state, TS_ISOPEN)) {
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splx(s);
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return;
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}
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splx(s);
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while (ibufp < ibufend) {
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int i = *ibufp++;
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#ifdef DDB
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if (tp->t_dev == cn_tab->cn_dev) {
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int j = db_rint(i);
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if (j == 1) /* Escape received, skip */
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continue;
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if (j == 2) /* Second char wasn't 'D' */
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(*linesw[tp->t_line].l_rint)(27, tp);
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}
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#endif
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(*linesw[tp->t_line].l_rint)(i, tp);
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}
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}
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int
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amluart_param(struct tty *tp, struct termios *t)
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{
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struct amluart_softc *sc = amluart_sc(tp->t_dev);
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int ospeed = t->c_ospeed;
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/* Check requested parameters. */
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if (ospeed < 0 || (t->c_ispeed && t->c_ispeed != t->c_ospeed))
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return EINVAL;
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switch (ISSET(t->c_cflag, CSIZE)) {
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case CS5:
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case CS6:
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case CS7:
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return EINVAL;
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case CS8:
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break;
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}
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if (ospeed != 0) {
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while (ISSET(tp->t_state, TS_BUSY)) {
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int error;
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sc->sc_halt++;
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error = ttysleep(tp, &tp->t_outq,
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TTOPRI | PCATCH, "amluprm");
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sc->sc_halt--;
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if (error) {
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amluart_start(tp);
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return error;
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}
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}
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}
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tp->t_ispeed = t->c_ispeed;
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tp->t_ospeed = t->c_ospeed;
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tp->t_cflag = t->c_cflag;
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/* Just to be sure... */
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amluart_start(tp);
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return 0;
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}
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void
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amluart_start(struct tty *tp)
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{
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struct amluart_softc *sc = amluart_sc(tp->t_dev);
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int stat;
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int s;
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s = spltty();
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if (ISSET(tp->t_state, TS_BUSY))
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goto out;
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if (ISSET(tp->t_state, TS_TIMEOUT | TS_TTSTOP) || sc->sc_halt > 0)
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goto out;
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ttwakeupwr(tp);
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if (tp->t_outq.c_cc == 0)
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goto out;
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SET(tp->t_state, TS_BUSY);
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stat = HREAD4(sc, UART_STATUS);
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while ((stat & UART_STATUS_TX_FIFO_FULL) == 0) {
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HWRITE4(sc, UART_WFIFO, getc(&tp->t_outq));
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stat = HREAD4(sc, UART_STATUS);
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}
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out:
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splx(s);
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}
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int
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amluartopen(dev_t dev, int flag, int mode, struct proc *p)
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{
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struct amluart_softc *sc = amluart_sc(dev);
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struct tty *tp;
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int error;
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int s;
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if (sc == NULL)
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return ENXIO;
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s = spltty();
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if (sc->sc_tty == NULL)
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tp = sc->sc_tty = ttymalloc(0);
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else
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tp = sc->sc_tty;
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splx(s);
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tp->t_oproc = amluart_start;
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tp->t_param = amluart_param;
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tp->t_dev = dev;
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if (!ISSET(tp->t_state, TS_ISOPEN)) {
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SET(tp->t_state, TS_WOPEN);
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ttychars(tp);
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tp->t_iflag = TTYDEF_IFLAG;
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tp->t_oflag = TTYDEF_OFLAG;
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tp->t_cflag = TTYDEF_CFLAG;
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tp->t_lflag = TTYDEF_LFLAG;
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tp->t_ispeed = tp->t_ospeed =
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sc->sc_conspeed ? sc->sc_conspeed : B115200;
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s = spltty();
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amluart_param(tp, &tp->t_termios);
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ttsetwater(tp);
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sc->sc_ibufp = sc->sc_ibuf = sc->sc_ibufs[0];
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sc->sc_ibufhigh = sc->sc_ibuf + AMLUART_IHIGHWATER;
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sc->sc_ibufend = sc->sc_ibuf + AMLUART_IBUFSIZE;
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/* Enable interrupts */
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HSET4(sc, UART_CONTROL,
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UART_CONTROL_TX_INT | UART_CONTROL_RX_INT);
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/* No carrier detect support. */
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SET(tp->t_state, TS_CARR_ON);
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} else if (ISSET(tp->t_state, TS_XCLUDE) && suser(p) != 0)
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return EBUSY;
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else
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s = spltty();
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if (DEVCUA(dev)) {
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if (ISSET(tp->t_state, TS_ISOPEN)) {
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/* Ah, but someone already is dialed in... */
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splx(s);
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return EBUSY;
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}
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sc->sc_cua = 1; /* We go into CUA mode. */
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} else {
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if (ISSET(flag, O_NONBLOCK) && sc->sc_cua) {
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/* Opening TTY non-blocking... but the CUA is busy. */
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splx(s);
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return EBUSY;
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} else {
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while (sc->sc_cua) {
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SET(tp->t_state, TS_WOPEN);
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error = ttysleep(tp, &tp->t_rawq,
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TTIPRI | PCATCH, ttopen);
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/*
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* If TS_WOPEN has been reset, that means the
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* cua device has been closed.
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* We don't want to fail in that case,
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* so just go around again.
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*/
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if (error && ISSET(tp->t_state, TS_WOPEN)) {
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CLR(tp->t_state, TS_WOPEN);
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splx(s);
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return error;
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}
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}
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}
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}
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splx(s);
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return (*linesw[tp->t_line].l_open)(dev, tp, p);
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}
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int
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amluartclose(dev_t dev, int flag, int mode, struct proc *p)
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{
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struct amluart_softc *sc = amluart_sc(dev);
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struct tty *tp = sc->sc_tty;
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int s;
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if (!ISSET(tp->t_state, TS_ISOPEN))
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return 0;
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(*linesw[tp->t_line].l_close)(tp, flag, p);
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s = spltty();
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if (!ISSET(tp->t_state, TS_WOPEN)) {
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/* Disable interrupts */
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HCLR4(sc, UART_CONTROL,
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UART_CONTROL_TX_INT | UART_CONTROL_RX_INT);
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}
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CLR(tp->t_state, TS_BUSY | TS_FLUSH);
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sc->sc_cua = 0;
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splx(s);
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ttyclose(tp);
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return 0;
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}
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int
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amluartread(dev_t dev, struct uio *uio, int flag)
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{
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struct tty *tp = amluarttty(dev);
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if (tp == NULL)
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return ENODEV;
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return (*linesw[tp->t_line].l_read)(tp, uio, flag);
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}
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int
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amluartwrite(dev_t dev, struct uio *uio, int flag)
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{
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struct tty *tp = amluarttty(dev);
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if (tp == NULL)
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return ENODEV;
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return (*linesw[tp->t_line].l_write)(tp, uio, flag);
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}
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int
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amluartioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p)
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{
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struct amluart_softc *sc = amluart_sc(dev);
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struct tty *tp;
|
|
int error;
|
|
|
|
if (sc == NULL)
|
|
return ENODEV;
|
|
|
|
tp = sc->sc_tty;
|
|
if (tp == NULL)
|
|
return ENXIO;
|
|
|
|
error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p);
|
|
if (error >= 0)
|
|
return error;
|
|
|
|
error = ttioctl(tp, cmd, data, flag, p);
|
|
if (error >= 0)
|
|
return error;
|
|
|
|
switch(cmd) {
|
|
case TIOCSBRK:
|
|
case TIOCCBRK:
|
|
case TIOCSDTR:
|
|
case TIOCCDTR:
|
|
case TIOCMSET:
|
|
case TIOCMBIS:
|
|
case TIOCMBIC:
|
|
case TIOCMGET:
|
|
case TIOCGFLAGS:
|
|
break;
|
|
case TIOCSFLAGS:
|
|
error = suser(p);
|
|
if (error != 0)
|
|
return EPERM;
|
|
break;
|
|
default:
|
|
return ENOTTY;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
int
|
|
amluartstop(struct tty *tp, int flag)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
struct tty *
|
|
amluarttty(dev_t dev)
|
|
{
|
|
struct amluart_softc *sc = amluart_sc(dev);
|
|
|
|
if (sc == NULL)
|
|
return NULL;
|
|
return sc->sc_tty;
|
|
}
|
|
|
|
struct amluart_softc *
|
|
amluart_sc(dev_t dev)
|
|
{
|
|
int unit = DEVUNIT(dev);
|
|
|
|
if (unit >= amluart_cd.cd_ndevs)
|
|
return NULL;
|
|
return (struct amluart_softc *)amluart_cd.cd_devs[unit];
|
|
}
|
|
|
|
int
|
|
amluartcnattach(bus_space_tag_t iot, bus_addr_t iobase)
|
|
{
|
|
static struct consdev amluartcons = {
|
|
NULL, NULL, amluartcngetc, amluartcnputc, amluartcnpollc, NULL,
|
|
NODEV, CN_MIDPRI
|
|
};
|
|
int maj;
|
|
|
|
amluartconsiot = iot;
|
|
if (bus_space_map(iot, iobase, UART_SPACE, 0, &amluartconsioh))
|
|
return ENOMEM;
|
|
|
|
/* Look for major of com(4) to replace. */
|
|
for (maj = 0; maj < nchrdev; maj++)
|
|
if (cdevsw[maj].d_open == comopen)
|
|
break;
|
|
if (maj == nchrdev)
|
|
return ENXIO;
|
|
|
|
cn_tab = &amluartcons;
|
|
cn_tab->cn_dev = makedev(maj, 0);
|
|
cdevsw[maj] = amluartdev; /* KLUDGE */
|
|
|
|
return 0;
|
|
}
|
|
|
|
int
|
|
amluartcngetc(dev_t dev)
|
|
{
|
|
uint8_t c;
|
|
|
|
while (bus_space_read_4(amluartconsiot, amluartconsioh, UART_STATUS) &
|
|
UART_STATUS_RX_FIFO_EMPTY)
|
|
CPU_BUSY_CYCLE();
|
|
c = bus_space_read_4(amluartconsiot, amluartconsioh, UART_RFIFO);
|
|
return c;
|
|
}
|
|
|
|
void
|
|
amluartcnputc(dev_t dev, int c)
|
|
{
|
|
while (bus_space_read_4(amluartconsiot, amluartconsioh, UART_STATUS) &
|
|
UART_STATUS_TX_FIFO_FULL)
|
|
CPU_BUSY_CYCLE();
|
|
bus_space_write_4(amluartconsiot, amluartconsioh, UART_WFIFO, c);
|
|
}
|
|
|
|
void
|
|
amluartcnpollc(dev_t dev, int on)
|
|
{
|
|
}
|