345 lines
9.3 KiB
C
345 lines
9.3 KiB
C
/* $OpenBSD: agp_amd.c,v 1.24 2024/05/24 06:02:53 jsg Exp $ */
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/* $NetBSD: agp_amd.c,v 1.6 2001/10/06 02:48:50 thorpej Exp $ */
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/*-
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* Copyright (c) 2000 Doug Rabson
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD: src/sys/pci/agp_amd.c,v 1.6 2001/07/05 21:28:46 jhb Exp $
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/malloc.h>
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#include <sys/device.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/agpvar.h>
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#include <dev/pci/agpreg.h>
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#include <dev/pci/pcidevs.h>
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#define READ2(off) bus_space_read_2(asc->iot, asc->ioh, off)
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#define READ4(off) bus_space_read_4(asc->iot, asc->ioh, off)
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#define WRITE2(off,v) bus_space_write_2(asc->iot, asc->ioh, off, v)
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#define WRITE4(off,v) bus_space_write_4(asc->iot, asc->ioh, off, v)
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struct agp_amd_gatt {
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bus_dmamap_t ag_dmamap;
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bus_dma_segment_t ag_dmaseg;
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int ag_nseg;
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u_int32_t ag_entries;
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u_int32_t *ag_vdir; /* virtual address of page dir */
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bus_addr_t ag_pdir; /* bus address of page dir */
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u_int32_t *ag_virtual; /* virtual address of gatt */
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bus_addr_t ag_physical; /* bus address of gatt */
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size_t ag_size;
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};
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struct agp_amd_softc {
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struct device dev;
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struct agp_softc *agpdev;
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struct agp_amd_gatt *gatt;
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pci_chipset_tag_t asc_pc;
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pcitag_t asc_tag;
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bus_space_handle_t ioh;
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bus_space_tag_t iot;
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bus_addr_t asc_apaddr;
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bus_size_t asc_apsize;
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pcireg_t asc_apctrl;
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pcireg_t asc_modectrl;
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u_int16_t asc_status;
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};
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void agp_amd_attach(struct device *, struct device *, void *);
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int agp_amd_activate(struct device *, int);
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void agp_amd_save(struct agp_amd_softc *);
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void agp_amd_restore(struct agp_amd_softc *);
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int agp_amd_probe(struct device *, void *, void *);
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bus_size_t agp_amd_get_aperture(void *);
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struct agp_amd_gatt *agp_amd_alloc_gatt(bus_dma_tag_t, bus_size_t);
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int agp_amd_set_aperture(void *, bus_size_t);
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void agp_amd_bind_page(void *, bus_size_t, paddr_t, int);
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void agp_amd_unbind_page(void *, bus_size_t);
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void agp_amd_flush_tlb(void *);
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const struct cfattach amdagp_ca = {
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sizeof(struct agp_amd_softc), agp_amd_probe, agp_amd_attach, NULL,
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agp_amd_activate
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};
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struct cfdriver amdagp_cd = {
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NULL, "amdagp", DV_DULL
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};
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const struct agp_methods agp_amd_methods = {
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agp_amd_bind_page,
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agp_amd_unbind_page,
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agp_amd_flush_tlb,
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};
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struct agp_amd_gatt *
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agp_amd_alloc_gatt(bus_dma_tag_t dmat, bus_size_t apsize)
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{
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bus_size_t entries = apsize >> AGP_PAGE_SHIFT;
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struct agp_amd_gatt *gatt;
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int i, npages;
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caddr_t vdir;
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gatt = malloc(sizeof(struct agp_amd_gatt), M_AGP, M_NOWAIT);
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if (!gatt)
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return (0);
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gatt->ag_size = AGP_PAGE_SIZE + entries * sizeof(u_int32_t);
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if (agp_alloc_dmamem(dmat, gatt->ag_size, &gatt->ag_dmamap,
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&gatt->ag_pdir, &gatt->ag_dmaseg) != 0) {
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printf("failed to allocate GATT\n");
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free(gatt, M_AGP, sizeof *gatt);
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return (NULL);
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}
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if (bus_dmamem_map(dmat, &gatt->ag_dmaseg, 1, gatt->ag_size,
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&vdir, BUS_DMA_NOWAIT) != 0) {
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printf("failed to map GATT\n");
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agp_free_dmamem(dmat, gatt->ag_size, gatt->ag_dmamap,
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&gatt->ag_dmaseg);
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free(gatt, M_AGP, sizeof *gatt);
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return (NULL);
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}
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gatt->ag_vdir = (u_int32_t *)vdir;
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gatt->ag_entries = entries;
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gatt->ag_virtual = (u_int32_t *)(vdir + AGP_PAGE_SIZE);
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gatt->ag_physical = gatt->ag_pdir + AGP_PAGE_SIZE;
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/*
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* Map the pages of the GATT into the page directory.
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*/
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npages = ((gatt->ag_size - 1) >> AGP_PAGE_SHIFT);
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for (i = 0; i < npages; i++)
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gatt->ag_vdir[i] = (gatt->ag_physical + i * AGP_PAGE_SIZE) | 1;
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/*
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* Make sure the chipset can see everything.
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*/
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agp_flush_cache();
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return (gatt);
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}
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int
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agp_amd_probe(struct device *parent, void *match, void *aux)
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{
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struct agp_attach_args *aa = aux;
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struct pci_attach_args *pa = aa->aa_pa;
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/* Must be a pchb */
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if (agpbus_probe(aa) == 1 && PCI_VENDOR(pa->pa_id) == PCI_VENDOR_AMD &&
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(PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_AMD_SC751_SC ||
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PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_AMD_761_PCHB ||
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PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_AMD_762_PCHB))
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return (1);
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return (0);
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}
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void
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agp_amd_attach(struct device *parent, struct device *self, void *aux)
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{
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struct agp_amd_softc *asc = (struct agp_amd_softc *)self;
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struct agp_attach_args *aa = aux;
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struct pci_attach_args *pa = aa->aa_pa;
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struct agp_amd_gatt *gatt;
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pcireg_t reg;
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int error;
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asc->asc_pc = pa->pa_pc;
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asc->asc_tag = pa->pa_tag;
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if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, AGP_APBASE,
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PCI_MAPREG_TYPE_MEM, &asc->asc_apaddr, NULL, NULL) != 0) {
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printf(": can't get aperture info\n");
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return;
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}
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error = pci_mapreg_map(pa, AGP_AMD751_REGISTERS,
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PCI_MAPREG_TYPE_MEM, 0, &asc->iot, &asc->ioh, NULL, NULL, 0);
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if (error != 0) {
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printf("can't map AGP registers\n");
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return;
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}
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asc->asc_apsize = agp_amd_get_aperture(asc);
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for (;;) {
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gatt = agp_amd_alloc_gatt(pa->pa_dmat, asc->asc_apsize);
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if (gatt != NULL)
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break;
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/*
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* almost certainly error allocating contiguous dma memory
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* so reduce aperture so that the gatt size reduces.
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*/
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asc->asc_apsize /= 2;
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if (agp_amd_set_aperture(asc, asc->asc_apsize)) {
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printf(": failed to set aperture\n");
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return;
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}
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}
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asc->gatt = gatt;
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/* Install the gatt. */
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WRITE4(AGP_AMD751_ATTBASE, gatt->ag_physical);
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/* Enable synchronisation between host and agp. */
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reg = pci_conf_read(asc->asc_pc, asc->asc_tag, AGP_AMD751_MODECTRL);
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reg &= ~0x00ff00ff;
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reg |= (AGP_AMD751_MODECTRL_SYNEN) | (AGP_AMD751_MODECTRL2_GPDCE << 16);
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pci_conf_write(asc->asc_pc, asc->asc_tag, AGP_AMD751_MODECTRL, reg);
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/* Enable the TLB and flush */
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WRITE2(AGP_AMD751_STATUS,
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READ2(AGP_AMD751_STATUS) | AGP_AMD751_STATUS_GCE);
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agp_amd_flush_tlb(asc);
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asc->agpdev = (struct agp_softc *)agp_attach_bus(pa, &agp_amd_methods,
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asc->asc_apaddr, asc->asc_apsize, &asc->dev);
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return;
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}
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int
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agp_amd_activate(struct device *arg, int act)
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{
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struct agp_amd_softc *asc = (struct agp_amd_softc *)arg;
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switch (act) {
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case DVACT_SUSPEND:
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agp_amd_save(asc);
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break;
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case DVACT_RESUME:
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agp_amd_restore(asc);
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break;
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}
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return (0);
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}
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void
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agp_amd_save(struct agp_amd_softc *asc)
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{
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asc->asc_apctrl = pci_conf_read(asc->asc_pc, asc->asc_tag,
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AGP_AMD751_APCTRL);
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asc->asc_modectrl = pci_conf_read(asc->asc_pc, asc->asc_tag,
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AGP_AMD751_MODECTRL);
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asc->asc_status = READ2(AGP_AMD751_STATUS);
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}
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void
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agp_amd_restore(struct agp_amd_softc *asc)
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{
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/* restore aperture size */
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pci_conf_write(asc->asc_pc, asc->asc_tag, AGP_AMD751_APCTRL,
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asc->asc_apctrl);
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/* Install the gatt. */
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WRITE4(AGP_AMD751_ATTBASE, asc->gatt->ag_physical);
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/* Reenable synchronisation between host and agp. */
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pci_conf_write(asc->asc_pc, asc->asc_tag, AGP_AMD751_MODECTRL,
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asc->asc_modectrl);
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/* Enable the TLB and flush */
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WRITE2(AGP_AMD751_STATUS, asc->asc_status);
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agp_amd_flush_tlb(asc);
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}
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bus_size_t
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agp_amd_get_aperture(void *sc)
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{
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struct agp_amd_softc *asc = sc;
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int vas;
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vas = (pci_conf_read(asc->asc_pc, asc->asc_tag,
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AGP_AMD751_APCTRL) & 0x06);
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vas >>= 1;
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/*
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* The aperture size is equal to 32M<<vas.
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*/
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return ((32 * 1024 * 1024) << vas);
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}
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int
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agp_amd_set_aperture(void *sc, bus_size_t aperture)
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{
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struct agp_amd_softc *asc = sc;
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int vas;
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pcireg_t reg;
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/*
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* Check for a power of two and make sure its within the
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* programmable range.
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*/
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if (aperture & (aperture - 1)
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|| aperture < 32*1024*1024
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|| aperture > 2U*1024*1024*1024)
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return (EINVAL);
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vas = ffs(aperture / 32*1024*1024) - 1;
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reg = pci_conf_read(asc->asc_pc, asc->asc_tag, AGP_AMD751_APCTRL);
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reg = (reg & ~0x06) | (vas << 1);
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pci_conf_write(asc->asc_pc, asc->asc_tag, AGP_AMD751_APCTRL, reg);
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return (0);
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}
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void
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agp_amd_bind_page(void *sc, bus_size_t offset, paddr_t physical, int flags)
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{
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struct agp_amd_softc *asc = sc;
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asc->gatt->ag_virtual[(offset - asc->asc_apaddr) >> AGP_PAGE_SHIFT] =
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physical | 1;
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}
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void
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agp_amd_unbind_page(void *sc, bus_size_t offset)
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{
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struct agp_amd_softc *asc = sc;
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asc->gatt->ag_virtual[(offset - asc->asc_apaddr) >> AGP_PAGE_SHIFT] = 0;
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}
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void
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agp_amd_flush_tlb(void *sc)
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{
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struct agp_amd_softc *asc = sc;
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/* Set the cache invalidate bit and wait for the chipset to clear */
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WRITE4(AGP_AMD751_TLBCTRL, 1);
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do {
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DELAY(1);
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} while (READ4(AGP_AMD751_TLBCTRL));
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}
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