sync with OpenBSD -current

This commit is contained in:
purplerain 2024-01-19 01:25:19 +00:00
parent 1cefe29c7e
commit fdad81bcfc
Signed by: purplerain
GPG key ID: F42C07F07E2E35B7
32 changed files with 162 additions and 207 deletions

View file

@ -135,24 +135,6 @@ int amdgpu_vcn_sw_init(struct amdgpu_device *adev)
}
}
/*
* Some Steam Deck's BIOS versions are incompatible with the
* indirect SRAM mode, leading to amdgpu being unable to get
* properly probed (and even potentially crashing the kernel).
* Hence, check for these versions here - notice this is
* restricted to Vangogh (Deck's APU).
*/
if (adev->ip_versions[UVD_HWIP][0] == IP_VERSION(3, 0, 2)) {
const char *bios_ver = dmi_get_system_info(DMI_BIOS_VERSION);
if (bios_ver && (!strncmp("F7A0113", bios_ver, 7) ||
!strncmp("F7A0114", bios_ver, 7))) {
adev->vcn.indirect_sram = false;
dev_info(adev->dev,
"Steam Deck quirk: indirect SRAM disabled on BIOS %s\n", bios_ver);
}
}
hdr = (const struct common_firmware_header *)adev->vcn.fw->data;
adev->vcn.fw_version = le32_to_cpu(hdr->ucode_version);

View file

@ -719,9 +719,7 @@ static const struct i2c_algorithm smu_v11_0_i2c_algo = {
};
static const struct i2c_adapter_quirks smu_v11_0_i2c_control_quirks = {
#ifdef notyet
.flags = I2C_AQ_NO_ZERO_LEN,
#endif
};
int smu_v11_0_i2c_control_init(struct amdgpu_device *adev)

View file

@ -1907,7 +1907,7 @@ static void amdgpu_dm_fini(struct amdgpu_device *adev)
#ifdef notyet
hdcp_destroy(&adev->dev->kobj, adev->dm.hdcp_workqueue);
#else
STUB();
hdcp_destroy(NULL, adev->dm.hdcp_workqueue);
#endif
adev->dm.hdcp_workqueue = NULL;
}

View file

@ -23,7 +23,7 @@
* Rob Clark <robdclark@gmail.com>
*/
#include <sys/stdarg.h>
#include <linux/stdarg.h>
#include <linux/io.h>
#include <linux/moduleparam.h>

View file

@ -188,6 +188,7 @@
*/
#include <linux/anon_inodes.h>
#include <linux/dma-fence-unwrap.h>
#include <linux/eventfd.h>
#include <linux/file.h>
#include <linux/fs.h>

View file

@ -539,9 +539,7 @@ static bool rc6_supported(struct intel_rc6 *rc6)
static void rpm_get(struct intel_rc6 *rc6)
{
GEM_BUG_ON(rc6->wakeref);
#ifdef notyet
pm_runtime_get_sync(rc6_to_i915(rc6)->drm.dev);
#endif
rc6->wakeref = true;
}

View file

@ -133,17 +133,6 @@ enum intel_platform {
#define INTEL_SUBPLATFORM_M 0
#define INTEL_SUBPLATFORM_P 1
/* ADL */
#define INTEL_SUBPLATFORM_RPL 0
/* ADL-P */
/*
* As #define INTEL_SUBPLATFORM_RPL 0 will apply
* here too, SUBPLATFORM_N will have different
* bit set
*/
#define INTEL_SUBPLATFORM_N 1
enum intel_ppgtt_type {
INTEL_PPGTT_NONE = I915_GEM_PPGTT_NONE,
INTEL_PPGTT_ALIASING = I915_GEM_PPGTT_ALIASING,

View file

@ -34,7 +34,6 @@
#include "radeon.h"
#include "radeon_prime.h"
struct sg_table *radeon_gem_prime_get_sg_table(struct drm_gem_object *obj)
{
struct radeon_bo *bo = gem_to_radeon_bo(obj);
@ -104,6 +103,7 @@ void radeon_gem_prime_unpin(struct drm_gem_object *obj)
radeon_bo_unreserve(bo);
}
struct dma_buf *radeon_gem_prime_export(struct drm_gem_object *gobj,
int flags)
{