This commit is contained in:
purplerain 2023-07-10 00:10:46 +00:00
parent 2a351e0cdc
commit f57be82572
Signed by: purplerain
GPG key ID: F42C07F07E2E35B7
704 changed files with 20524 additions and 10572 deletions

View file

@ -394,6 +394,14 @@
#define RK3588_PLL_PPLL 8
#define RK3588_ACLK_BUS_ROOT 113
#define RK3588_CLK_I2C1 131
#define RK3588_CLK_I2C2 132
#define RK3588_CLK_I2C3 133
#define RK3588_CLK_I2C4 134
#define RK3588_CLK_I2C5 135
#define RK3588_CLK_I2C6 136
#define RK3588_CLK_I2C7 137
#define RK3588_CLK_I2C8 138
#define RK3588_CLK_UART1_SRC 168
#define RK3588_CLK_UART1_FRAC 169
#define RK3588_CLK_UART1 170
@ -449,6 +457,7 @@
#define RK3588_ACLK_VOP_ROOT 600
#define RK3588_ACLK_VOP 605
#define RK3588_ACLK_VOP_SUB_SRC 619
#define RK3588_CLK_I2C0 628
#define RK3588_CLK_PMU1_50M_SRC 639
#define RK3588_CLK_PMU1_100M_SRC 640
#define RK3588_CLK_PMU1_200M_SRC 641
@ -456,18 +465,40 @@
#define RK3588_PCLK_PMU1_ROOT 645
#define RK3588_PCLK_PMU0_ROOT 646
#define RK3588_HCLK_PMU_CM0_ROOT 647
#define RK3588_CLK_PMU1PWM 658
#define RK3588_CLK_UART0_SRC 664
#define RK3588_CLK_UART0_FRAC 665
#define RK3588_CLK_UART0 666
#define RK3588_SCLK_UART0 667
#define RK3588_CLK_REF_PIPE_PHY0_OSC_SRC 674
#define RK3588_CLK_REF_PIPE_PHY1_OSC_SRC 675
#define RK3588_CLK_REF_PIPE_PHY2_OSC_SRC 676
#define RK3588_CLK_REF_PIPE_PHY0_PLL_SRC 677
#define RK3588_CLK_REF_PIPE_PHY1_PLL_SRC 678
#define RK3588_CLK_REF_PIPE_PHY2_PLL_SRC 679
#define RK3588_CLK_REF_PIPE_PHY0 680
#define RK3588_CLK_REF_PIPE_PHY1 681
#define RK3588_CLK_REF_PIPE_PHY2 682
#define RK3588_PLL_SPLL 1022
#define RK3588_XIN24M 1023
#define RK3588_SRST_PCIE0_POWER_UP 294
#define RK3588_SRST_PCIE1_POWER_UP 295
#define RK3588_SRST_PCIE2_POWER_UP 296
#define RK3588_SRST_PCIE3_POWER_UP 297
#define RK3588_SRST_PCIE4_POWER_UP 298
#define RK3588_SRST_P_PCIE0 299
#define RK3588_SRST_P_PCIE1 300
#define RK3588_SRST_P_PCIE2 301
#define RK3588_SRST_P_PCIE3 302
#define RK3588_SRST_P_PCIE4 303
#define RK3588_SRST_A_USB3OTG0 338
#define RK3588_SRST_A_USB3OTG1 339
#define RK3588_SRST_REF_PIPE_PHY0 572
#define RK3588_SRST_REF_PIPE_PHY1 573
#define RK3588_SRST_REF_PIPE_PHY2 574
#define RK3588_SRST_P_PCIE2_PHY0 579
#define RK3588_SRST_P_PCIE2_PHY1 580
#define RK3588_SRST_P_PCIE2_PHY2 581
#define RK3588_SRST_PCIE30_PHY 584