sync with OpenBSD -current
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26 changed files with 342 additions and 151 deletions
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@ -1,4 +1,4 @@
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/* $OpenBSD: dwqe.c,v 1.18 2024/03/29 08:19:40 stsp Exp $ */
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/* $OpenBSD: dwqe.c,v 1.19 2024/04/25 08:51:37 jmatthew Exp $ */
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/*
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* Copyright (c) 2008, 2019 Mark Kettenis <kettenis@openbsd.org>
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* Copyright (c) 2017, 2022 Patrick Wildt <patrick@blueri.se>
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@ -213,6 +213,8 @@ dwqe_attach(struct dwqe_softc *sc)
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/* Disable interrupts. */
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dwqe_write(sc, GMAC_INT_EN, 0);
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dwqe_write(sc, GMAC_CHAN_INTR_ENA(0), 0);
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dwqe_write(sc, GMAC_MMC_RX_INT_MASK, 0xffffffff);
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dwqe_write(sc, GMAC_MMC_TX_INT_MASK, 0xffffffff);
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return 0;
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}
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@ -1,4 +1,4 @@
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/* $OpenBSD: dwqereg.h,v 1.5 2023/11/11 16:32:56 stsp Exp $ */
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/* $OpenBSD: dwqereg.h,v 1.7 2024/04/25 11:37:39 stsp Exp $ */
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/*
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* Copyright (c) 2008, 2019 Mark Kettenis <kettenis@openbsd.org>
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* Copyright (c) 2017, 2022 Patrick Wildt <patrick@blueri.se>
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@ -83,6 +83,8 @@
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#define GMAC_MAC_MDIO_DATA 0x0204
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#define GMAC_MAC_ADDR0_HI 0x0300
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#define GMAC_MAC_ADDR0_LO 0x0304
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#define GMAC_MMC_RX_INT_MASK 0x070c
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#define GMAC_MMC_TX_INT_MASK 0x0710
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#define GMAC_MTL_OPERATION_MODE 0x0c00
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#define GMAC_MTL_FRPE (1 << 15)
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@ -233,14 +235,44 @@ struct dwqe_desc {
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#define TDES3_FS (1 << 29)
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#define TDES3_OWN (1U << 31)
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/* Rx bits */
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/* Rx bits (read format; host to device) */
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#define RDES3_BUF1V (1 << 24)
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#define RDES3_BUF2V (1 << 25)
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#define RDES3_IC (1 << 30)
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#define RDES3_OWN (1U << 31)
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/* Rx bits (writeback format; device to host) */
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#define RDES1_IP_PAYLOAD_TYPE 0x7
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#define RDES1_IP_PAYLOAD_UNKNOWN 0x0
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#define RDES1_IP_PAYLOAD_UDP 0x1
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#define RDES1_IP_PAYLOAD_TCP 0x2
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#define RDES1_IP_PAYLOAD_ICMP 0x3
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#define RDES1_IP_HDR_ERROR (1 << 3)
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#define RDES1_IPV4_HDR (1 << 4)
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#define RDES1_IPV6_HDR (1 << 5)
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#define RDES1_IP_CSUM_BYPASS (1 << 6)
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#define RDES1_IP_PAYLOAD_ERROR (1 << 7)
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#define RDES3_LENGTH (0x7fff << 0)
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#define RDES3_ES (1 << 15)
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#define RDES3_LENTYPE 0x70000
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#define RDES3_LENTYPE_LENGTH (0x0 << 16)
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#define RDES3_LENTYPE_TYPE (0x1 << 16)
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/* 0x2 is reserved */
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#define RDES3_LENTYPE_ARP (0x3 << 16)
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#define RDES3_LENTYPE_VLAN (0x4 << 16)
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#define RDES3_LENTYPE_2VLAN (0x5 << 16)
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#define RDES3_LENTYPE_MACCTL (0x6 << 16)
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#define RDES3_LENTYPE_OAM (0x7 << 16)
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#define RDES3_DE (1 << 19)
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#define RDES3_RE (1 << 20)
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#define RDES3_OE (1 << 21)
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#define RDES3_RWT (1 << 22)
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#define RDES3_GP (1 << 23)
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#define RDES3_CE (1 << 24)
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#define RDES3_BUF1V (1 << 24)
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#define RDES3_IC (1 << 30)
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#define RDES3_OWN (1U << 31)
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#define RDES3_LENGTH (0x7fff << 0)
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#define RDES3_RDES0_VALID (1 << 25)
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#define RDES3_RDES1_VALID (1 << 26)
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#define RDES3_RDES2_VALID (1 << 27)
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#define RDES3_LD (1 << 28)
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#define RDES3_FD (1 << 29)
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#define RDES3_CTXT (1 << 30)
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/* Bit 31 is the OWN bit, as in "read" format. */
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