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sync with OpenBSD -current

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This commit is contained in:
purplerain 2024-03-19 03:36:51 +00:00
parent 710bf2c3ae
commit c8468dd63a
Signed by: purplerain
GPG key ID: F42C07F07E2E35B7
12 changed files with 426 additions and 69 deletions
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3
sys/dev/fdt/if_mvpp.c
View file

@ -1,4 +1,4 @@
/* $OpenBSD: if_mvpp.c,v 1.51 2023/11/10 15:51:19 bluhm Exp $ */
/* $OpenBSD: if_mvpp.c,v 1.52 2024/03/18 21:37:44 patrick Exp $ */
/*
* Copyright (c) 2008, 2019 Mark Kettenis <kettenis@openbsd.org>
* Copyright (c) 2017, 2020 Patrick Wildt <patrick@blueri.se>
@ -1388,6 +1388,7 @@ mvpp2_port_attach(struct device *parent, struct device *self, void *aux)
sc->sc_mdio = mii_byphandle(phy);
sc->sc_phyloc = OF_getpropint(node, "reg", MII_PHY_ANY);
sc->sc_sfp = OF_getpropint(node, "sfp", sc->sc_sfp);
sc->sc_mii.mii_node = node;
}
if (sc->sc_sfp)

21
sys/dev/fdt/psci.c
View file

@ -1,4 +1,4 @@
/* $OpenBSD: psci.c,v 1.14 2023/02/19 17:16:13 kettenis Exp $ */
/* $OpenBSD: psci.c,v 1.15 2024/03/18 21:57:22 kettenis Exp $ */
/*
* Copyright (c) 2016 Jonathan Gray <jsg@openbsd.org>
@ -34,6 +34,7 @@ extern void (*powerdownfn)(void);
#define SMCCC_VERSION 0x80000000
#define SMCCC_ARCH_FEATURES 0x80000001
#define SMCCC_ARCH_WORKAROUND_1 0x80008000
#define SMCCC_ARCH_WORKAROUND_2 0x80007fff
#define SMCCC_ARCH_WORKAROUND_3 0x80003fff
#define PSCI_VERSION 0x84000000
@ -240,8 +241,24 @@ psci_flush_bp(void)
}
}
void
smccc_enable_arch_workaround_2(void)
{
struct psci_softc *sc = psci_sc;
/*
* SMCCC 1.1 allows us to detect if the workaround is
* implemented and needed.
*/
if (sc && sc->sc_smccc_version >= 0x10001 &&
smccc_arch_features(SMCCC_ARCH_WORKAROUND_2) == 0) {
/* Workaround implemented and needed. */
(*sc->sc_callfn)(SMCCC_ARCH_WORKAROUND_2, 1, 0, 0);
}
}
int
psci_flush_bp_has_bhb(void)
smccc_needs_arch_workaround_3(void)
{
struct psci_softc *sc = psci_sc;

3
sys/dev/fdt/pscivar.h
View file

@ -22,4 +22,7 @@ int psci_method(void);
int32_t smccc(uint32_t, register_t, register_t, register_t);
void smccc_enable_arch_workaround_2(void);
int smccc_needs_arch_workaround_3(void);
#endif /* _SYS_DEV_FDT_PSCIVAR_H_ */

28
sys/dev/pci/pci.c
View file

@ -1,4 +1,4 @@
/* $OpenBSD: pci.c,v 1.127 2023/04/13 15:36:28 miod Exp $ */
/* $OpenBSD: pci.c,v 1.128 2024/03/18 21:20:46 kettenis Exp $ */
/* $NetBSD: pci.c,v 1.31 1997/06/06 23:48:04 thorpej Exp $ */
/*
@ -875,8 +875,8 @@ pci_reserve_resources(struct pci_attach_args *pa)
{
pci_chipset_tag_t pc = pa->pa_pc;
pcitag_t tag = pa->pa_tag;
pcireg_t bhlc, blr, type, bir;
pcireg_t addr, mask;
pcireg_t bhlc, blr, bir, csr;
pcireg_t addr, mask, type;
bus_addr_t base, limit;
bus_size_t size;
int reg, reg_start, reg_end, reg_rom;
@ -908,6 +908,7 @@ pci_reserve_resources(struct pci_attach_args *pa)
return (0);
}
csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
for (reg = reg_start; reg < reg_end; reg += 4) {
if (!pci_mapreg_probe(pc, tag, reg, &type))
continue;
@ -945,8 +946,11 @@ pci_reserve_resources(struct pci_attach_args *pa)
#endif
if (pa->pa_memex && extent_alloc_region(pa->pa_memex,
base, size, EX_NOWAIT)) {
printf("%d:%d:%d: mem address conflict 0x%lx/0x%lx\n",
bus, dev, func, base, size);
if (csr & PCI_COMMAND_MEM_ENABLE) {
printf("%d:%d:%d: mem address conflict"
" 0x%lx/0x%lx\n", bus, dev, func,
base, size);
}
pci_conf_write(pc, tag, reg, 0);
if (type & PCI_MAPREG_MEM_TYPE_64BIT)
pci_conf_write(pc, tag, reg + 4, 0);
@ -955,8 +959,11 @@ pci_reserve_resources(struct pci_attach_args *pa)
case PCI_MAPREG_TYPE_IO:
if (pa->pa_ioex && extent_alloc_region(pa->pa_ioex,
base, size, EX_NOWAIT)) {
printf("%d:%d:%d: io address conflict 0x%lx/0x%lx\n",
bus, dev, func, base, size);
if (csr & PCI_COMMAND_IO_ENABLE) {
printf("%d:%d:%d: io address conflict"
" 0x%lx/0x%lx\n", bus, dev, func,
base, size);
}
pci_conf_write(pc, tag, reg, 0);
}
break;
@ -981,8 +988,11 @@ pci_reserve_resources(struct pci_attach_args *pa)
base, size, EX_NOWAIT) &&
pa->pa_memex && extent_alloc_region(pa->pa_memex,
base, size, EX_NOWAIT)) {
printf("%d:%d:%d: rom address conflict 0x%lx/0x%lx\n",
bus, dev, func, base, size);
if (addr & PCI_ROM_ENABLE) {
printf("%d:%d:%d: rom address conflict"
" 0x%lx/0x%lx\n", bus, dev, func,
base, size);
}
pci_conf_write(pc, tag, PCI_ROM_REG, 0);
}
}