sync with OpenBSD -current
This commit is contained in:
parent
f4a22ff4b2
commit
9dfe537fef
85 changed files with 12490 additions and 6835 deletions
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@ -1,4 +1,4 @@
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/* $OpenBSD: ccp.c,v 1.4 2024/06/12 12:54:54 bluhm Exp $ */
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/* $OpenBSD: ccp.c,v 1.5 2024/06/13 17:59:08 bluhm Exp $ */
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/*
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* Copyright (c) 2018 David Gwynne <dlg@openbsd.org>
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@ -58,7 +58,7 @@ ccp_attach(struct ccp_softc *sc)
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timeout_set(&sc->sc_tick, ccp_rng, sc);
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ccp_rng(sc);
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if (sc->sc_psp_attached)
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if (sc->sc_psp_attached != 0)
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printf(", RNG\n");
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else
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printf(": RNG\n");
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@ -127,8 +127,6 @@ psp_attach(struct ccp_softc *sc)
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if (psp_get_pstatus(&pst) || pst.state != 0)
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goto fail_3;
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printf(", SEV");
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/*
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* create and map Trusted Memory Region (TMR); size 1 Mbyte,
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* needs to be aligend to 1 Mbyte.
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@ -158,6 +156,8 @@ psp_attach(struct ccp_softc *sc)
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if (psp_init(&init))
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goto fail_7;
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printf(", SEV");
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psp_get_pstatus(&pst);
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if ((pst.state == 1) && (pst.cfges_build & 0x1))
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printf(", SEV-ES");
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@ -184,6 +184,7 @@ fail_0:
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bus_dmamap_destroy(sc->sc_dmat, sc->sc_cmd_map);
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ccp_softc = NULL;
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sc->sc_psp_attached = -1;
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return (0);
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}
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@ -240,11 +241,8 @@ ccp_docmd(struct ccp_softc *sc, int cmd, uint64_t paddr)
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/* Did PSP sent a response code? */
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if (status & PSP_CMDRESP_RESPONSE) {
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if ((status & PSP_STATUS_MASK) != PSP_STATUS_SUCCESS) {
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printf("%s: command failed: 0x%x\n", __func__,
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(status & PSP_STATUS_MASK));
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if ((status & PSP_STATUS_MASK) != PSP_STATUS_SUCCESS)
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return (1);
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}
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}
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return (0);
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@ -265,12 +263,11 @@ psp_init(struct psp_init *uinit)
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init->tmr_length = uinit->tmr_length;
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ret = ccp_docmd(sc, PSP_CMD_INIT, sc->sc_cmd_map->dm_segs[0].ds_addr);
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wbinvd_on_all_cpus();
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if (ret != 0)
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return (EIO);
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wbinvd_on_all_cpus();
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return (0);
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}
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@ -1,4 +1,4 @@
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/* $OpenBSD: ccpvar.h,v 1.2 2024/06/12 12:54:54 bluhm Exp $ */
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/* $OpenBSD: ccpvar.h,v 1.3 2024/06/13 17:59:08 bluhm Exp $ */
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/*
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* Copyright (c) 2018 David Gwynne <dlg@openbsd.org>
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@ -26,7 +26,6 @@ struct ccp_softc {
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struct timeout sc_tick;
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bus_size_t sc_size;
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int sc_psp_attached;
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#ifdef __amd64__
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@ -1,4 +1,4 @@
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/* $OpenBSD: ccp_pci.c,v 1.10 2024/06/12 12:54:54 bluhm Exp $ */
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/* $OpenBSD: ccp_pci.c,v 1.11 2024/06/13 17:59:08 bluhm Exp $ */
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/*
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* Copyright (c) 2018 David Gwynne <dlg@openbsd.org>
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@ -74,7 +74,7 @@ ccp_pci_attach(struct device *parent, struct device *self, void *aux)
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}
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if (pci_mapreg_map(pa, CCP_PCI_BAR, memtype, 0,
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&sc->sc_iot, &sc->sc_ioh, NULL, &sc->sc_size, 0) != 0) {
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&sc->sc_iot, &sc->sc_ioh, NULL, NULL, 0) != 0) {
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printf(": cannot map registers\n");
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return;
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}
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@ -107,7 +107,6 @@ psp_pci_attach(struct device *parent, struct device *self, void *aux)
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if (pci_intr_map_msix(pa, 0, &ih) != 0 &&
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pci_intr_map_msi(pa, &ih) != 0 && pci_intr_map(pa, &ih) != 0) {
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printf(": couldn't map interrupt\n");
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bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_size);
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return;
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}
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@ -117,10 +116,14 @@ psp_pci_attach(struct device *parent, struct device *self, void *aux)
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if (sc->sc_ih != NULL)
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printf(": %s", intrstr);
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if (psp_attach(sc)) {
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/* enable interrupts */
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bus_space_write_4(sc->sc_iot, sc->sc_ioh, PSP_REG_INTEN, -1);
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if (!psp_attach(sc)) {
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pci_intr_disestablish(pa->pa_pc, sc->sc_ih);
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sc->sc_ih = NULL;
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return;
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}
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/* enable interrupts */
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bus_space_write_4(sc->sc_iot, sc->sc_ioh, PSP_REG_INTEN, -1);
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}
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int
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@ -1,4 +1,4 @@
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/* $OpenBSD: drm_linux.c,v 1.113 2024/06/03 12:48:25 claudio Exp $ */
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/* $OpenBSD: drm_linux.c,v 1.114 2024/06/13 18:05:54 kettenis Exp $ */
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/*
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* Copyright (c) 2013 Jonathan Gray <jsg@openbsd.org>
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* Copyright (c) 2015, 2016 Mark Kettenis <kettenis@openbsd.org>
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@ -1521,6 +1521,12 @@ acpi_format_exception(acpi_status status)
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}
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}
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int
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acpi_target_system_state(void)
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{
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return acpi_softc->sc_state;
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}
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#endif
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SLIST_HEAD(,backlight_device) backlight_device_list =
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@ -2308,19 +2308,25 @@ inteldrm_attach(struct device *parent, struct device *self, void *aux)
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intel_device_info_driver_create(dev_priv, dev->pdev->device, info);
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mmio_bar = (GRAPHICS_VER(dev_priv) == 2) ? 0x14 : 0x10;
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/* Before gen4, the registers and the GTT are behind different BARs.
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/* from intel_uncore_setup_mmio() */
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/*
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* Before gen4, the registers and the GTT are behind different BARs.
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* However, from gen4 onwards, the registers and the GTT are shared
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* in the same BAR, so we want to restrict this ioremap from
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* clobbering the GTT which we want ioremap_wc instead. Fortunately,
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* the register BAR remains the same size for all the earlier
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* generations up to Ironlake.
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* For dgfx chips register range is expanded to 4MB, and this larger
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* range is also used for integrated gpus beginning with Meteor Lake.
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*/
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if (GRAPHICS_VER(dev_priv) < 5)
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mmio_size = 512 * 1024;
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else if (IS_DGFX(dev_priv))
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if (IS_DGFX(dev_priv) || GRAPHICS_VER_FULL(dev_priv) >= IP_VER(12, 70))
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mmio_size = 4 * 1024 * 1024;
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else
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else if (GRAPHICS_VER(dev_priv) >= 5)
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mmio_size = 2 * 1024 * 1024;
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else
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mmio_size = 512 * 1024;
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mmio_type = pci_mapreg_type(pa->pa_pc, pa->pa_tag, mmio_bar);
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if (pci_mapreg_map(pa, mmio_bar, mmio_type, BUS_SPACE_MAP_LINEAR,
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#include "acpi.h"
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#if NACPI > 0
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#define CONFIG_ACPI 1
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#define CONFIG_ACPI_SLEEP 1
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#endif
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#endif
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int register_acpi_notifier(struct notifier_block *);
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int unregister_acpi_notifier(struct notifier_block *);
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int acpi_target_system_state(void);
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#endif
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