sync with OpenBSD -current
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0f90c06c31
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GPG key ID:
F42C07F07E2E35B7
16 changed files with 119 additions and 114 deletions
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@ -1,4 +1,4 @@
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/* $OpenBSD: dt_dev.c,v 1.31 2024/02/18 00:54:03 cheloha Exp $ */
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/* $OpenBSD: dt_dev.c,v 1.32 2024/02/29 00:18:48 cheloha Exp $ */
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/*
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* Copyright (c) 2019 Martin Pieuchot <mpi@openbsd.org>
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@ -477,6 +477,7 @@ dt_ioctl_get_stats(struct dt_softc *sc, struct dtioc_stat *dtst)
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int
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dt_ioctl_record_start(struct dt_softc *sc)
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{
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uint64_t now;
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struct dt_pcb *dp;
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if (sc->ds_recording)
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@ -487,6 +488,7 @@ dt_ioctl_record_start(struct dt_softc *sc)
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return ENOENT;
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rw_enter_write(&dt_lock);
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now = nsecuptime();
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TAILQ_FOREACH(dp, &sc->ds_pcbs, dp_snext) {
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struct dt_probe *dtp = dp->dp_dtp;
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@ -497,7 +499,8 @@ dt_ioctl_record_start(struct dt_softc *sc)
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if (dp->dp_nsecs != 0) {
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clockintr_bind(&dp->dp_clockintr, dp->dp_cpu, dt_clock,
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dp);
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clockintr_advance(&dp->dp_clockintr, dp->dp_nsecs);
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clockintr_schedule(&dp->dp_clockintr,
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now + dp->dp_nsecs);
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}
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}
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rw_exit_write(&dt_lock);
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@ -1,4 +1,4 @@
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/* $OpenBSD: qwx.c,v 1.52 2024/02/24 15:21:39 cheloha Exp $ */
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/* $OpenBSD: qwx.c,v 1.54 2024/02/29 11:45:47 stsp Exp $ */
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/*
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* Copyright 2023 Stefan Sperling <stsp@openbsd.org>
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@ -12793,6 +12793,7 @@ qwx_mgmt_rx_event(struct qwx_softc *sc, struct mbuf *m)
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}
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#endif
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ieee80211_input(ifp, m, ni, &rxi);
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ieee80211_release_node(ic, ni);
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exit:
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#ifdef notyet
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rcu_read_unlock();
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@ -21332,7 +21333,7 @@ qwx_ce_rx_post_buf(struct qwx_softc *sc)
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pipe = &sc->ce.ce_pipe[i];
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ret = qwx_ce_rx_post_pipe(pipe);
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if (ret) {
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if (ret == ENOBUFS)
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if (ret == ENOSPC)
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continue;
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printf("%s: failed to post rx buf to pipe: %d err: %d\n",
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@ -21436,7 +21437,7 @@ qwx_ce_recv_process_cb(struct qwx_ce_pipe *pipe)
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}
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err = qwx_ce_rx_post_pipe(pipe);
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if (err && err != ENOBUFS) {
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if (err && err != ENOSPC) {
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printf("%s: failed to post rx buf to pipe: %d err: %d\n",
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__func__, pipe->pipe_num, err);
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#ifdef notyet
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@ -301,6 +301,8 @@ static const struct pci_matchid i915_devices[] = {
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{ 0x8086, 0x46d0 },
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{ 0x8086, 0x46d1 },
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{ 0x8086, 0x46d2 },
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{ 0x8086, 0x46d3 },
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{ 0x8086, 0x46d4 },
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{ 0x8086, 0xa780 },
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{ 0x8086, 0xa781 },
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{ 0x8086, 0xa782 },
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@ -672,7 +672,9 @@
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#define INTEL_ADLN_IDS(info) \
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INTEL_VGA_DEVICE(0x46D0, info), \
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INTEL_VGA_DEVICE(0x46D1, info), \
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INTEL_VGA_DEVICE(0x46D2, info)
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INTEL_VGA_DEVICE(0x46D2, info), \
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INTEL_VGA_DEVICE(0x46D3, info), \
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INTEL_VGA_DEVICE(0x46D4, info)
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/* RPL-S */
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#define INTEL_RPLS_IDS(info) \
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@ -1,4 +1,4 @@
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$OpenBSD: pcidevs,v 1.2063 2024/02/19 05:36:17 jsg Exp $
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$OpenBSD: pcidevs,v 1.2064 2024/02/29 10:09:54 jsg Exp $
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/* $NetBSD: pcidevs,v 1.30 1997/06/24 06:20:24 thorpej Exp $ */
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/*
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@ -5739,6 +5739,8 @@ product INTEL ADL_P_GT2_18 0x46c3 Graphics
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product INTEL ADL_N_GT_1 0x46d0 Graphics
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product INTEL ADL_N_GT_2 0x46d1 Graphics
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product INTEL ADL_N_GT_3 0x46d2 Graphics
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product INTEL ADL_N_GT_4 0x46d3 Graphics
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product INTEL ADL_N_GT_5 0x46d4 Graphics
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product INTEL DG1_1 0x4905 Iris Xe MAX
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product INTEL DG1_2 0x4906 Graphics
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product INTEL DG1_3 0x4907 SG-18M
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@ -2,7 +2,7 @@
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* THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT.
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*
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* generated from:
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* OpenBSD: pcidevs,v 1.2063 2024/02/19 05:36:17 jsg Exp
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* OpenBSD: pcidevs,v 1.2064 2024/02/29 10:09:54 jsg Exp
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*/
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/* $NetBSD: pcidevs,v 1.30 1997/06/24 06:20:24 thorpej Exp $ */
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@ -5744,6 +5744,8 @@
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#define PCI_PRODUCT_INTEL_ADL_N_GT_1 0x46d0 /* Graphics */
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#define PCI_PRODUCT_INTEL_ADL_N_GT_2 0x46d1 /* Graphics */
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#define PCI_PRODUCT_INTEL_ADL_N_GT_3 0x46d2 /* Graphics */
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#define PCI_PRODUCT_INTEL_ADL_N_GT_4 0x46d3 /* Graphics */
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#define PCI_PRODUCT_INTEL_ADL_N_GT_5 0x46d4 /* Graphics */
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#define PCI_PRODUCT_INTEL_DG1_1 0x4905 /* Iris Xe MAX */
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#define PCI_PRODUCT_INTEL_DG1_2 0x4906 /* Graphics */
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#define PCI_PRODUCT_INTEL_DG1_3 0x4907 /* SG-18M */
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@ -2,7 +2,7 @@
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* THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT.
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*
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* generated from:
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* OpenBSD: pcidevs,v 1.2063 2024/02/19 05:36:17 jsg Exp
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* OpenBSD: pcidevs,v 1.2064 2024/02/29 10:09:54 jsg Exp
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*/
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/* $NetBSD: pcidevs,v 1.30 1997/06/24 06:20:24 thorpej Exp $ */
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@ -20315,6 +20315,14 @@ static const struct pci_known_product pci_known_products[] = {
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PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_GT_3,
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"Graphics",
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},
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{
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PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_GT_4,
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"Graphics",
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},
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{
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PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_GT_5,
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"Graphics",
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},
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{
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PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DG1_1,
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"Iris Xe MAX",
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