sync with OpenBSD -current
This commit is contained in:
parent
991d31b9d0
commit
99745de747
GPG key ID:
F42C07F07E2E35B7
62 changed files with 774 additions and 285 deletions
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@ -1,4 +1,4 @@
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/* $OpenBSD: ahci_pci.c,v 1.17 2024/05/24 06:02:53 jsg Exp $ */
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/* $OpenBSD: ahci_pci.c,v 1.18 2024/06/16 18:00:08 kn Exp $ */
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/*
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* Copyright (c) 2006 David Gwynne <dlg@openbsd.org>
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@ -71,6 +71,8 @@ int ahci_intel_attach(struct ahci_softc *,
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struct pci_attach_args *);
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int ahci_samsung_attach(struct ahci_softc *,
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struct pci_attach_args *);
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int ahci_storx_attach(struct ahci_softc *,
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struct pci_attach_args *);
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static const struct ahci_device ahci_devices[] = {
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{ PCI_VENDOR_AMD, PCI_PRODUCT_AMD_HUDSON2_SATA_1,
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@ -148,7 +150,10 @@ static const struct ahci_device ahci_devices[] = {
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NULL, ahci_samsung_attach },
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{ PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8251_SATA,
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ahci_no_match, ahci_vt8251_attach }
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ahci_no_match, ahci_vt8251_attach },
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{ PCI_VENDOR_ZHAOXIN, PCI_PRODUCT_ZHAOXIN_STORX_AHCI,
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NULL, ahci_storx_attach },
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};
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int ahci_pci_match(struct device *, void *, void *);
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@ -285,6 +290,19 @@ ahci_samsung_attach(struct ahci_softc *sc, struct pci_attach_args *pa)
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return (0);
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}
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int
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ahci_storx_attach(struct ahci_softc *sc, struct pci_attach_args *pa)
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{
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/*
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* Disable MSI with the ZX-100/ZX-200/ZX-E StorX AHCI Controller
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* in the Unchartevice 6640MA notebook, otherwise ahci(4) hangs
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* with SATA speed set to "Gen3" in BIOS.
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*/
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sc->sc_flags |= AHCI_F_NO_MSI;
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return (0);
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}
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int
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ahci_pci_match(struct device *parent, void *match, void *aux)
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{
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@ -1135,7 +1135,8 @@ static int reserve_bo_and_cond_vms(struct kgd_mem *mem,
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int ret;
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ctx->sync = &mem->sync;
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drm_exec_init(&ctx->exec, DRM_EXEC_INTERRUPTIBLE_WAIT);
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drm_exec_init(&ctx->exec, DRM_EXEC_INTERRUPTIBLE_WAIT |
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DRM_EXEC_IGNORE_DUPLICATES);
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drm_exec_until_all_locked(&ctx->exec) {
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ctx->n_vms = 0;
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list_for_each_entry(entry, &mem->attachments, list) {
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@ -211,6 +211,7 @@ union igp_info {
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struct atom_integrated_system_info_v1_11 v11;
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struct atom_integrated_system_info_v1_12 v12;
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struct atom_integrated_system_info_v2_1 v21;
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struct atom_integrated_system_info_v2_3 v23;
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};
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union umc_info {
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@ -359,6 +360,20 @@ amdgpu_atomfirmware_get_vram_info(struct amdgpu_device *adev,
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if (vram_type)
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*vram_type = convert_atom_mem_type_to_vram_type(adev, mem_type);
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break;
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case 3:
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mem_channel_number = igp_info->v23.umachannelnumber;
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if (!mem_channel_number)
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mem_channel_number = 1;
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mem_type = igp_info->v23.memorytype;
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if (mem_type == LpDdr5MemType)
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mem_channel_width = 32;
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else
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mem_channel_width = 64;
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if (vram_width)
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*vram_width = mem_channel_number * mem_channel_width;
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if (vram_type)
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*vram_type = convert_atom_mem_type_to_vram_type(adev, mem_type);
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break;
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default:
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return -EINVAL;
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}
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@ -2031,6 +2031,9 @@ static int sdma_v4_0_process_trap_irq(struct amdgpu_device *adev,
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DRM_DEBUG("IH: SDMA trap\n");
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instance = sdma_v4_0_irq_id_to_seq(entry->client_id);
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if (instance < 0)
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return instance;
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switch (entry->ring_id) {
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case 0:
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amdgpu_fence_process(&adev->sdma.instance[instance].ring);
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@ -402,15 +402,8 @@ struct kfd_dev *kgd2kfd_probe(struct amdgpu_device *adev, bool vf)
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f2g = &gfx_v11_kfd2kgd;
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break;
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case IP_VERSION(11, 0, 3):
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if ((adev->pdev->device == 0x7460 &&
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adev->pdev->revision == 0x00) ||
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(adev->pdev->device == 0x7461 &&
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adev->pdev->revision == 0x00))
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/* Note: Compiler version is 11.0.5 while HW version is 11.0.3 */
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gfx_target_version = 110005;
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else
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/* Note: Compiler version is 11.0.1 while HW version is 11.0.3 */
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gfx_target_version = 110001;
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/* Note: Compiler version is 11.0.1 while HW version is 11.0.3 */
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gfx_target_version = 110001;
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f2g = &gfx_v11_kfd2kgd;
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break;
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default:
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@ -1625,6 +1625,49 @@ struct atom_integrated_system_info_v2_2
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uint32_t reserved4[189];
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};
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struct uma_carveout_option {
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char optionName[29]; //max length of string is 28chars + '\0'. Current design is for "minimum", "Medium", "High". This makes entire struct size 64bits
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uint8_t memoryCarvedGb; //memory carved out with setting
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uint8_t memoryRemainingGb; //memory remaining on system
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union {
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struct _flags {
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uint8_t Auto : 1;
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uint8_t Custom : 1;
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uint8_t Reserved : 6;
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} flags;
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uint8_t all8;
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} uma_carveout_option_flags;
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};
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struct atom_integrated_system_info_v2_3 {
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struct atom_common_table_header table_header;
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uint32_t vbios_misc; // enum of atom_system_vbiosmisc_def
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uint32_t gpucapinfo; // enum of atom_system_gpucapinf_def
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uint32_t system_config;
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uint32_t cpucapinfo;
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uint16_t gpuclk_ss_percentage; // unit of 0.001%, 1000 mean 1%
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uint16_t gpuclk_ss_type;
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uint16_t dpphy_override; // bit vector, enum of atom_sysinfo_dpphy_override_def
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uint8_t memorytype; // enum of atom_dmi_t17_mem_type_def, APU memory type indication.
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uint8_t umachannelnumber; // number of memory channels
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uint8_t htc_hyst_limit;
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uint8_t htc_tmp_limit;
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uint8_t reserved1; // dp_ss_control
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uint8_t gpu_package_id;
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struct edp_info_table edp1_info;
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struct edp_info_table edp2_info;
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uint32_t reserved2[8];
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struct atom_external_display_connection_info extdispconninfo;
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uint8_t UMACarveoutVersion;
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uint8_t UMACarveoutIndexMax;
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uint8_t UMACarveoutTypeDefault;
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uint8_t UMACarveoutIndexDefault;
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uint8_t UMACarveoutType; //Auto or Custom
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uint8_t UMACarveoutIndex;
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struct uma_carveout_option UMASizeControlOption[20];
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uint8_t reserved3[110];
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};
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// system_config
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enum atom_system_vbiosmisc_def{
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INTEGRATED_SYSTEM_INFO__GET_EDID_CALLBACK_FUNC_SUPPORT = 0x01,
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@ -226,15 +226,17 @@ static int smu_v13_0_4_system_features_control(struct smu_context *smu, bool en)
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struct amdgpu_device *adev = smu->adev;
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int ret = 0;
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if (!en && adev->in_s4) {
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/* Adds a GFX reset as workaround just before sending the
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* MP1_UNLOAD message to prevent GC/RLC/PMFW from entering
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* an invalid state.
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*/
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ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_GfxDeviceDriverReset,
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SMU_RESET_MODE_2, NULL);
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if (ret)
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return ret;
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if (!en && !adev->in_s0ix) {
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if (adev->in_s4) {
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/* Adds a GFX reset as workaround just before sending the
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* MP1_UNLOAD message to prevent GC/RLC/PMFW from entering
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* an invalid state.
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*/
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ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_GfxDeviceDriverReset,
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SMU_RESET_MODE_2, NULL);
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if (ret)
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return ret;
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}
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ret = smu_cmn_send_smc_msg(smu, SMU_MSG_PrepareMp1ForUnload, NULL);
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}
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@ -122,7 +122,6 @@ static int drm_fbdev_generic_helper_fb_probe(struct drm_fb_helper *fb_helper,
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/* screen */
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info->flags |= FBINFO_VIRTFB | FBINFO_READS_FAST;
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info->screen_buffer = screen_buffer;
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info->fix.smem_start = page_to_phys(vmalloc_to_page(info->screen_buffer));
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info->fix.smem_len = screen_size;
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#ifdef notyet
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@ -793,7 +793,7 @@ void i915_hwmon_register(struct drm_i915_private *i915)
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if (!IS_DGFX(i915))
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return;
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hwmon = devm_kzalloc(dev, sizeof(*hwmon), GFP_KERNEL);
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hwmon = kzalloc(sizeof(*hwmon), GFP_KERNEL);
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if (!hwmon)
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return;
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@ -819,14 +819,12 @@ void i915_hwmon_register(struct drm_i915_private *i915)
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hwm_get_preregistration_info(i915);
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/* hwmon_dev points to device hwmon<i> */
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hwmon_dev = devm_hwmon_device_register_with_info(dev, ddat->name,
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ddat,
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&hwm_chip_info,
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hwm_groups);
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if (IS_ERR(hwmon_dev)) {
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i915->hwmon = NULL;
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return;
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}
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hwmon_dev = hwmon_device_register_with_info(dev, ddat->name,
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ddat,
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&hwm_chip_info,
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hwm_groups);
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if (IS_ERR(hwmon_dev))
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goto err;
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ddat->hwmon_dev = hwmon_dev;
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@ -839,16 +837,36 @@ void i915_hwmon_register(struct drm_i915_private *i915)
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if (!hwm_gt_is_visible(ddat_gt, hwmon_energy, hwmon_energy_input, 0))
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continue;
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hwmon_dev = devm_hwmon_device_register_with_info(dev, ddat_gt->name,
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ddat_gt,
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&hwm_gt_chip_info,
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NULL);
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hwmon_dev = hwmon_device_register_with_info(dev, ddat_gt->name,
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ddat_gt,
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&hwm_gt_chip_info,
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NULL);
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if (!IS_ERR(hwmon_dev))
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ddat_gt->hwmon_dev = hwmon_dev;
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}
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return;
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err:
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i915_hwmon_unregister(i915);
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}
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void i915_hwmon_unregister(struct drm_i915_private *i915)
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{
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fetch_and_zero(&i915->hwmon);
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struct i915_hwmon *hwmon = i915->hwmon;
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struct intel_gt *gt;
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int i;
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if (!hwmon)
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return;
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for_each_gt(gt, i915, i)
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if (hwmon->ddat_gt[i].hwmon_dev)
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hwmon_device_unregister(hwmon->ddat_gt[i].hwmon_dev);
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if (hwmon->ddat.hwmon_dev)
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hwmon_device_unregister(hwmon->ddat.hwmon_dev);
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mutex_destroy(&hwmon->hwmon_lock);
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kfree(i915->hwmon);
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i915->hwmon = NULL;
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}
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@ -93,5 +93,5 @@
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#endif
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#if defined(SUSPEND) || defined(HIBERNATE)
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#define CONFIG_PM_SLEEP
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#define CONFIG_PM_SLEEP 1
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#endif
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@ -1,4 +1,4 @@
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/* $OpenBSD: if_vmx.c,v 1.87 2024/06/07 08:44:25 jan Exp $ */
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/* $OpenBSD: if_vmx.c,v 1.88 2024/06/17 11:13:43 bluhm Exp $ */
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/*
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* Copyright (c) 2013 Tsubai Masanari
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@ -1619,6 +1619,8 @@ vmxnet3_start(struct ifqueue *ifq)
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rgen = ring->gen;
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for (;;) {
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int hdrlen;
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if (free <= NTXSEGS) {
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ifq_set_oactive(ifq);
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break;
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@ -1628,6 +1630,30 @@ vmxnet3_start(struct ifqueue *ifq)
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if (m == NULL)
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break;
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/*
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* Headers for Ether, IP, TCP including options must lay in
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* first mbuf to support TSO. Usually our stack gets that
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* right. To avoid packet parsing here, make a rough estimate
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* for simple IPv4. Cases seen in the wild contain only ether
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* header in separate mbuf. To support IPv6 with TCP options,
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* move as much as possible into first mbuf. Realloc mbuf
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* before bus dma load.
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*/
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hdrlen = sizeof(struct ether_header) + sizeof(struct ip) +
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sizeof(struct tcphdr);
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if (ISSET(m->m_pkthdr.csum_flags, M_TCP_TSO) &&
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m->m_len < hdrlen && hdrlen <= m->m_pkthdr.len) {
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hdrlen = MHLEN;
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/* m_pullup preserves alignment, reserve space */
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hdrlen -= mtod(m, unsigned long) & (sizeof(long) - 1);
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if (hdrlen > m->m_pkthdr.len)
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hdrlen = m->m_pkthdr.len;
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if ((m = m_pullup(m, hdrlen)) == NULL) {
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ifq->ifq_errors++;
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continue;
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}
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}
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map = ring->dmap[prod];
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if (vmx_load_mbuf(sc->sc_dmat, map, m) != 0) {
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@ -1,4 +1,4 @@
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$OpenBSD: pcidevs,v 1.2076 2024/05/22 16:24:59 martijn Exp $
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$OpenBSD: pcidevs,v 1.2077 2024/06/16 16:20:51 kn Exp $
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/* $NetBSD: pcidevs,v 1.30 1997/06/24 06:20:24 thorpej Exp $ */
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/*
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@ -346,6 +346,7 @@ vendor SYMPHONY2 0x1c1c Symphony Labs
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vendor SKHYNIX 0x1c5c SK hynix
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vendor ADATA 0x1cc1 ADATA Technology
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vendor UMIS 0x1cc4 Union Memory
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vendor ZHAOXIN 0x1d17 Zhaoxin
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vendor BAIKAL 0x1d39 Baikal Electronics
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vendor AQUANTIA 0x1d6a Aquantia
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vendor ROCKCHIP 0x1d87 Rockchip
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@ -10039,6 +10040,9 @@ product YMTC PC005 0x1001 PC005
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/* Zeinet products */
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product ZEINET 1221 0x0001 1221
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/* Zhaoxin products */
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product ZHAOXIN STORX_AHCI 0x9083 StorX AHCI
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/* Ziatech products */
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product ZIATECH ZT8905 0x8905 PCI-ST32
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@ -2,7 +2,7 @@
|
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* THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT.
|
||||
*
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* generated from:
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* OpenBSD: pcidevs,v 1.2075 2024/05/21 07:03:55 jsg Exp
|
||||
* OpenBSD: pcidevs,v 1.2077 2024/06/16 16:20:51 kn Exp
|
||||
*/
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||||
/* $NetBSD: pcidevs,v 1.30 1997/06/24 06:20:24 thorpej Exp $ */
|
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@ -351,6 +351,7 @@
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#define PCI_VENDOR_SKHYNIX 0x1c5c /* SK hynix */
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#define PCI_VENDOR_ADATA 0x1cc1 /* ADATA Technology */
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#define PCI_VENDOR_UMIS 0x1cc4 /* Union Memory */
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#define PCI_VENDOR_ZHAOXIN 0x1d17 /* Zhaoxin */
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#define PCI_VENDOR_BAIKAL 0x1d39 /* Baikal Electronics */
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#define PCI_VENDOR_AQUANTIA 0x1d6a /* Aquantia */
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#define PCI_VENDOR_ROCKCHIP 0x1d87 /* Rockchip */
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@ -10044,6 +10045,9 @@
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/* Zeinet products */
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#define PCI_PRODUCT_ZEINET_1221 0x0001 /* 1221 */
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/* Zhaoxin products */
|
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#define PCI_PRODUCT_ZHAOXIN_STORX_AHCI 0x9083 /* StorX AHCI */
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/* Ziatech products */
|
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#define PCI_PRODUCT_ZIATECH_ZT8905 0x8905 /* PCI-ST32 */
|
||||
|
||||
|
|
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|
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@ -2,7 +2,7 @@
|
|||
* THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT.
|
||||
*
|
||||
* generated from:
|
||||
* OpenBSD: pcidevs,v 1.2075 2024/05/21 07:03:55 jsg Exp
|
||||
* OpenBSD: pcidevs,v 1.2077 2024/06/16 16:20:51 kn Exp
|
||||
*/
|
||||
|
||||
/* $NetBSD: pcidevs,v 1.30 1997/06/24 06:20:24 thorpej Exp $ */
|
||||
|
|
@ -36047,6 +36047,10 @@ static const struct pci_known_product pci_known_products[] = {
|
|||
PCI_VENDOR_ZEINET, PCI_PRODUCT_ZEINET_1221,
|
||||
"1221",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_ZHAOXIN, PCI_PRODUCT_ZHAOXIN_STORX_AHCI,
|
||||
"StorX AHCI",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_ZIATECH, PCI_PRODUCT_ZIATECH_ZT8905,
|
||||
"PCI-ST32",
|
||||
|
|
@ -37279,6 +37283,10 @@ static const struct pci_known_vendor pci_known_vendors[] = {
|
|||
PCI_VENDOR_UMIS,
|
||||
"Union Memory",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_ZHAOXIN,
|
||||
"Zhaoxin",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_BAIKAL,
|
||||
"Baikal Electronics",
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue