sync with OpenBSD -current
This commit is contained in:
parent
cc5edceac3
commit
6278c437f5
GPG key ID:
F42C07F07E2E35B7
76 changed files with 1108 additions and 2495 deletions
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@ -141,8 +141,6 @@ static u32 guc_ads_blob_size(struct intel_guc *guc)
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static void guc_policies_init(struct intel_guc *guc)
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{
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STUB();
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#ifdef notyet
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struct intel_gt *gt = guc_to_gt(guc);
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struct drm_i915_private *i915 = gt->i915;
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u32 global_flags = 0;
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@ -157,14 +155,11 @@ static void guc_policies_init(struct intel_guc *guc)
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ads_blob_write(guc, policies.global_flags, global_flags);
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ads_blob_write(guc, policies.is_valid, 1);
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#endif
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}
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void intel_guc_ads_print_policy_info(struct intel_guc *guc,
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struct drm_printer *dp)
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{
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STUB();
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#ifdef notyet
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if (unlikely(iosys_map_is_null(&guc->ads_map)))
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return;
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@ -175,7 +170,6 @@ void intel_guc_ads_print_policy_info(struct intel_guc *guc,
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ads_blob_read(guc, policies.max_num_work_items));
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drm_printf(dp, " Flags = %u\n",
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ads_blob_read(guc, policies.global_flags));
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#endif
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}
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static int guc_action_policies_update(struct intel_guc *guc, u32 policy_offset)
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@ -190,9 +184,6 @@ static int guc_action_policies_update(struct intel_guc *guc, u32 policy_offset)
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int intel_guc_global_policies_update(struct intel_guc *guc)
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{
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STUB();
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return -ENOSYS;
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#ifdef notyet
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struct intel_gt *gt = guc_to_gt(guc);
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u32 scheduler_policies;
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intel_wakeref_t wakeref;
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@ -213,14 +204,11 @@ int intel_guc_global_policies_update(struct intel_guc *guc)
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ret = guc_action_policies_update(guc, scheduler_policies);
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return ret;
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#endif
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}
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static void guc_mapping_table_init(struct intel_gt *gt,
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struct iosys_map *info_map)
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{
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STUB();
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#ifdef notyet
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unsigned int i, j;
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struct intel_engine_cs *engine;
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enum intel_engine_id id;
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@ -237,7 +225,6 @@ static void guc_mapping_table_init(struct intel_gt *gt,
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info_map_write(info_map, mapping_table[guc_class][ilog2(engine->logical_mask)],
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engine->instance);
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}
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#endif
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}
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/*
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@ -267,14 +254,12 @@ static int guc_mmio_reg_cmp(const void *a, const void *b)
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static struct guc_mmio_reg * __must_check
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__mmio_reg_add(struct temp_regset *regset, struct guc_mmio_reg *reg)
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{
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STUB();
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return ERR_PTR(-ENOSYS);
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#ifdef notyet
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u32 pos = regset->storage_used;
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struct guc_mmio_reg *slot;
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if (pos >= regset->storage_max) {
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size_t size = ALIGN((pos + 1) * sizeof(*slot), PAGE_SIZE);
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#ifdef ___linux__
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struct guc_mmio_reg *r = krealloc(regset->storage,
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size, GFP_KERNEL);
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if (!r) {
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@ -282,6 +267,17 @@ __mmio_reg_add(struct temp_regset *regset, struct guc_mmio_reg *reg)
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-ENOMEM);
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return ERR_PTR(-ENOMEM);
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}
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#else
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struct guc_mmio_reg *r = kmalloc(size, GFP_KERNEL);
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if (!r) {
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WARN_ONCE(1, "Incomplete regset list: can't add register (%d)\n",
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-ENOMEM);
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return ERR_PTR(-ENOMEM);
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}
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memcpy(r, regset->storage,
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ALIGN((pos) * sizeof(*slot), PAGE_SIZE));
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kfree(regset->storage);
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#endif
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regset->registers = r + (regset->registers - regset->storage);
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regset->storage = r;
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@ -293,7 +289,6 @@ __mmio_reg_add(struct temp_regset *regset, struct guc_mmio_reg *reg)
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*slot = *reg;
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return slot;
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#endif
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}
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static long __must_check guc_mmio_reg_add(struct intel_gt *gt,
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@ -457,8 +452,6 @@ fail_regset_init:
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static void guc_mmio_reg_state_init(struct intel_guc *guc)
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{
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STUB();
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#ifdef notyet
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struct intel_gt *gt = guc_to_gt(guc);
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struct intel_engine_cs *engine;
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enum intel_engine_id id;
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@ -498,14 +491,11 @@ static void guc_mmio_reg_state_init(struct intel_guc *guc)
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addr_ggtt += count * sizeof(struct guc_mmio_reg);
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}
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#endif
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}
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static void fill_engine_enable_masks(struct intel_gt *gt,
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struct iosys_map *info_map)
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{
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STUB();
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#ifdef notyet
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info_map_write(info_map, engine_enabled_masks[GUC_RENDER_CLASS], RCS_MASK(gt));
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info_map_write(info_map, engine_enabled_masks[GUC_COMPUTE_CLASS], CCS_MASK(gt));
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info_map_write(info_map, engine_enabled_masks[GUC_BLITTER_CLASS], BCS_MASK(gt));
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@ -516,7 +506,6 @@ static void fill_engine_enable_masks(struct intel_gt *gt,
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if (gt->engine[GSC0])
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info_map_write(info_map, engine_enabled_masks[GUC_GSC_OTHER_CLASS],
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BIT(gt->engine[GSC0]->instance));
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#endif
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}
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#define LR_HW_CONTEXT_SIZE (80 * sizeof(u32))
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@ -527,9 +516,6 @@ static void fill_engine_enable_masks(struct intel_gt *gt,
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#define LRC_SKIP_SIZE(i915) (LRC_PPHWSP_SZ * PAGE_SIZE + LR_HW_CONTEXT_SZ(i915))
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static int guc_prep_golden_context(struct intel_guc *guc)
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{
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STUB();
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return -ENOSYS;
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#ifdef notyet
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struct intel_gt *gt = guc_to_gt(guc);
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u32 addr_ggtt, offset;
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u32 total_size = 0, alloc_size, real_size;
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@ -597,7 +583,6 @@ static int guc_prep_golden_context(struct intel_guc *guc)
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GEM_BUG_ON(guc->ads_golden_ctxt_size != total_size);
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return total_size;
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#endif
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}
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static struct intel_engine_cs *find_engine_state(struct intel_gt *gt, u8 engine_class)
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@ -629,10 +614,6 @@ static void guc_init_golden_context(struct intel_guc *guc)
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if (!intel_uc_uses_guc_submission(>->uc))
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return;
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STUB();
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return;
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#ifdef notyet
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GEM_BUG_ON(iosys_map_is_null(&guc->ads_map));
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/*
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@ -666,20 +647,16 @@ static void guc_init_golden_context(struct intel_guc *guc)
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addr_ggtt += alloc_size;
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shmem_read_to_iosys_map(engine->default_state, 0, &guc->ads_map,
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uao_read_to_iosys_map(engine->default_state, 0, &guc->ads_map,
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offset, real_size);
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offset += alloc_size;
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}
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GEM_BUG_ON(guc->ads_golden_ctxt_size != total_size);
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#endif
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}
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static u32 guc_get_capture_engine_mask(struct iosys_map *info_map, u32 capture_class)
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{
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STUB();
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return 0;
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#ifdef notyet
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u32 mask;
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switch (capture_class) {
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@ -709,15 +686,11 @@ static u32 guc_get_capture_engine_mask(struct iosys_map *info_map, u32 capture_c
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}
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return mask;
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#endif
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}
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static int
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guc_capture_prep_lists(struct intel_guc *guc)
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{
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STUB();
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return -ENOSYS;
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#ifdef notyet
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struct intel_gt *gt = guc_to_gt(guc);
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u32 ads_ggtt, capture_offset, null_ggtt, total_size = 0;
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struct guc_gt_system_info local_info;
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@ -828,13 +801,10 @@ engine_instance_list:
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guc->ads_capture_size, PAGE_ALIGN(total_size));
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return PAGE_ALIGN(total_size);
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#endif
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}
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static void __guc_ads_init(struct intel_guc *guc)
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{
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STUB();
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#ifdef notyet
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struct intel_gt *gt = guc_to_gt(guc);
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struct drm_i915_private *i915 = gt->i915;
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struct iosys_map info_map = IOSYS_MAP_INIT_OFFSET(&guc->ads_map,
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@ -885,7 +855,6 @@ static void __guc_ads_init(struct intel_guc *guc)
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guc_ads_private_data_offset(guc));
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i915_gem_object_flush_map(guc->ads_vma->obj);
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#endif
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}
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/**
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@ -963,8 +932,6 @@ void intel_guc_ads_destroy(struct intel_guc *guc)
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static void guc_ads_private_data_reset(struct intel_guc *guc)
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{
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STUB();
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#ifdef notyet
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u32 size;
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size = guc_ads_private_data_size(guc);
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@ -973,7 +940,6 @@ static void guc_ads_private_data_reset(struct intel_guc *guc)
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iosys_map_memset(&guc->ads_map, guc_ads_private_data_offset(guc),
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0, size);
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#endif
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}
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/**
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@ -1002,15 +968,10 @@ u32 intel_guc_engine_usage_offset(struct intel_guc *guc)
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struct iosys_map intel_guc_engine_usage_record_map(struct intel_engine_cs *engine)
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{
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STUB();
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struct iosys_map x = {};
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return x;
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#ifdef notyet
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struct intel_guc *guc = &engine->gt->uc.guc;
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u8 guc_class = engine_class_to_guc_class(engine->class);
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size_t offset = offsetof(struct __guc_ads_blob,
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engine_usage.engines[guc_class][ilog2(engine->logical_mask)]);
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return IOSYS_MAP_INIT_OFFSET(&guc->ads_map, offset);
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#endif
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}
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@ -1214,8 +1214,6 @@ __extend_last_switch(struct intel_guc *guc, u64 *prev_start, u32 new_start)
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static void __get_engine_usage_record(struct intel_engine_cs *engine,
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u32 *last_in, u32 *id, u32 *total)
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{
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STUB();
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#ifdef notyet
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struct iosys_map rec_map = intel_guc_engine_usage_record_map(engine);
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int i = 0;
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@ -1229,7 +1227,6 @@ static void __get_engine_usage_record(struct intel_engine_cs *engine,
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record_read(&rec_map, total_runtime) == *total)
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break;
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} while (++i < 6);
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#endif
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}
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static void guc_update_engine_gt_clks(struct intel_engine_cs *engine)
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@ -2068,9 +2065,6 @@ static void guc_submit_request(struct i915_request *rq)
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static int new_guc_id(struct intel_guc *guc, struct intel_context *ce)
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{
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STUB();
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return -ENOSYS;
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#ifdef notyet
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int ret;
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GEM_BUG_ON(intel_context_is_child(ce));
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@ -2094,13 +2088,10 @@ static int new_guc_id(struct intel_guc *guc, struct intel_context *ce)
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ce->guc_id.id = ret;
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return 0;
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#endif
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}
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static void __release_guc_id(struct intel_guc *guc, struct intel_context *ce)
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{
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STUB();
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#ifdef notyet
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GEM_BUG_ON(intel_context_is_child(ce));
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if (!context_guc_id_invalid(ce)) {
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@ -2119,7 +2110,6 @@ static void __release_guc_id(struct intel_guc *guc, struct intel_context *ce)
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}
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if (!list_empty(&ce->guc_id.link))
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list_del_init(&ce->guc_id.link);
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#endif
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}
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static void release_guc_id(struct intel_guc *guc, struct intel_context *ce)
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@ -35,6 +35,15 @@ iosys_map_memcpy_to(struct iosys_map *ism, size_t off, const void *src,
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memcpy(ism->vaddr + off, src, len);
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}
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static inline void
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iosys_map_memset(struct iosys_map *ism, size_t off, int c, size_t len)
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{
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if (ism->is_iomem)
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memset_io(ism->vaddr_iomem + off, c, len);
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else
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memset(ism->vaddr + off, c, len);
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}
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static inline bool
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iosys_map_is_null(const struct iosys_map *ism)
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{
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@ -78,4 +87,53 @@ iosys_map_set_vaddr(struct iosys_map *ism, void *addr)
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ism->is_iomem = false;
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}
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static inline struct iosys_map
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IOSYS_MAP_INIT_OFFSET(struct iosys_map *ism, size_t off)
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{
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struct iosys_map nism = *ism;
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iosys_map_incr(&nism, off);
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return nism;
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}
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#if defined(__STDC_VERSION__) && __STDC_VERSION__ >= 201112
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#define iosys_map_rd(_ism, _o, _t) ({ \
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_t v; \
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if ((_ism)->is_iomem) { \
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void *addr = (_ism)->vaddr_iomem + (_o); \
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v = _Generic(v, \
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uint8_t : ioread8(addr), \
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uint16_t: ioread16(addr), \
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uint32_t: ioread32(addr), \
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uint64_t: ioread64(addr)); \
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} else \
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v = READ_ONCE(*(_t *)((_ism)->vaddr + (_o))); \
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v; \
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})
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#define iosys_map_wr(_ism, _o, _t, _v) ({ \
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_t v = (_v); \
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if ((_ism)->is_iomem) { \
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void *addr = (_ism)->vaddr_iomem + (_o); \
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_Generic(v, \
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uint8_t : iowrite8(v, addr), \
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uint16_t: iowrite16(v, addr), \
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uint32_t: iowrite32(v, addr), \
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uint64_t: iowrite64(v, addr)); \
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} else \
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WRITE_ONCE(*(_t *)((_ism)->vaddr + (_o)), v); \
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})
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#define iosys_map_rd_field(_ism, _o, _t, _f) ({ \
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_t *t; \
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iosys_map_rd(_ism, _o + offsetof(_t, _f), __typeof(t->_f)); \
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})
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#define iosys_map_wr_field(_ism, _o, _t, _f, _v) ({ \
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_t *t; \
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iosys_map_wr(_ism, _o + offsetof(_t, _f), __typeof(t->_f), _v); \
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})
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#endif /* C11 */
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#endif
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@ -1,4 +1,4 @@
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/* $OpenBSD: sdhc_pci.c,v 1.24 2022/03/11 18:00:51 mpi Exp $ */
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/* $OpenBSD: sdhc_pci.c,v 1.25 2024/03/28 23:38:54 jsg Exp $ */
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/*
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* Copyright (c) 2006 Uwe Stuehler <uwe@openbsd.org>
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@ -131,7 +131,8 @@ sdhc_pci_attach(struct device *parent, struct device *self, void *aux)
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(PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_INTEL_100SERIES_LP_EMMC ||
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PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_INTEL_APOLLOLAKE_EMMC ||
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PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_INTEL_GLK_EMMC ||
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PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_INTEL_JSL_EMMC))
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PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_INTEL_JSL_EMMC ||
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PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_INTEL_ADL_N_EMMC))
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sc->sc.sc_flags |= SDHC_F_NOPWR0;
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/* Some RICOH controllers need to be bumped into the right mode. */
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