sync with OpenBSD -current
This commit is contained in:
parent
85f0c6497f
commit
4bba23b895
36 changed files with 646 additions and 476 deletions
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@ -1,4 +1,4 @@
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|||
/* $OpenBSD: azalia.c,v 1.285 2023/11/23 14:24:06 jsg Exp $ */
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/* $OpenBSD: azalia.c,v 1.286 2024/03/06 00:11:25 jsg Exp $ */
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/* $NetBSD: azalia.c,v 1.20 2006/05/07 08:31:44 kent Exp $ */
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/*-
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@ -476,6 +476,7 @@ azalia_configure_pci(azalia_t *az)
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case PCI_PRODUCT_INTEL_JSL_HDA:
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case PCI_PRODUCT_INTEL_EHL_HDA:
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case PCI_PRODUCT_INTEL_ADL_N_HDA:
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case PCI_PRODUCT_INTEL_MTL_HDA:
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reg = azalia_pci_read(az->pc, az->tag,
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INTEL_PCIE_NOSNOOP_REG);
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reg &= INTEL_PCIE_NOSNOOP_MASK;
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@ -500,6 +501,7 @@ const struct pci_matchid azalia_pci_devices[] = {
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{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_HDA },
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{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_HDA },
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{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_HDA },
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{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_HDA },
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};
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int
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@ -1,4 +1,4 @@
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/* $OpenBSD: dwiic_pci.c,v 1.24 2023/11/23 14:24:06 jsg Exp $ */
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/* $OpenBSD: dwiic_pci.c,v 1.25 2024/03/06 00:11:25 jsg Exp $ */
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/*
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* Synopsys DesignWare I2C controller
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* PCI attachment
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@ -172,6 +172,12 @@ const struct pci_matchid dwiic_pci_ids[] = {
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{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_I2C_3 },
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{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_I2C_4 },
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{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_I2C_5 },
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{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_I2C_0 },
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{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_I2C_1 },
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{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_I2C_2 },
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{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_I2C_3 },
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{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_I2C_4 },
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{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_I2C_5 },
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};
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int
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@ -1,4 +1,4 @@
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/* $OpenBSD: ichiic.c,v 1.53 2024/02/21 22:57:11 jsg Exp $ */
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/* $OpenBSD: ichiic.c,v 1.54 2024/03/06 00:11:25 jsg Exp $ */
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/*
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* Copyright (c) 2005, 2006 Alexander Yurchenko <grange@openbsd.org>
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@ -141,6 +141,7 @@ const struct pci_matchid ichiic_ids[] = {
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{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_SMB },
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{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_SMB },
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{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_SMB },
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{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_SMB },
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};
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int
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@ -1,4 +1,4 @@
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$OpenBSD: pcidevs,v 1.2066 2024/03/04 05:34:07 jsg Exp $
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$OpenBSD: pcidevs,v 1.2067 2024/03/06 00:05:18 jsg Exp $
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/* $NetBSD: pcidevs,v 1.30 1997/06/24 06:20:24 thorpej Exp $ */
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/*
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@ -6374,7 +6374,97 @@ product INTEL 600SERIES_GSPI_2 0x7afb 600 Series GSPI
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product INTEL 600SERIES_I2C_4 0x7afc 600 Series I2C
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product INTEL 600SERIES_I2C_5 0x7afd 600 Series I2C
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product INTEL 600SERIES_UART_2 0x7afe 600 Series UART
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product INTEL MTL_U4_HB 0x7d00 Core Ultra Host
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product INTEL MTL_H_HB_2 0x7d01 Core Ultra Host
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product INTEL MTL_U_HB_2 0x7d02 Core Ultra Host
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product INTEL MTL_DTT 0x7d03 Core Ultra DTT
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product INTEL MTL_VMD 0x7d0b Core Ultra VMD
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product INTEL MTL_PMT 0x7d0d Core Ultra PMT
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product INTEL MTL_H_HB_1 0x7d14 Core Ultra Host
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product INTEL MTL_U_HB_1 0x7d16 Core Ultra Host
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product INTEL MTL_IPU 0x7d19 Core Ultra IPU
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product INTEL MTL_NPU 0x7d1d Core Ultra NPU
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product INTEL MTL_U4_GT_1 0x7d40 Graphics
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product INTEL MTL_U_GT_1 0x7d45 Graphics
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product INTEL MTL_H_GT_1 0x7d55 Arc Graphics
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product INTEL MTL_U_GT_2 0x7d60 Graphics
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product INTEL MTL_H_GT_2 0x7dd5 Graphics
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product INTEL MTL_H_ESPI 0x7e02 Core Ultra eSPI
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product INTEL MTL_U_ESPI 0x7e03 Core Ultra eSPI
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product INTEL MTL_U4_ESPI 0x7e07 Core Ultra eSPI
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product INTEL MTL_P2SB_SOC 0x7e20 Core Ultra P2SB
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product INTEL MTL_PMC_SOC 0x7e21 Core Ultra PMC
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product INTEL MTL_SMB 0x7e22 Core Ultra SMBus
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product INTEL MTL_SPI 0x7e23 Core Ultra SPI
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product INTEL MTL_TH 0x7e24 Core Ultra TH
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product INTEL MTL_UART_0 0x7e25 Core Ultra UART
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product INTEL MTL_UART_1 0x7e26 Core Ultra UART
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product INTEL MTL_GSPI_0 0x7e27 Core Ultra GSPI
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product INTEL MTL_HDA 0x7e28 Core Ultra HD Audio
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product INTEL MTL_GSPI_1 0x7e30 Core Ultra GSPI
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product INTEL MTL_PCIE_1 0x7e38 Core Ultra PCIE
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product INTEL MTL_PCIE_2 0x7e39 Core Ultra PCIE
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product INTEL MTL_PCIE_3 0x7e3a Core Ultra PCIE
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product INTEL MTL_PCIE_4 0x7e3b Core Ultra PCIE
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product INTEL MTL_PCIE_5 0x7e3c Core Ultra PCIE
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product INTEL MTL_PCIE_6 0x7e3d Core Ultra PCIE
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product INTEL MTL_PCIE_7 0x7e3e Core Ultra PCIE
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product INTEL MTL_PCIE_8 0x7e3f Core Ultra PCIE
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product INTEL WL_22500_14 0x7e40 Wi-Fi 6 AX210
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product INTEL MTL_ISH 0x7e45 Core Ultra ISH
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product INTEL MTL_GSPI_2 0x7e46 Core Ultra GSPI
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product INTEL MTL_THC_0_1 0x7e48 Core Ultra THC
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product INTEL MTL_THC_0_2 0x7e49 Core Ultra THC
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product INTEL MTL_THC_1_1 0x7e4a Core Ultra THC
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product INTEL MTL_THC_1_2 0x7e4b Core Ultra THC
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product INTEL MTL_GNA 0x7e4c Core Ultra GNA
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product INTEL MTL_PCIE_9 0x7e4d Core Ultra PCIE
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product INTEL MTL_I2C_4 0x7e50 Core Ultra I2C
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product INTEL MTL_I2C_5 0x7e51 Core Ultra I2C
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product INTEL MTL_UART_2 0x7e52 Core Ultra UART
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product INTEL MTL_HECI_5 0x7e58 Core Ultra HECI
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product INTEL MTL_HECI_6 0x7e59 Core Ultra HECI
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product INTEL MTL_HECI_7 0x7e5a Core Ultra HECI
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product INTEL MTL_AHCI 0x7e63 Core Ultra AHCI
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product INTEL MTL_RAID_1 0x7e67 Core Ultra RAID
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product INTEL MTL_HECI_1 0x7e70 Core Ultra HECI
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product INTEL MTL_HECI_2 0x7e71 Core Ultra HECI
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product INTEL MTL_IDER 0x7e72 Core Ultra IDE-R
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product INTEL MTL_KT 0x7e73 Core Ultra KT
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product INTEL MTL_HECI_3 0x7e74 Core Ultra HECI
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product INTEL MTL_HECI_4 0x7e75 Core Ultra HECI
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product INTEL MTL_I2C_0 0x7e78 Core Ultra I2C
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product INTEL MTL_I2C_1 0x7e79 Core Ultra I2C
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product INTEL MTL_I2C_2 0x7e7a Core Ultra I2C
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product INTEL MTL_I2C_3 0x7e7b Core Ultra I2C
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product INTEL MTL_I3C 0x7e7c Core Ultra I3C
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product INTEL MTL_XHCI_2 0x7e7d Core Ultra xHCI
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product INTEL MTL_XDCI_2 0x7e7e Core Ultra xDCI
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product INTEL MTL_SRAM 0x7e7f Core Ultra SRAM
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product INTEL MTL_U4_XHCI 0x7eb0 Core Ultra xHCI
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product INTEL MTL_U4_XDCI 0x7eb1 Core Ultra xDCI
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product INTEL MTL_U4_TBT_DMA0 0x7eb2 Core Ultra TBT
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product INTEL MTL_U4_PCIE_16 0x7eb4 Core Ultra PCIE
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product INTEL MTL_U4_PCIE_17 0x7eb5 Core Ultra PCIE
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product INTEL MTL_U4_P2SB_IOE 0x7eb8 Core Ultra P2SB
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product INTEL MTL_U4_IEH_IOE 0x7eb9 Core Ultra IEH
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product INTEL MTL_U4_PMC_IOE 0x7ebe Core Ultra PMC
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product INTEL MTL_U4_SRAM_IOE 0x7ebf Core Ultra SRAM
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product INTEL MTL_XHCI_1 0x7ec0 Core Ultra xHCI
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product INTEL MTL_XDCI_1 0x7ec1 Core Ultra xDCI
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product INTEL MTL_TBT_DMA0 0x7ec2 Core Ultra TBT
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product INTEL MTL_TBT_DMA1 0x7ec3 Core Ultra TBT
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product INTEL MTL_PCIE_16 0x7ec4 Core Ultra PCIE
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product INTEL MTL_PCIE_17 0x7ec5 Core Ultra PCIE
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product INTEL MTL_PCIE_18 0x7ec6 Core Ultra PCIE
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product INTEL MTL_PCIE_19 0x7ec7 Core Ultra PCIE
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product INTEL MTL_P2SB_IOE 0x7ec8 Core Ultra P2SB
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product INTEL MTL_IEH_IOE 0x7ec9 Core Ultra IEH
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product INTEL MTL_PCIE_10 0x7eca Core Ultra PCIE
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product INTEL MTL_PCIE_11 0x7ecb Core Ultra PCIE
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product INTEL MTL_H_PCIE_12 0x7ecc Core Ultra PCIE
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product INTEL MTL_PMC_IOE 0x7ece Core Ultra PMC
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product INTEL MTL_SRAM_IOE 0x7ecf Core Ultra SRAM
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product INTEL WL_22500_15 0x7f70 Wi-Fi 6 AX211
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product INTEL US15W_HB 0x8100 US15W Host
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product INTEL US15L_HB 0x8101 US15L/UL11L Host
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@ -2,7 +2,7 @@
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* THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT.
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*
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* generated from:
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* OpenBSD: pcidevs,v 1.2066 2024/03/04 05:34:07 jsg Exp
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* OpenBSD: pcidevs,v 1.2067 2024/03/06 00:05:18 jsg Exp
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*/
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/* $NetBSD: pcidevs,v 1.30 1997/06/24 06:20:24 thorpej Exp $ */
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@ -6379,7 +6379,97 @@
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#define PCI_PRODUCT_INTEL_600SERIES_I2C_4 0x7afc /* 600 Series I2C */
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#define PCI_PRODUCT_INTEL_600SERIES_I2C_5 0x7afd /* 600 Series I2C */
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#define PCI_PRODUCT_INTEL_600SERIES_UART_2 0x7afe /* 600 Series UART */
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#define PCI_PRODUCT_INTEL_MTL_U4_HB 0x7d00 /* Core Ultra Host */
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#define PCI_PRODUCT_INTEL_MTL_H_HB_2 0x7d01 /* Core Ultra Host */
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#define PCI_PRODUCT_INTEL_MTL_U_HB_2 0x7d02 /* Core Ultra Host */
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#define PCI_PRODUCT_INTEL_MTL_DTT 0x7d03 /* Core Ultra DTT */
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#define PCI_PRODUCT_INTEL_MTL_VMD 0x7d0b /* Core Ultra VMD */
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#define PCI_PRODUCT_INTEL_MTL_PMT 0x7d0d /* Core Ultra PMT */
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#define PCI_PRODUCT_INTEL_MTL_H_HB_1 0x7d14 /* Core Ultra Host */
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#define PCI_PRODUCT_INTEL_MTL_U_HB_1 0x7d16 /* Core Ultra Host */
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#define PCI_PRODUCT_INTEL_MTL_IPU 0x7d19 /* Core Ultra IPU */
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#define PCI_PRODUCT_INTEL_MTL_NPU 0x7d1d /* Core Ultra NPU */
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#define PCI_PRODUCT_INTEL_MTL_U4_GT_1 0x7d40 /* Graphics */
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#define PCI_PRODUCT_INTEL_MTL_U_GT_1 0x7d45 /* Graphics */
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#define PCI_PRODUCT_INTEL_MTL_H_GT_1 0x7d55 /* Arc Graphics */
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#define PCI_PRODUCT_INTEL_MTL_U_GT_2 0x7d60 /* Graphics */
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#define PCI_PRODUCT_INTEL_MTL_H_GT_2 0x7dd5 /* Graphics */
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#define PCI_PRODUCT_INTEL_MTL_H_ESPI 0x7e02 /* Core Ultra eSPI */
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#define PCI_PRODUCT_INTEL_MTL_U_ESPI 0x7e03 /* Core Ultra eSPI */
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#define PCI_PRODUCT_INTEL_MTL_U4_ESPI 0x7e07 /* Core Ultra eSPI */
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#define PCI_PRODUCT_INTEL_MTL_P2SB_SOC 0x7e20 /* Core Ultra P2SB */
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#define PCI_PRODUCT_INTEL_MTL_PMC_SOC 0x7e21 /* Core Ultra PMC */
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#define PCI_PRODUCT_INTEL_MTL_SMB 0x7e22 /* Core Ultra SMBus */
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#define PCI_PRODUCT_INTEL_MTL_SPI 0x7e23 /* Core Ultra SPI */
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#define PCI_PRODUCT_INTEL_MTL_TH 0x7e24 /* Core Ultra TH */
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#define PCI_PRODUCT_INTEL_MTL_UART_0 0x7e25 /* Core Ultra UART */
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#define PCI_PRODUCT_INTEL_MTL_UART_1 0x7e26 /* Core Ultra UART */
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#define PCI_PRODUCT_INTEL_MTL_GSPI_0 0x7e27 /* Core Ultra GSPI */
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#define PCI_PRODUCT_INTEL_MTL_HDA 0x7e28 /* Core Ultra HD Audio */
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#define PCI_PRODUCT_INTEL_MTL_GSPI_1 0x7e30 /* Core Ultra GSPI */
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#define PCI_PRODUCT_INTEL_MTL_PCIE_1 0x7e38 /* Core Ultra PCIE */
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#define PCI_PRODUCT_INTEL_MTL_PCIE_2 0x7e39 /* Core Ultra PCIE */
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#define PCI_PRODUCT_INTEL_MTL_PCIE_3 0x7e3a /* Core Ultra PCIE */
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#define PCI_PRODUCT_INTEL_MTL_PCIE_4 0x7e3b /* Core Ultra PCIE */
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#define PCI_PRODUCT_INTEL_MTL_PCIE_5 0x7e3c /* Core Ultra PCIE */
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#define PCI_PRODUCT_INTEL_MTL_PCIE_6 0x7e3d /* Core Ultra PCIE */
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#define PCI_PRODUCT_INTEL_MTL_PCIE_7 0x7e3e /* Core Ultra PCIE */
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#define PCI_PRODUCT_INTEL_MTL_PCIE_8 0x7e3f /* Core Ultra PCIE */
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#define PCI_PRODUCT_INTEL_WL_22500_14 0x7e40 /* Wi-Fi 6 AX210 */
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#define PCI_PRODUCT_INTEL_MTL_ISH 0x7e45 /* Core Ultra ISH */
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#define PCI_PRODUCT_INTEL_MTL_GSPI_2 0x7e46 /* Core Ultra GSPI */
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#define PCI_PRODUCT_INTEL_MTL_THC_0_1 0x7e48 /* Core Ultra THC */
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#define PCI_PRODUCT_INTEL_MTL_THC_0_2 0x7e49 /* Core Ultra THC */
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#define PCI_PRODUCT_INTEL_MTL_THC_1_1 0x7e4a /* Core Ultra THC */
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#define PCI_PRODUCT_INTEL_MTL_THC_1_2 0x7e4b /* Core Ultra THC */
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#define PCI_PRODUCT_INTEL_MTL_GNA 0x7e4c /* Core Ultra GNA */
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#define PCI_PRODUCT_INTEL_MTL_PCIE_9 0x7e4d /* Core Ultra PCIE */
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#define PCI_PRODUCT_INTEL_MTL_I2C_4 0x7e50 /* Core Ultra I2C */
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#define PCI_PRODUCT_INTEL_MTL_I2C_5 0x7e51 /* Core Ultra I2C */
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#define PCI_PRODUCT_INTEL_MTL_UART_2 0x7e52 /* Core Ultra UART */
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#define PCI_PRODUCT_INTEL_MTL_HECI_5 0x7e58 /* Core Ultra HECI */
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#define PCI_PRODUCT_INTEL_MTL_HECI_6 0x7e59 /* Core Ultra HECI */
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#define PCI_PRODUCT_INTEL_MTL_HECI_7 0x7e5a /* Core Ultra HECI */
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#define PCI_PRODUCT_INTEL_MTL_AHCI 0x7e63 /* Core Ultra AHCI */
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#define PCI_PRODUCT_INTEL_MTL_RAID_1 0x7e67 /* Core Ultra RAID */
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#define PCI_PRODUCT_INTEL_MTL_HECI_1 0x7e70 /* Core Ultra HECI */
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#define PCI_PRODUCT_INTEL_MTL_HECI_2 0x7e71 /* Core Ultra HECI */
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#define PCI_PRODUCT_INTEL_MTL_IDER 0x7e72 /* Core Ultra IDE-R */
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#define PCI_PRODUCT_INTEL_MTL_KT 0x7e73 /* Core Ultra KT */
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#define PCI_PRODUCT_INTEL_MTL_HECI_3 0x7e74 /* Core Ultra HECI */
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#define PCI_PRODUCT_INTEL_MTL_HECI_4 0x7e75 /* Core Ultra HECI */
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#define PCI_PRODUCT_INTEL_MTL_I2C_0 0x7e78 /* Core Ultra I2C */
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#define PCI_PRODUCT_INTEL_MTL_I2C_1 0x7e79 /* Core Ultra I2C */
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#define PCI_PRODUCT_INTEL_MTL_I2C_2 0x7e7a /* Core Ultra I2C */
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#define PCI_PRODUCT_INTEL_MTL_I2C_3 0x7e7b /* Core Ultra I2C */
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#define PCI_PRODUCT_INTEL_MTL_I3C 0x7e7c /* Core Ultra I3C */
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#define PCI_PRODUCT_INTEL_MTL_XHCI_2 0x7e7d /* Core Ultra xHCI */
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#define PCI_PRODUCT_INTEL_MTL_XDCI_2 0x7e7e /* Core Ultra xDCI */
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#define PCI_PRODUCT_INTEL_MTL_SRAM 0x7e7f /* Core Ultra SRAM */
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#define PCI_PRODUCT_INTEL_MTL_U4_XHCI 0x7eb0 /* Core Ultra xHCI */
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#define PCI_PRODUCT_INTEL_MTL_U4_XDCI 0x7eb1 /* Core Ultra xDCI */
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#define PCI_PRODUCT_INTEL_MTL_U4_TBT_DMA0 0x7eb2 /* Core Ultra TBT */
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#define PCI_PRODUCT_INTEL_MTL_U4_PCIE_16 0x7eb4 /* Core Ultra PCIE */
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#define PCI_PRODUCT_INTEL_MTL_U4_PCIE_17 0x7eb5 /* Core Ultra PCIE */
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#define PCI_PRODUCT_INTEL_MTL_U4_P2SB_IOE 0x7eb8 /* Core Ultra P2SB */
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#define PCI_PRODUCT_INTEL_MTL_U4_IEH_IOE 0x7eb9 /* Core Ultra IEH */
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#define PCI_PRODUCT_INTEL_MTL_U4_PMC_IOE 0x7ebe /* Core Ultra PMC */
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#define PCI_PRODUCT_INTEL_MTL_U4_SRAM_IOE 0x7ebf /* Core Ultra SRAM */
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#define PCI_PRODUCT_INTEL_MTL_XHCI_1 0x7ec0 /* Core Ultra xHCI */
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#define PCI_PRODUCT_INTEL_MTL_XDCI_1 0x7ec1 /* Core Ultra xDCI */
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#define PCI_PRODUCT_INTEL_MTL_TBT_DMA0 0x7ec2 /* Core Ultra TBT */
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#define PCI_PRODUCT_INTEL_MTL_TBT_DMA1 0x7ec3 /* Core Ultra TBT */
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#define PCI_PRODUCT_INTEL_MTL_PCIE_16 0x7ec4 /* Core Ultra PCIE */
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#define PCI_PRODUCT_INTEL_MTL_PCIE_17 0x7ec5 /* Core Ultra PCIE */
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#define PCI_PRODUCT_INTEL_MTL_PCIE_18 0x7ec6 /* Core Ultra PCIE */
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#define PCI_PRODUCT_INTEL_MTL_PCIE_19 0x7ec7 /* Core Ultra PCIE */
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#define PCI_PRODUCT_INTEL_MTL_P2SB_IOE 0x7ec8 /* Core Ultra P2SB */
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#define PCI_PRODUCT_INTEL_MTL_IEH_IOE 0x7ec9 /* Core Ultra IEH */
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#define PCI_PRODUCT_INTEL_MTL_PCIE_10 0x7eca /* Core Ultra PCIE */
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#define PCI_PRODUCT_INTEL_MTL_PCIE_11 0x7ecb /* Core Ultra PCIE */
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#define PCI_PRODUCT_INTEL_MTL_H_PCIE_12 0x7ecc /* Core Ultra PCIE */
|
||||
#define PCI_PRODUCT_INTEL_MTL_PMC_IOE 0x7ece /* Core Ultra PMC */
|
||||
#define PCI_PRODUCT_INTEL_MTL_SRAM_IOE 0x7ecf /* Core Ultra SRAM */
|
||||
#define PCI_PRODUCT_INTEL_WL_22500_15 0x7f70 /* Wi-Fi 6 AX211 */
|
||||
#define PCI_PRODUCT_INTEL_US15W_HB 0x8100 /* US15W Host */
|
||||
#define PCI_PRODUCT_INTEL_US15L_HB 0x8101 /* US15L/UL11L Host */
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT.
|
||||
*
|
||||
* generated from:
|
||||
* OpenBSD: pcidevs,v 1.2066 2024/03/04 05:34:07 jsg Exp
|
||||
* OpenBSD: pcidevs,v 1.2067 2024/03/06 00:05:18 jsg Exp
|
||||
*/
|
||||
|
||||
/* $NetBSD: pcidevs,v 1.30 1997/06/24 06:20:24 thorpej Exp $ */
|
||||
|
@ -22855,10 +22855,370 @@ static const struct pci_known_product pci_known_products[] = {
|
|||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_600SERIES_UART_2,
|
||||
"600 Series UART",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_U4_HB,
|
||||
"Core Ultra Host",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_H_HB_2,
|
||||
"Core Ultra Host",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_U_HB_2,
|
||||
"Core Ultra Host",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_DTT,
|
||||
"Core Ultra DTT",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_VMD,
|
||||
"Core Ultra VMD",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_PMT,
|
||||
"Core Ultra PMT",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_H_HB_1,
|
||||
"Core Ultra Host",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_U_HB_1,
|
||||
"Core Ultra Host",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_IPU,
|
||||
"Core Ultra IPU",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_NPU,
|
||||
"Core Ultra NPU",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_U4_GT_1,
|
||||
"Graphics",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_U_GT_1,
|
||||
"Graphics",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_H_GT_1,
|
||||
"Arc Graphics",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_U_GT_2,
|
||||
"Graphics",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_H_GT_2,
|
||||
"Graphics",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_H_ESPI,
|
||||
"Core Ultra eSPI",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_U_ESPI,
|
||||
"Core Ultra eSPI",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_U4_ESPI,
|
||||
"Core Ultra eSPI",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_P2SB_SOC,
|
||||
"Core Ultra P2SB",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_PMC_SOC,
|
||||
"Core Ultra PMC",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_SMB,
|
||||
"Core Ultra SMBus",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_SPI,
|
||||
"Core Ultra SPI",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_TH,
|
||||
"Core Ultra TH",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_UART_0,
|
||||
"Core Ultra UART",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_UART_1,
|
||||
"Core Ultra UART",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_GSPI_0,
|
||||
"Core Ultra GSPI",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_HDA,
|
||||
"Core Ultra HD Audio",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_GSPI_1,
|
||||
"Core Ultra GSPI",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_PCIE_1,
|
||||
"Core Ultra PCIE",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_PCIE_2,
|
||||
"Core Ultra PCIE",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_PCIE_3,
|
||||
"Core Ultra PCIE",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_PCIE_4,
|
||||
"Core Ultra PCIE",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_PCIE_5,
|
||||
"Core Ultra PCIE",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_PCIE_6,
|
||||
"Core Ultra PCIE",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_PCIE_7,
|
||||
"Core Ultra PCIE",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_PCIE_8,
|
||||
"Core Ultra PCIE",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WL_22500_14,
|
||||
"Wi-Fi 6 AX210",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_ISH,
|
||||
"Core Ultra ISH",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_GSPI_2,
|
||||
"Core Ultra GSPI",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_THC_0_1,
|
||||
"Core Ultra THC",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_THC_0_2,
|
||||
"Core Ultra THC",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_THC_1_1,
|
||||
"Core Ultra THC",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_THC_1_2,
|
||||
"Core Ultra THC",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_GNA,
|
||||
"Core Ultra GNA",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_PCIE_9,
|
||||
"Core Ultra PCIE",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_I2C_4,
|
||||
"Core Ultra I2C",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_I2C_5,
|
||||
"Core Ultra I2C",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_UART_2,
|
||||
"Core Ultra UART",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_HECI_5,
|
||||
"Core Ultra HECI",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_HECI_6,
|
||||
"Core Ultra HECI",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_HECI_7,
|
||||
"Core Ultra HECI",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_AHCI,
|
||||
"Core Ultra AHCI",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_RAID_1,
|
||||
"Core Ultra RAID",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_HECI_1,
|
||||
"Core Ultra HECI",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_HECI_2,
|
||||
"Core Ultra HECI",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_IDER,
|
||||
"Core Ultra IDE-R",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_KT,
|
||||
"Core Ultra KT",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_HECI_3,
|
||||
"Core Ultra HECI",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_HECI_4,
|
||||
"Core Ultra HECI",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_I2C_0,
|
||||
"Core Ultra I2C",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_I2C_1,
|
||||
"Core Ultra I2C",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_I2C_2,
|
||||
"Core Ultra I2C",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_I2C_3,
|
||||
"Core Ultra I2C",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_I3C,
|
||||
"Core Ultra I3C",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_XHCI_2,
|
||||
"Core Ultra xHCI",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_XDCI_2,
|
||||
"Core Ultra xDCI",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_SRAM,
|
||||
"Core Ultra SRAM",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_U4_XHCI,
|
||||
"Core Ultra xHCI",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_U4_XDCI,
|
||||
"Core Ultra xDCI",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_U4_TBT_DMA0,
|
||||
"Core Ultra TBT",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_U4_PCIE_16,
|
||||
"Core Ultra PCIE",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_U4_PCIE_17,
|
||||
"Core Ultra PCIE",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_U4_P2SB_IOE,
|
||||
"Core Ultra P2SB",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_U4_IEH_IOE,
|
||||
"Core Ultra IEH",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_U4_PMC_IOE,
|
||||
"Core Ultra PMC",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_U4_SRAM_IOE,
|
||||
"Core Ultra SRAM",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_XHCI_1,
|
||||
"Core Ultra xHCI",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_XDCI_1,
|
||||
"Core Ultra xDCI",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_TBT_DMA0,
|
||||
"Core Ultra TBT",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_TBT_DMA1,
|
||||
"Core Ultra TBT",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_PCIE_16,
|
||||
"Core Ultra PCIE",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_PCIE_17,
|
||||
"Core Ultra PCIE",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_PCIE_18,
|
||||
"Core Ultra PCIE",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_PCIE_19,
|
||||
"Core Ultra PCIE",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_P2SB_IOE,
|
||||
"Core Ultra P2SB",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_IEH_IOE,
|
||||
"Core Ultra IEH",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_PCIE_10,
|
||||
"Core Ultra PCIE",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_PCIE_11,
|
||||
"Core Ultra PCIE",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_H_PCIE_12,
|
||||
"Core Ultra PCIE",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_PMC_IOE,
|
||||
"Core Ultra PMC",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_SRAM_IOE,
|
||||
"Core Ultra SRAM",
|
||||
},
|
||||
{
|
||||
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WL_22500_15,
|
||||
"Wi-Fi 6 AX211",
|
||||
|
|
|
@ -1,4 +1,4 @@
|
|||
/* $OpenBSD: pucdata.c,v 1.119 2024/01/28 03:01:39 jsg Exp $ */
|
||||
/* $OpenBSD: pucdata.c,v 1.120 2024/03/06 00:11:25 jsg Exp $ */
|
||||
/* $NetBSD: pucdata.c,v 1.6 1999/07/03 05:55:23 cgd Exp $ */
|
||||
|
||||
/*
|
||||
|
@ -187,6 +187,13 @@ const struct puc_device_description puc_devs[] = {
|
|||
{ PUC_PORT_COM, 0x10, 0x0000 },
|
||||
},
|
||||
},
|
||||
{ /* MTL KT */
|
||||
{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MTL_KT, 0x0000, 0x0000 },
|
||||
{ 0xffff, 0xffff, 0x0000, 0x0000 },
|
||||
{
|
||||
{ PUC_PORT_COM, 0x10, 0x0000 },
|
||||
},
|
||||
},
|
||||
{ /* 82946GZ KT */
|
||||
{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82946GZ_KT, 0x0000, 0x0000 },
|
||||
{ 0xffff, 0xffff, 0x0000, 0x0000 },
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue