sync code with last fixes and improvements from OpenBSD
This commit is contained in:
parent
691f97cc10
commit
371ae113c6
GPG key ID:
F42C07F07E2E35B7
175 changed files with 2932 additions and 1512 deletions
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@ -1,4 +1,4 @@
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/* $OpenBSD: if_vmx.c,v 1.70 2022/09/11 08:38:39 yasuoka Exp $ */
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/* $OpenBSD: if_vmx.c,v 1.78 2023/07/30 04:27:01 dlg Exp $ */
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/*
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* Copyright (c) 2013 Tsubai Masanari
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@ -61,31 +61,49 @@
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#define VMX_RX_GEN htole32(VMXNET3_RX_GEN_M << VMXNET3_RX_GEN_S)
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#define VMX_RXC_GEN htole32(VMXNET3_RXC_GEN_M << VMXNET3_RXC_GEN_S)
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struct vmx_dmamem {
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bus_dmamap_t vdm_map;
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bus_dma_segment_t vdm_seg;
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int vdm_nsegs;
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size_t vdm_size;
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caddr_t vdm_kva;
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};
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#define VMX_DMA_MAP(_vdm) ((_vdm)->vdm_map)
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#define VMX_DMA_DVA(_vdm) ((_vdm)->vdm_map->dm_segs[0].ds_addr)
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#define VMX_DMA_KVA(_vdm) ((void *)(_vdm)->vdm_kva)
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#define VMX_DMA_LEN(_vdm) ((_vdm)->vdm_size)
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struct vmxnet3_softc;
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struct vmxnet3_txring {
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struct vmx_dmamem dmamem;
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struct mbuf *m[NTXDESC];
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bus_dmamap_t dmap[NTXDESC];
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struct vmxnet3_txdesc *txd;
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u_int32_t gen;
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u_int prod;
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u_int cons;
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volatile u_int prod;
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volatile u_int cons;
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};
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struct vmxnet3_rxring {
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struct vmxnet3_softc *sc;
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struct vmxnet3_rxq_shared *rs; /* copy of the rxqueue rs */
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struct vmx_dmamem dmamem;
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struct mbuf *m[NRXDESC];
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bus_dmamap_t dmap[NRXDESC];
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struct mutex mtx;
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struct if_rxring rxr;
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struct timeout refill;
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struct vmxnet3_rxdesc *rxd;
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bus_size_t rxh;
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u_int fill;
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u_int32_t gen;
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u_int8_t rid;
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};
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struct vmxnet3_comp_ring {
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struct vmx_dmamem dmamem;
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union {
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struct vmxnet3_txcompdesc *txcd;
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struct vmxnet3_rxcompdesc *rxcd;
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@ -101,6 +119,7 @@ struct vmxnet3_txqueue {
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struct vmxnet3_txq_shared *ts;
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struct ifqueue *ifq;
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struct kstat *txkstat;
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unsigned int queue;
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} __aligned(64);
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struct vmxnet3_rxqueue {
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@ -193,6 +212,12 @@ void vmxnet3_media_status(struct ifnet *, struct ifmediareq *);
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int vmxnet3_media_change(struct ifnet *);
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void *vmxnet3_dma_allocmem(struct vmxnet3_softc *, u_int, u_int, bus_addr_t *);
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static int vmx_dmamem_alloc(struct vmxnet3_softc *, struct vmx_dmamem *,
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bus_size_t, u_int);
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#ifdef notyet
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static void vmx_dmamem_free(struct vmxnet3_softc *, struct vmx_dmamem *);
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#endif
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#if NKSTAT > 0
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static void vmx_kstat_init(struct vmxnet3_softc *);
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static void vmx_kstat_txstats(struct vmxnet3_softc *,
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@ -532,16 +557,18 @@ vmxnet3_alloc_txring(struct vmxnet3_softc *sc, int queue, int intr)
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struct vmxnet3_txq_shared *ts;
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struct vmxnet3_txring *ring = &tq->cmd_ring;
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struct vmxnet3_comp_ring *comp_ring = &tq->comp_ring;
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bus_addr_t pa, comp_pa;
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int idx;
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ring->txd = vmxnet3_dma_allocmem(sc, NTXDESC * sizeof ring->txd[0], 512, &pa);
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if (ring->txd == NULL)
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tq->queue = queue;
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if (vmx_dmamem_alloc(sc, &ring->dmamem,
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NTXDESC * sizeof(struct vmxnet3_txdesc), 512) != 0)
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return -1;
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comp_ring->txcd = vmxnet3_dma_allocmem(sc,
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NTXCOMPDESC * sizeof comp_ring->txcd[0], 512, &comp_pa);
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if (comp_ring->txcd == NULL)
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ring->txd = VMX_DMA_KVA(&ring->dmamem);
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if (vmx_dmamem_alloc(sc, &comp_ring->dmamem,
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NTXCOMPDESC * sizeof(comp_ring->txcd[0]), 512) != 0)
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return -1;
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comp_ring->txcd = VMX_DMA_KVA(&comp_ring->dmamem);
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for (idx = 0; idx < NTXDESC; idx++) {
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if (bus_dmamap_create(sc->sc_dmat, JUMBO_LEN, NTXSEGS,
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@ -553,9 +580,9 @@ vmxnet3_alloc_txring(struct vmxnet3_softc *sc, int queue, int intr)
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bzero(ts, sizeof *ts);
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ts->npending = 0;
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ts->intr_threshold = 1;
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ts->cmd_ring = pa;
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ts->cmd_ring = VMX_DMA_DVA(&ring->dmamem);
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ts->cmd_ring_len = NTXDESC;
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ts->comp_ring = comp_pa;
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ts->comp_ring = VMX_DMA_DVA(&comp_ring->dmamem);
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ts->comp_ring_len = NTXCOMPDESC;
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ts->driver_data = ~0ULL;
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ts->driver_data_len = 0;
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@ -572,21 +599,20 @@ vmxnet3_alloc_rxring(struct vmxnet3_softc *sc, int queue, int intr)
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struct vmxnet3_rxq_shared *rs;
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struct vmxnet3_rxring *ring;
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struct vmxnet3_comp_ring *comp_ring;
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bus_addr_t pa[2], comp_pa;
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int i, idx;
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for (i = 0; i < 2; i++) {
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ring = &rq->cmd_ring[i];
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ring->rxd = vmxnet3_dma_allocmem(sc, NRXDESC * sizeof ring->rxd[0],
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512, &pa[i]);
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if (ring->rxd == NULL)
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if (vmx_dmamem_alloc(sc, &ring->dmamem,
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NRXDESC * sizeof(struct vmxnet3_rxdesc), 512) != 0)
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return -1;
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ring->rxd = VMX_DMA_KVA(&ring->dmamem);
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}
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comp_ring = &rq->comp_ring;
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comp_ring->rxcd = vmxnet3_dma_allocmem(sc,
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NRXCOMPDESC * sizeof comp_ring->rxcd[0], 512, &comp_pa);
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if (comp_ring->rxcd == NULL)
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if (vmx_dmamem_alloc(sc, &comp_ring->dmamem,
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NRXCOMPDESC * sizeof(comp_ring->rxcd[0]), 512) != 0)
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return -1;
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comp_ring->rxcd = VMX_DMA_KVA(&comp_ring->dmamem);
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for (i = 0; i < 2; i++) {
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ring = &rq->cmd_ring[i];
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@ -599,15 +625,19 @@ vmxnet3_alloc_rxring(struct vmxnet3_softc *sc, int queue, int intr)
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JUMBO_LEN, 0, BUS_DMA_NOWAIT, &ring->dmap[idx]))
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return -1;
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}
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ring->rs = rq->rs;
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ring->rxh = (i == 0) ?
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VMXNET3_BAR0_RXH1(queue) : VMXNET3_BAR0_RXH2(queue);
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}
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rs = rq->rs;
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bzero(rs, sizeof *rs);
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rs->cmd_ring[0] = pa[0];
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rs->cmd_ring[1] = pa[1];
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rs->cmd_ring[0] = VMX_DMA_DVA(&rq->cmd_ring[0].dmamem);
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rs->cmd_ring[1] = VMX_DMA_DVA(&rq->cmd_ring[1].dmamem);
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rs->cmd_ring_len[0] = NRXDESC;
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rs->cmd_ring_len[1] = NRXDESC;
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rs->comp_ring = comp_pa;
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rs->comp_ring = VMX_DMA_DVA(&comp_ring->dmamem);
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rs->comp_ring_len = NRXCOMPDESC;
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rs->driver_data = ~0ULL;
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rs->driver_data_len = 0;
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@ -627,8 +657,16 @@ vmxnet3_txinit(struct vmxnet3_softc *sc, struct vmxnet3_txqueue *tq)
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ring->gen = VMX_TX_GEN;
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comp_ring->next = 0;
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comp_ring->gen = VMX_TXC_GEN;
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bzero(ring->txd, NTXDESC * sizeof ring->txd[0]);
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bzero(comp_ring->txcd, NTXCOMPDESC * sizeof comp_ring->txcd[0]);
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memset(VMX_DMA_KVA(&ring->dmamem), 0,
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VMX_DMA_LEN(&ring->dmamem));
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bus_dmamap_sync(sc->sc_dmat, VMX_DMA_MAP(&ring->dmamem),
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0, VMX_DMA_LEN(&ring->dmamem), BUS_DMASYNC_PREWRITE);
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memset(VMX_DMA_KVA(&comp_ring->dmamem), 0,
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VMX_DMA_LEN(&comp_ring->dmamem));
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bus_dmamap_sync(sc->sc_dmat, VMX_DMA_MAP(&comp_ring->dmamem),
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0, VMX_DMA_LEN(&comp_ring->dmamem), BUS_DMASYNC_PREREAD);
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ifq_clr_oactive(tq->ifq);
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}
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void
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@ -657,10 +695,17 @@ vmxnet3_rxfill(struct vmxnet3_rxring *ring)
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MUTEX_ASSERT_LOCKED(&ring->mtx);
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slots = if_rxr_get(&ring->rxr, NRXDESC);
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if (slots == 0)
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return;
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prod = ring->fill;
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rgen = ring->gen;
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for (slots = if_rxr_get(&ring->rxr, NRXDESC); slots > 0; slots--) {
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bus_dmamap_sync(sc->sc_dmat, VMX_DMA_MAP(&ring->dmamem),
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0, VMX_DMA_LEN(&ring->dmamem), BUS_DMASYNC_POSTWRITE);
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do {
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KASSERT(ring->m[prod] == NULL);
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m = MCLGETL(NULL, M_DONTWAIT, JUMBO_LEN);
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@ -681,7 +726,9 @@ vmxnet3_rxfill(struct vmxnet3_rxring *ring)
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rxd = &ring->rxd[prod];
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rxd->rx_addr = htole64(DMAADDR(map));
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membar_producer();
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bus_dmamap_sync(sc->sc_dmat, VMX_DMA_MAP(&ring->dmamem),
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0, VMX_DMA_LEN(&ring->dmamem),
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BUS_DMASYNC_PREWRITE|BUS_DMASYNC_POSTWRITE);
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rxd->rx_word2 = (htole32(m->m_pkthdr.len & VMXNET3_RX_LEN_M) <<
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VMXNET3_RX_LEN_S) | type | rgen;
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@ -689,7 +736,11 @@ vmxnet3_rxfill(struct vmxnet3_rxring *ring)
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prod = 0;
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rgen ^= VMX_RX_GEN;
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}
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}
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} while (--slots > 0);
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bus_dmamap_sync(sc->sc_dmat, VMX_DMA_MAP(&ring->dmamem),
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0, VMX_DMA_LEN(&ring->dmamem), BUS_DMASYNC_PREWRITE);
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if_rxr_put(&ring->rxr, slots);
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ring->fill = prod;
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@ -697,6 +748,9 @@ vmxnet3_rxfill(struct vmxnet3_rxring *ring)
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if (if_rxr_inuse(&ring->rxr) == 0)
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timeout_add(&ring->refill, 1);
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if (ring->rs->update_rxhead)
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WRITE_BAR0(sc, ring->rxh, prod);
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}
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void
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@ -708,10 +762,14 @@ vmxnet3_rxinit(struct vmxnet3_softc *sc, struct vmxnet3_rxqueue *rq)
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for (i = 0; i < 2; i++) {
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ring = &rq->cmd_ring[i];
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if_rxr_init(&ring->rxr, 2, NRXDESC - 1);
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ring->fill = 0;
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ring->gen = VMX_RX_GEN;
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bzero(ring->rxd, NRXDESC * sizeof ring->rxd[0]);
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if_rxr_init(&ring->rxr, 2, NRXDESC - 1);
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memset(VMX_DMA_KVA(&ring->dmamem), 0,
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VMX_DMA_LEN(&ring->dmamem));
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bus_dmamap_sync(sc->sc_dmat, VMX_DMA_MAP(&ring->dmamem),
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0, VMX_DMA_LEN(&ring->dmamem), BUS_DMASYNC_PREWRITE);
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}
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/* XXX only fill ring 0 */
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@ -723,15 +781,26 @@ vmxnet3_rxinit(struct vmxnet3_softc *sc, struct vmxnet3_rxqueue *rq)
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comp_ring = &rq->comp_ring;
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comp_ring->next = 0;
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comp_ring->gen = VMX_RXC_GEN;
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bzero(comp_ring->rxcd, NRXCOMPDESC * sizeof comp_ring->rxcd[0]);
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memset(VMX_DMA_KVA(&comp_ring->dmamem), 0,
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VMX_DMA_LEN(&comp_ring->dmamem));
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bus_dmamap_sync(sc->sc_dmat, VMX_DMA_MAP(&comp_ring->dmamem),
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0, VMX_DMA_LEN(&comp_ring->dmamem), BUS_DMASYNC_PREREAD);
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}
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void
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vmxnet3_txstop(struct vmxnet3_softc *sc, struct vmxnet3_txqueue *tq)
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{
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struct vmxnet3_txring *ring = &tq->cmd_ring;
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struct vmxnet3_comp_ring *comp_ring = &tq->comp_ring;
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struct ifqueue *ifq = tq->ifq;
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int idx;
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bus_dmamap_sync(sc->sc_dmat, VMX_DMA_MAP(&comp_ring->dmamem),
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0, VMX_DMA_LEN(&comp_ring->dmamem), BUS_DMASYNC_POSTREAD);
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bus_dmamap_sync(sc->sc_dmat, VMX_DMA_MAP(&ring->dmamem),
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0, VMX_DMA_LEN(&ring->dmamem), BUS_DMASYNC_POSTWRITE);
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for (idx = 0; idx < NTXDESC; idx++) {
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if (ring->m[idx]) {
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bus_dmamap_unload(sc->sc_dmat, ring->dmap[idx]);
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@ -739,16 +808,25 @@ vmxnet3_txstop(struct vmxnet3_softc *sc, struct vmxnet3_txqueue *tq)
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ring->m[idx] = NULL;
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}
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}
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ifq_purge(ifq);
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ifq_clr_oactive(ifq);
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}
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void
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vmxnet3_rxstop(struct vmxnet3_softc *sc, struct vmxnet3_rxqueue *rq)
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{
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struct vmxnet3_rxring *ring;
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struct vmxnet3_comp_ring *comp_ring = &rq->comp_ring;
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int i, idx;
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bus_dmamap_sync(sc->sc_dmat, VMX_DMA_MAP(&comp_ring->dmamem),
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0, VMX_DMA_LEN(&comp_ring->dmamem), BUS_DMASYNC_POSTREAD);
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for (i = 0; i < 2; i++) {
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ring = &rq->cmd_ring[i];
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bus_dmamap_sync(sc->sc_dmat, VMX_DMA_MAP(&ring->dmamem),
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0, VMX_DMA_LEN(&ring->dmamem), BUS_DMASYNC_POSTWRITE);
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timeout_del(&ring->refill);
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for (idx = 0; idx < NRXDESC; idx++) {
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struct mbuf *m = ring->m[idx];
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@ -924,18 +1002,22 @@ vmxnet3_txintr(struct vmxnet3_softc *sc, struct vmxnet3_txqueue *tq)
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struct vmxnet3_txcompdesc *txcd;
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bus_dmamap_t map;
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struct mbuf *m;
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u_int cons, next;
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u_int prod, cons, next;
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uint32_t rgen;
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prod = ring->prod;
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cons = ring->cons;
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if (cons == ring->prod)
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if (cons == prod)
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return;
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next = comp_ring->next;
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rgen = comp_ring->gen;
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/* postread */
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for (;;) {
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bus_dmamap_sync(sc->sc_dmat, VMX_DMA_MAP(&comp_ring->dmamem),
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0, VMX_DMA_LEN(&comp_ring->dmamem), BUS_DMASYNC_POSTREAD);
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do {
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txcd = &comp_ring->txcd[next];
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if ((txcd->txc_word3 & VMX_TXC_GEN) != rgen)
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break;
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@ -958,8 +1040,10 @@ vmxnet3_txintr(struct vmxnet3_softc *sc, struct vmxnet3_txqueue *tq)
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VMXNET3_TXC_EOPIDX_M;
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cons++;
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cons %= NTXDESC;
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}
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/* preread */
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} while (cons != prod);
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bus_dmamap_sync(sc->sc_dmat, VMX_DMA_MAP(&comp_ring->dmamem),
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0, VMX_DMA_LEN(&comp_ring->dmamem), BUS_DMASYNC_PREREAD);
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comp_ring->next = next;
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comp_ring->gen = rgen;
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@ -986,6 +1070,9 @@ vmxnet3_rxintr(struct vmxnet3_softc *sc, struct vmxnet3_rxqueue *rq)
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next = comp_ring->next;
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rgen = comp_ring->gen;
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bus_dmamap_sync(sc->sc_dmat, VMX_DMA_MAP(&comp_ring->dmamem),
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0, VMX_DMA_LEN(&comp_ring->dmamem), BUS_DMASYNC_POSTREAD);
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for (;;) {
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rxcd = &comp_ring->rxcd[next];
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if ((rxcd->rxc_word3 & VMX_RXC_GEN) != rgen)
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@ -1018,14 +1105,14 @@ vmxnet3_rxintr(struct vmxnet3_softc *sc, struct vmxnet3_rxqueue *rq)
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if (letoh32(rxcd->rxc_word2 & VMXNET3_RXC_ERROR)) {
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ifp->if_ierrors++;
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m_freem(m);
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goto skip_buffer;
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continue;
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}
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len = letoh32((rxcd->rxc_word2 >> VMXNET3_RXC_LEN_S) &
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VMXNET3_RXC_LEN_M);
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if (len < VMXNET3_MIN_MTU) {
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m_freem(m);
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goto skip_buffer;
|
||||
continue;
|
||||
}
|
||||
m->m_pkthdr.len = m->m_len = len;
|
||||
|
||||
|
|
@ -1042,22 +1129,11 @@ vmxnet3_rxintr(struct vmxnet3_softc *sc, struct vmxnet3_rxqueue *rq)
|
|||
}
|
||||
|
||||
ml_enqueue(&ml, m);
|
||||
|
||||
skip_buffer:
|
||||
if (rq->rs->update_rxhead) {
|
||||
u_int qid = letoh32((rxcd->rxc_word0 >>
|
||||
VMXNET3_RXC_QID_S) & VMXNET3_RXC_QID_M);
|
||||
|
||||
idx = (idx + 1) % NRXDESC;
|
||||
if (qid < sc->sc_nqueues) {
|
||||
WRITE_BAR0(sc, VMXNET3_BAR0_RXH1(qid), idx);
|
||||
} else {
|
||||
qid -= sc->sc_nqueues;
|
||||
WRITE_BAR0(sc, VMXNET3_BAR0_RXH2(qid), idx);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
bus_dmamap_sync(sc->sc_dmat, VMX_DMA_MAP(&comp_ring->dmamem),
|
||||
0, VMX_DMA_LEN(&comp_ring->dmamem), BUS_DMASYNC_PREREAD);
|
||||
|
||||
comp_ring->next = next;
|
||||
comp_ring->gen = rgen;
|
||||
|
||||
|
|
@ -1152,7 +1228,6 @@ vmxnet3_stop(struct ifnet *ifp)
|
|||
int queue;
|
||||
|
||||
ifp->if_flags &= ~IFF_RUNNING;
|
||||
ifq_clr_oactive(&ifp->if_snd);
|
||||
ifp->if_timer = 0;
|
||||
|
||||
vmxnet3_disable_all_intrs(sc);
|
||||
|
|
@ -1218,7 +1293,6 @@ vmxnet3_init(struct vmxnet3_softc *sc)
|
|||
vmxnet3_link_state(sc);
|
||||
|
||||
ifp->if_flags |= IFF_RUNNING;
|
||||
ifq_clr_oactive(&ifp->if_snd);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -1325,7 +1399,7 @@ vmxnet3_start(struct ifqueue *ifq)
|
|||
struct vmxnet3_txring *ring = &tq->cmd_ring;
|
||||
struct vmxnet3_txdesc *txd, *sop;
|
||||
bus_dmamap_t map;
|
||||
unsigned int prod, free, i;
|
||||
unsigned int prod, free, i;
|
||||
unsigned int post = 0;
|
||||
uint32_t rgen, gen;
|
||||
|
||||
|
|
@ -1337,6 +1411,9 @@ vmxnet3_start(struct ifqueue *ifq)
|
|||
free += NTXDESC;
|
||||
free -= prod;
|
||||
|
||||
bus_dmamap_sync(sc->sc_dmat, VMX_DMA_MAP(&ring->dmamem),
|
||||
0, VMX_DMA_LEN(&ring->dmamem), BUS_DMASYNC_POSTWRITE);
|
||||
|
||||
rgen = ring->gen;
|
||||
|
||||
for (;;) {
|
||||
|
|
@ -1391,21 +1468,26 @@ vmxnet3_start(struct ifqueue *ifq)
|
|||
VMXNET3_TX_VLANTAG_M) << VMXNET3_TX_VLANTAG_S);
|
||||
}
|
||||
|
||||
ring->prod = prod;
|
||||
/* Change the ownership by flipping the "generation" bit */
|
||||
membar_producer();
|
||||
bus_dmamap_sync(sc->sc_dmat, VMX_DMA_MAP(&ring->dmamem),
|
||||
0, VMX_DMA_LEN(&ring->dmamem),
|
||||
BUS_DMASYNC_PREWRITE|BUS_DMASYNC_POSTWRITE);
|
||||
sop->tx_word2 ^= VMX_TX_GEN;
|
||||
|
||||
free -= i;
|
||||
post = 1;
|
||||
}
|
||||
|
||||
bus_dmamap_sync(sc->sc_dmat, VMX_DMA_MAP(&ring->dmamem),
|
||||
0, VMX_DMA_LEN(&ring->dmamem), BUS_DMASYNC_PREWRITE);
|
||||
|
||||
if (!post)
|
||||
return;
|
||||
|
||||
ring->prod = prod;
|
||||
ring->gen = rgen;
|
||||
|
||||
WRITE_BAR0(sc, VMXNET3_BAR0_TXH(0), prod);
|
||||
WRITE_BAR0(sc, VMXNET3_BAR0_TXH(tq->queue), prod);
|
||||
}
|
||||
|
||||
void
|
||||
|
|
@ -1469,6 +1551,49 @@ vmxnet3_dma_allocmem(struct vmxnet3_softc *sc, u_int size, u_int align, bus_addr
|
|||
return va;
|
||||
}
|
||||
|
||||
static int
|
||||
vmx_dmamem_alloc(struct vmxnet3_softc *sc, struct vmx_dmamem *vdm,
|
||||
bus_size_t size, u_int align)
|
||||
{
|
||||
vdm->vdm_size = size;
|
||||
|
||||
if (bus_dmamap_create(sc->sc_dmat, vdm->vdm_size, 1,
|
||||
vdm->vdm_size, 0,
|
||||
BUS_DMA_WAITOK | BUS_DMA_ALLOCNOW | BUS_DMA_64BIT,
|
||||
&vdm->vdm_map) != 0)
|
||||
return (1);
|
||||
if (bus_dmamem_alloc(sc->sc_dmat, vdm->vdm_size,
|
||||
align, 0, &vdm->vdm_seg, 1, &vdm->vdm_nsegs,
|
||||
BUS_DMA_WAITOK | BUS_DMA_ZERO) != 0)
|
||||
goto destroy;
|
||||
if (bus_dmamem_map(sc->sc_dmat, &vdm->vdm_seg, vdm->vdm_nsegs,
|
||||
vdm->vdm_size, &vdm->vdm_kva, BUS_DMA_WAITOK) != 0)
|
||||
goto free;
|
||||
if (bus_dmamap_load(sc->sc_dmat, vdm->vdm_map, vdm->vdm_kva,
|
||||
vdm->vdm_size, NULL, BUS_DMA_WAITOK) != 0)
|
||||
goto unmap;
|
||||
|
||||
return (0);
|
||||
unmap:
|
||||
bus_dmamem_unmap(sc->sc_dmat, vdm->vdm_kva, vdm->vdm_size);
|
||||
free:
|
||||
bus_dmamem_free(sc->sc_dmat, &vdm->vdm_seg, 1);
|
||||
destroy:
|
||||
bus_dmamap_destroy(sc->sc_dmat, vdm->vdm_map);
|
||||
return (1);
|
||||
}
|
||||
|
||||
#ifdef notyet
|
||||
static void
|
||||
vmx_dmamem_free(struct vmxnet3_softc *sc, struct vmx_dmamem *vdm)
|
||||
{
|
||||
bus_dmamap_unload(sc->sc_dmat, vdm->vdm_map);
|
||||
bus_dmamem_unmap(sc->sc_dmat, vdm->vdm_kva, vdm->vdm_size);
|
||||
bus_dmamem_free(sc->sc_dmat, &vdm->vdm_seg, 1);
|
||||
bus_dmamap_destroy(sc->sc_dmat, vdm->vdm_map);
|
||||
}
|
||||
#endif
|
||||
|
||||
#if NKSTAT > 0
|
||||
/*
|
||||
* "hardware" counters are exported as separate kstats for each tx
|
||||
|
|
@ -1536,7 +1661,7 @@ vmx_kstat_read(struct kstat *ks)
|
|||
for (i = 0; i < n; i++)
|
||||
kstat_kv_u64(&kvs[i]) = lemtoh64(&vs[i]);
|
||||
|
||||
TIMEVAL_TO_TIMESPEC(&sc->sc_kstat_updated, &ks->ks_updated);
|
||||
TIMEVAL_TO_TIMESPEC(&sc->sc_kstat_updated, &ks->ks_updated);
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue