This commit is contained in:
purplerain 2023-07-06 21:55:14 +00:00
parent f1b2576417
commit 2a351e0cdc
Signed by: purplerain
GPG key ID: F42C07F07E2E35B7
347 changed files with 9596 additions and 5486 deletions

View file

@ -1,4 +1,4 @@
/* $OpenBSD: acpi.c,v 1.421 2023/06/29 20:58:08 dv Exp $ */
/* $OpenBSD: acpi.c,v 1.423 2023/07/06 06:58:07 deraadt Exp $ */
/*
* Copyright (c) 2005 Thorsten Lockert <tholo@sigmasoft.com>
* Copyright (c) 2005 Jordan Hargrave <jordan@openbsd.org>

View file

@ -1,4 +1,4 @@
/* $OpenBSD: acpi_x86.c,v 1.15 2022/03/06 15:12:00 deraadt Exp $ */
/* $OpenBSD: acpi_x86.c,v 1.17 2023/07/06 06:58:07 deraadt Exp $ */
/*
* Copyright (c) 2005 Thorsten Lockert <tholo@sigmasoft.com>
* Copyright (c) 2005 Jordan Hargrave <jordan@openbsd.org>

View file

@ -1,4 +1,4 @@
/* $OpenBSD: dt_prov_kprobe.c,v 1.4 2021/10/28 08:47:40 jasper Exp $ */
/* $OpenBSD: dt_prov_kprobe.c,v 1.7 2023/07/06 10:53:11 jasper Exp $ */
/*
* Copyright (c) 2020 Tom Rollet <tom.rollet@epita.fr>
@ -76,6 +76,12 @@ int nb_probes_return = 0;
#define KPROBE_RETURN "return"
#if defined(__amd64__)
#define KPROBE_IBT_1 0xf3
#define KPROBE_IBT_2 0x0f
#define KPROBE_IBT_3 0x1e
#define KPROBE_IBT_4 0xfa
#define KPROBE_IBT_SIZE 4
#define KPROBE_RETGUARD_MOV_1 0x4c
#define KPROBE_RETGUARD_MOV_2 0x8b
#define KPROBE_RETGUARD_MOV_3 0x1d
@ -88,10 +94,10 @@ int nb_probes_return = 0;
#define KPROBE_RETGUARD_XOR_SIZE 4
#define RET 0xc3
#define RET_INST 0xc3
#define RET_SIZE 1
#elif defined(__i386__)
#define POP_RBP 0x5d
#define POP_RBP_INST 0x5d
#define POP_RBP_SIZE 1
#endif
@ -154,20 +160,29 @@ dt_prov_kprobe_init(void)
continue;
#if defined(__amd64__)
/* Find if there is a retguard, if so move the inst pointer to the later 'push rbp' */
/*
* Find the IBT target and the retguard which follows it.
* Move the instruction pointer down to the 'push rbp' as needed.
*/
if (*((uint8_t *)inst) != SSF_INST) {
/* No retguards in i386 */
if (((uint8_t *)inst)[0] != KPROBE_RETGUARD_MOV_1 ||
((uint8_t *)inst)[1] != KPROBE_RETGUARD_MOV_2 ||
((uint8_t *)inst)[2] != KPROBE_RETGUARD_MOV_3 ||
((uint8_t *)inst)[KPROBE_RETGUARD_MOV_SIZE] != KPROBE_RETGUARD_XOR_1 ||
((uint8_t *)inst)[KPROBE_RETGUARD_MOV_SIZE + 1] != KPROBE_RETGUARD_XOR_2 ||
((uint8_t *)inst)[KPROBE_RETGUARD_MOV_SIZE + 2] != KPROBE_RETGUARD_XOR_3 ||
((uint8_t *)inst)[KPROBE_RETGUARD_MOV_SIZE + KPROBE_RETGUARD_XOR_SIZE] != SSF_INST)
if (((uint8_t *)inst)[0] != KPROBE_IBT_1 ||
((uint8_t *)inst)[1] != KPROBE_IBT_2 ||
((uint8_t *)inst)[2] != KPROBE_IBT_3 ||
((uint8_t *)inst)[3] != KPROBE_IBT_4)
continue;
inst = (vaddr_t)&(((uint8_t *)inst)[KPROBE_RETGUARD_MOV_SIZE + KPROBE_RETGUARD_XOR_SIZE]);
if (((uint8_t *)inst)[KPROBE_IBT_SIZE] != KPROBE_RETGUARD_MOV_1 ||
((uint8_t *)inst)[KPROBE_IBT_SIZE + 1] != KPROBE_RETGUARD_MOV_2 ||
((uint8_t *)inst)[KPROBE_IBT_SIZE + 2] != KPROBE_RETGUARD_MOV_3 ||
((uint8_t *)inst)[KPROBE_IBT_SIZE + KPROBE_RETGUARD_MOV_SIZE] != KPROBE_RETGUARD_XOR_1 ||
((uint8_t *)inst)[KPROBE_IBT_SIZE + KPROBE_RETGUARD_MOV_SIZE + 1] != KPROBE_RETGUARD_XOR_2 ||
((uint8_t *)inst)[KPROBE_IBT_SIZE + KPROBE_RETGUARD_MOV_SIZE + 2] != KPROBE_RETGUARD_XOR_3 ||
((uint8_t *)inst)[KPROBE_IBT_SIZE + KPROBE_RETGUARD_MOV_SIZE + KPROBE_RETGUARD_XOR_SIZE] != SSF_INST)
continue;
inst = (vaddr_t)&(((uint8_t *)inst)[KPROBE_IBT_SIZE + KPROBE_RETGUARD_MOV_SIZE + KPROBE_RETGUARD_XOR_SIZE]);
}
#elif defined(__i386__)
/* No retguard or IBT on i386 */
if (*((uint8_t *)inst) != SSF_INST)
continue;
#endif
@ -190,14 +205,9 @@ dt_prov_kprobe_init(void)
nb_probes++;
nb_probes_entry++;
/*
* Poor method to find the return point
* => we would need a disassembler to find all return points
* For now we start from the end of the function, iterate on
* int3 inserted for retguard until we find a ret
*/
#if defined(__amd64__)
if (*(uint8_t *)(limit - 1) != RET)
/* If there last instruction isn't a ret, just bail. */
if (*(uint8_t *)(limit - 1) != RET_INST)
continue;
inst = limit - 1;
#elif defined(__i386__)
@ -272,14 +282,14 @@ dt_prov_kprobe_dealloc(struct dt_probe *dtp, struct dt_softc *sc,
size = SSF_SIZE;
} else if (strcmp(dtp->dtp_name, KPROBE_RETURN) == 0) {
#if defined(__amd64__)
patch = RET;
patch = RET_INST;
size = RET_SIZE;
#elif defined(__i386__)
patch = POP_RBP;
patch = POP_RBP_INST;
size = POP_RBP_SIZE;
#endif
} else
KASSERT(0 && "Trying to dealloc not yet implemented probe type");
panic("Trying to dealloc not yet implemented probe type");
dtp->dtp_ref--;

View file

@ -1,4 +1,4 @@
/* $OpenBSD: dwmmc.c,v 1.27 2022/06/09 14:43:28 kettenis Exp $ */
/* $OpenBSD: dwmmc.c,v 1.29 2023/07/01 08:27:26 jsing Exp $ */
/*
* Copyright (c) 2017 Mark Kettenis
*
@ -275,7 +275,8 @@ dwmmc_match(struct device *parent, void *match, void *aux)
OF_is_compatible(faa->fa_node, "hisilicon,hi3670-dw-mshc") ||
OF_is_compatible(faa->fa_node, "rockchip,rk3288-dw-mshc") ||
OF_is_compatible(faa->fa_node, "samsung,exynos5420-dw-mshc") ||
OF_is_compatible(faa->fa_node, "snps,dw-mshc"));
OF_is_compatible(faa->fa_node, "snps,dw-mshc") ||
OF_is_compatible(faa->fa_node, "starfive,jh7110-mmc"));
}
void
@ -358,6 +359,10 @@ dwmmc_attach(struct device *parent, struct device *self, void *aux)
/* if ciu clock is missing the rate is clock-frequency */
if (sc->sc_clkbase == 0)
sc->sc_clkbase = freq;
if (sc->sc_clkbase == 0) {
printf(": no clock base\n");
return;
}
div = OF_getpropint(faa->fa_node, "samsung,dw-mshc-ciu-div", div);
sc->sc_clkbase /= (div + 1);

View file

@ -1,4 +1,4 @@
# $OpenBSD: files.fdt,v 1.194 2023/06/27 22:38:46 patrick Exp $
# $OpenBSD: files.fdt,v 1.195 2023/07/01 16:34:30 drahn Exp $
#
# Config file and device description for machine-independent FDT code.
# Included by ports that need it.
@ -669,6 +669,11 @@ device qcaoss
attach qcaoss at fdt
file dev/fdt/qcaoss.c qcaoss
# Qualcomm CPU Clock
device qccpu
attach qccpu at fdt
file dev/fdt/qccpu.c qccpu
device qcdwusb: fdt
attach qcdwusb at fdt
file dev/fdt/qcdwusb.c qcdwusb

View file

@ -1,4 +1,4 @@
/* $OpenBSD: if_dwge.c,v 1.16 2023/06/25 22:36:09 jmatthew Exp $ */
/* $OpenBSD: if_dwge.c,v 1.18 2023/07/06 08:32:37 jmatthew Exp $ */
/*
* Copyright (c) 2008, 2019 Mark Kettenis <kettenis@openbsd.org>
* Copyright (c) 2017 Patrick Wildt <patrick@blueri.se>
@ -267,10 +267,13 @@ struct dwge_softc {
bus_dma_tag_t sc_dmat;
void *sc_ih;
struct if_device sc_ifd;
struct arpcom sc_ac;
#define sc_lladdr sc_ac.ac_enaddr
struct mii_data sc_mii;
#define sc_media sc_mii.mii_media
uint64_t sc_fixed_media;
int sc_link;
int sc_phyloc;
int sc_force_thresh_dma_mode;
@ -386,7 +389,7 @@ dwge_attach(struct device *parent, struct device *self, void *aux)
{
struct dwge_softc *sc = (void *)self;
struct fdt_attach_args *faa = aux;
struct ifnet *ifp;
struct ifnet *ifp = &sc->sc_ac.ac_if;
uint32_t phy, phy_supply;
uint32_t axi_config;
uint32_t mode, pbl;
@ -457,6 +460,30 @@ dwge_attach(struct device *parent, struct device *self, void *aux)
/* Reset PHY */
dwge_reset_phy(sc);
node = OF_getnodebyname(faa->fa_node, "fixed-link");
if (node) {
ifp->if_baudrate = IF_Mbps(OF_getpropint(node, "speed", 0));
switch (OF_getpropint(node, "speed", 0)) {
case 1000:
sc->sc_fixed_media = IFM_ETHER | IFM_1000_T;
break;
case 100:
sc->sc_fixed_media = IFM_ETHER | IFM_100_TX;
break;
default:
sc->sc_fixed_media = IFM_ETHER | IFM_AUTO;
break;
}
if (OF_getpropbool(node, "full-duplex")) {
ifp->if_link_state = LINK_STATE_FULL_DUPLEX;
sc->sc_fixed_media |= IFM_FDX;
} else {
ifp->if_link_state = LINK_STATE_UP;
}
}
sc->sc_clk = clock_get_frequency(faa->fa_node, "stmmaceth");
if (sc->sc_clk > 250000000)
sc->sc_clk = GMAC_GMII_ADDR_CR_DIV_124;
@ -479,7 +506,6 @@ dwge_attach(struct device *parent, struct device *self, void *aux)
timeout_set(&sc->sc_tick, dwge_tick, sc);
timeout_set(&sc->sc_rxto, dwge_rxtick, sc);
ifp = &sc->sc_ac.ac_if;
ifp->if_softc = sc;
ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
ifp->if_xflags = IFXF_MPSAFE;
@ -576,14 +602,23 @@ dwge_attach(struct device *parent, struct device *self, void *aux)
dwge_write(sc, GMAC_AXI_BUS_MODE, mode);
}
mii_attach(self, &sc->sc_mii, 0xffffffff, sc->sc_phyloc,
(sc->sc_phyloc == MII_PHY_ANY) ? 0 : MII_OFFSET_ANY, 0);
if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) {
printf("%s: no PHY found!\n", sc->sc_dev.dv_xname);
ifmedia_add(&sc->sc_media, IFM_ETHER|IFM_MANUAL, 0, NULL);
ifmedia_set(&sc->sc_media, IFM_ETHER|IFM_MANUAL);
} else
ifmedia_set(&sc->sc_media, IFM_ETHER|IFM_AUTO);
if (sc->sc_fixed_media == 0) {
mii_attach(self, &sc->sc_mii, 0xffffffff, sc->sc_phyloc,
(sc->sc_phyloc == MII_PHY_ANY) ? 0 : MII_OFFSET_ANY, 0);
if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) {
printf("%s: no PHY found!\n", sc->sc_dev.dv_xname);
ifmedia_add(&sc->sc_media, IFM_ETHER|IFM_MANUAL, 0,
NULL);
ifmedia_set(&sc->sc_media, IFM_ETHER|IFM_MANUAL);
} else
ifmedia_set(&sc->sc_media, IFM_ETHER|IFM_AUTO);
} else {
ifmedia_add(&sc->sc_media, sc->sc_fixed_media, 0, NULL);
ifmedia_set(&sc->sc_media, sc->sc_fixed_media);
/* force a configuration of the clocks/mac */
sc->sc_mii.mii_statchg(self);
}
if_attach(ifp);
ether_ifattach(ifp);
@ -601,6 +636,10 @@ dwge_attach(struct device *parent, struct device *self, void *aux)
dwge_intr, sc, sc->sc_dev.dv_xname);
if (sc->sc_ih == NULL)
printf("%s: can't establish interrupt\n", sc->sc_dev.dv_xname);
sc->sc_ifd.if_node = faa->fa_node;
sc->sc_ifd.if_ifp = ifp;
if_register(&sc->sc_ifd);
}
void
@ -759,7 +798,10 @@ dwge_ioctl(struct ifnet *ifp, u_long cmd, caddr_t addr)
case SIOCGIFMEDIA:
case SIOCSIFMEDIA:
error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, cmd);
if (sc->sc_fixed_media != 0)
error = ENOTTY;
else
error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, cmd);
break;
case SIOCGIFRXR:
@ -858,11 +900,16 @@ dwge_mii_statchg(struct device *self)
{
struct dwge_softc *sc = (void *)self;
uint32_t conf;
uint64_t media_active;
conf = dwge_read(sc, GMAC_MAC_CONF);
conf &= ~(GMAC_MAC_CONF_PS | GMAC_MAC_CONF_FES);
switch (IFM_SUBTYPE(sc->sc_mii.mii_media_active)) {
media_active = sc->sc_fixed_media;
if (media_active == 0)
media_active = sc->sc_mii.mii_media_active;
switch (IFM_SUBTYPE(media_active)) {
case IFM_1000_SX:
case IFM_1000_LX:
case IFM_1000_CX:
@ -886,7 +933,7 @@ dwge_mii_statchg(struct device *self)
return;
conf &= ~GMAC_MAC_CONF_DM;
if ((sc->sc_mii.mii_media_active & IFM_GMASK) == IFM_FDX)
if ((media_active & IFM_GMASK) == IFM_FDX)
conf |= GMAC_MAC_CONF_DM;
/* XXX: RX/TX flow control? */
@ -1178,7 +1225,8 @@ dwge_up(struct dwge_softc *sc)
dwge_write(sc, GMAC_MAC_CONF, dwge_read(sc, GMAC_MAC_CONF) |
GMAC_MAC_CONF_TE | GMAC_MAC_CONF_RE);
timeout_add_sec(&sc->sc_tick, 1);
if (sc->sc_fixed_media == 0)
timeout_add_sec(&sc->sc_tick, 1);
}
void
@ -1190,7 +1238,8 @@ dwge_down(struct dwge_softc *sc)
int i;
timeout_del(&sc->sc_rxto);
timeout_del(&sc->sc_tick);
if (sc->sc_fixed_media == 0)
timeout_del(&sc->sc_tick);
ifp->if_flags &= ~IFF_RUNNING;
ifq_clr_oactive(&ifp->if_snd);
@ -1679,6 +1728,7 @@ dwge_mii_statchg_rockchip(struct device *self)
struct regmap *rm;
uint32_t grf;
uint32_t gmac_clk_sel = 0;
uint64_t media_active;
dwge_mii_statchg(self);
@ -1687,7 +1737,11 @@ dwge_mii_statchg_rockchip(struct device *self)
if (rm == NULL)
return;
switch (IFM_SUBTYPE(sc->sc_mii.mii_media_active)) {
media_active = sc->sc_fixed_media;
if (media_active == 0)
media_active = sc->sc_mii.mii_media_active;
switch (IFM_SUBTYPE(media_active)) {
case IFM_10_T:
gmac_clk_sel = sc->sc_clk_sel_2_5;
break;

View file

@ -1,4 +1,4 @@
/* $OpenBSD: if_dwqe_fdt.c,v 1.12 2023/05/30 08:30:01 jsg Exp $ */
/* $OpenBSD: if_dwqe_fdt.c,v 1.13 2023/07/04 12:58:42 kettenis Exp $ */
/*
* Copyright (c) 2008, 2019 Mark Kettenis <kettenis@openbsd.org>
* Copyright (c) 2017, 2022 Patrick Wildt <patrick@blueri.se>
@ -63,6 +63,7 @@
int dwqe_fdt_match(struct device *, void *, void *);
void dwqe_fdt_attach(struct device *, struct device *, void *);
void dwqe_setup_jh7110(struct dwqe_softc *);
void dwqe_setup_rk3568(struct dwqe_softc *);
void dwqe_mii_statchg_rk3568(struct device *);
void dwqe_mii_statchg_rk3588(struct device *);
@ -78,7 +79,8 @@ dwqe_fdt_match(struct device *parent, void *cfdata, void *aux)
{
struct fdt_attach_args *faa = aux;
return OF_is_compatible(faa->fa_node, "snps,dwmac-4.20a");
return OF_is_compatible(faa->fa_node, "snps,dwmac-4.20a") ||
OF_is_compatible(faa->fa_node, "snps,dwmac-5.20");
}
void
@ -103,14 +105,16 @@ dwqe_fdt_attach(struct device *parent, struct device *self, void *aux)
/* Decide GMAC id through address */
switch (faa->fa_reg[0].addr) {
case 0xfe2a0000:
case 0xfe2a0000: /* RK3568 */
case 0x16030000: /* JH7110 */
sc->sc_gmac_id = 0;
break;
case 0xfe010000:
case 0xfe010000: /* RK3568 */
case 0x16040000: /* JH7110 */
sc->sc_gmac_id = 1;
break;
default:
printf(": unknown controller\n");
printf(": unknown controller at 0x%llx\n", faa->fa_reg[0].addr);
return;
}
@ -143,8 +147,13 @@ dwqe_fdt_attach(struct device *parent, struct device *self, void *aux)
/* Enable clocks. */
clock_set_assigned(faa->fa_node);
clock_enable(faa->fa_node, "stmmaceth");
clock_enable(faa->fa_node, "pclk");
reset_deassert(faa->fa_node, "stmmaceth");
if (OF_is_compatible(faa->fa_node, "rockchip,rk3568-gmac")) {
reset_deassert(faa->fa_node, "ahb");
if (OF_is_compatible(faa->fa_node, "starfive,jh7110-dwmac")) {
clock_enable(faa->fa_node, "tx");
clock_enable(faa->fa_node, "gtx");
} else if (OF_is_compatible(faa->fa_node, "rockchip,rk3568-gmac")) {
clock_enable(faa->fa_node, "mac_clk_rx");
clock_enable(faa->fa_node, "mac_clk_tx");
clock_enable(faa->fa_node, "aclk_mac");
@ -153,7 +162,9 @@ dwqe_fdt_attach(struct device *parent, struct device *self, void *aux)
delay(5000);
/* Do hardware specific initializations. */
if (OF_is_compatible(faa->fa_node, "rockchip,rk3568-gmac"))
if (OF_is_compatible(faa->fa_node, "starfive,jh7110-dwmac"))
dwqe_setup_jh7110(sc);
else if (OF_is_compatible(faa->fa_node, "rockchip,rk3568-gmac"))
dwqe_setup_rk3568(sc);
/* Power up PHY. */
@ -292,6 +303,10 @@ dwqe_reset_phy(struct dwqe_softc *sc, uint32_t phy)
free(gpio, M_TEMP, len);
}
/* JH7110 registers */
#define JH7110_PHY_INTF_RGMII 1
#define JH7110_PHY_INTF_RMII 4
/* RK3568 registers */
#define RK3568_GRF_GMACx_CON0(x) (0x0380 + (x) * 0x8)
#define RK3568_GMAC_CLK_RX_DL_CFG(val) ((0x7f << 8) << 16 | ((val) << 8))
@ -304,6 +319,48 @@ dwqe_reset_phy(struct dwqe_softc *sc, uint32_t phy)
void dwqe_mii_statchg_rk3568_task(void *);
void
dwqe_setup_jh7110(struct dwqe_softc *sc)
{
struct regmap *rm;
uint32_t cells[3];
uint32_t phandle, offset, reg, shift;
char phy_mode[32];
uint32_t iface;
if (OF_getpropintarray(sc->sc_node, "starfive,syscon", cells,
sizeof(cells)) != sizeof(cells)) {
printf("%s: failed to get starfive,syscon\n", __func__);
return;
}
phandle = cells[0];
offset = cells[1];
shift = cells[2];
rm = regmap_byphandle(phandle);
if (rm == NULL) {
printf("%s: failed to get regmap\n", __func__);
return;
}
if (OF_getprop(sc->sc_node, "phy-mode", phy_mode,
sizeof(phy_mode)) <= 0)
return;
if (strcmp(phy_mode, "rgmii") == 0 ||
strcmp(phy_mode, "rgmii-id") == 0) {
iface = JH7110_PHY_INTF_RGMII;
} else if (strcmp(phy_mode, "rmii") == 0) {
iface = JH7110_PHY_INTF_RMII;
} else
return;
reg = regmap_read_4(rm, offset);
reg &= ~(((1U << 3) - 1) << shift);
reg |= iface << shift;
regmap_write_4(rm, offset, reg);
}
void
dwqe_setup_rk3568(struct dwqe_softc *sc)
{

287
sys/dev/fdt/qccpu.c Normal file
View file

@ -0,0 +1,287 @@
/* $OpenBSD: qccpu.c,v 1.2 2023/07/01 18:59:11 drahn Exp $ */
/*
* Copyright (c) 2023 Dale Rahn <drahn@openbsd.org>
*
* Permission to use, copy, modify, and distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/sensors.h>
#include <machine/intr.h>
#include <machine/bus.h>
#include <machine/fdt.h>
#include <dev/ofw/openfirm.h>
#include <dev/ofw/ofw_clock.h>
#include <dev/ofw/fdt.h>
#define CPUF_ENABLE 0x000
#define CPUF_DOMAIN_STATE 0x020
#define CPUF_DOMAIN_STATE_LVAL_M 0xff
#define CPUF_DOMAIN_STATE_LVAL_S 0
#define CPUF_DVCS_CTRL 0x0b0
#define CPUF_DVCS_CTRL_PER_CORE 0x1
#define CPUF_FREQ_LUT 0x100
#define CPUF_FREQ_LUT_SRC_M 0x1
#define CPUF_FREQ_LUT_SRC_S 30
#define CPUF_FREQ_LUT_CORES_M 0x7
#define CPUF_FREQ_LUT_CORES_S 16
#define CPUF_FREQ_LUT_LVAL_M 0xff
#define CPUF_FREQ_LUT_LVAL_S 0
#define CPUF_VOLT_LUT 0x200
#define CPUF_VOLT_LUT_IDX_M 0x2f
#define CPUF_VOLT_LUT_IDX_S 16
#define CPUF_VOLT_LUT_VOLT_M 0xfff
#define CPUF_VOLT_LUT_VOLT_S 0
#define CPUF_PERF_STATE 0x320
#define LUT_ROW_SIZE 4
struct cpu_freq_tbl {
uint32_t driver_data;
uint32_t frequency;
};
#define NUM_GROUP 2
#define MAX_LUT 40
#define XO_FREQ_HZ 19200000
struct qccpu_softc {
struct device sc_dev;
bus_space_tag_t sc_iot;
bus_space_handle_t sc_ioh[NUM_GROUP];
int sc_node;
struct clock_device sc_cd;
uint32_t sc_freq[NUM_GROUP][MAX_LUT];
int sc_num_lut[NUM_GROUP];
struct ksensordev sc_sensordev;
struct ksensor sc_hz_sensor[NUM_GROUP];
};
#define DEVNAME(sc) (sc)->sc_dev.dv_xname
int qccpu_match(struct device *, void *, void *);
void qccpu_attach(struct device *, struct device *, void *);
void qccpu_enable(void *, uint32_t *, int);
int qccpu_set_frequency(void *, uint32_t *, uint32_t);
uint32_t qccpu_get_frequency(void *, uint32_t *);
uint32_t qccpu_lut_to_freq(struct qccpu_softc *, int, uint32_t);
uint32_t qccpu_lut_to_cores(struct qccpu_softc *, int, uint32_t);
void qccpu_refresh_sensor(void *arg);
void qccpu_collect_lut(struct qccpu_softc *sc, int);
const struct cfattach qccpu_ca = {
sizeof (struct qccpu_softc), qccpu_match, qccpu_attach
};
struct cfdriver qccpu_cd = {
NULL, "qccpu", DV_DULL
};
int
qccpu_match(struct device *parent, void *match, void *aux)
{
struct fdt_attach_args *faa = aux;
return OF_is_compatible(faa->fa_node, "qcom,cpufreq-epss");
}
void
qccpu_attach(struct device *parent, struct device *self, void *aux)
{
struct qccpu_softc *sc = (struct qccpu_softc *)self;
struct fdt_attach_args *faa = aux;
if (faa->fa_nreg < 2) {
printf(": no registers\n");
return;
}
sc->sc_iot = faa->fa_iot;
if (bus_space_map(sc->sc_iot, faa->fa_reg[0].addr,
faa->fa_reg[0].size, 0, &sc->sc_ioh[0])) {
printf(": can't map registers (cluster0)\n");
return;
}
if (bus_space_map(sc->sc_iot, faa->fa_reg[1].addr,
faa->fa_reg[1].size, 0, &sc->sc_ioh[1])) {
printf(": can't map registers (cluster1)\n");
return;
}
sc->sc_node = faa->fa_node;
printf("\n");
qccpu_collect_lut(sc, 0);
qccpu_collect_lut(sc, 1);
sc->sc_cd.cd_node = faa->fa_node;
sc->sc_cd.cd_cookie = sc;
sc->sc_cd.cd_get_frequency = qccpu_get_frequency;
sc->sc_cd.cd_set_frequency = qccpu_set_frequency;
clock_register(&sc->sc_cd);
strlcpy(sc->sc_sensordev.xname, sc->sc_dev.dv_xname,
sizeof(sc->sc_sensordev.xname));
sc->sc_hz_sensor[0].type = SENSOR_FREQ;
sensor_attach(&sc->sc_sensordev, &sc->sc_hz_sensor[0]);
sc->sc_hz_sensor[1].type = SENSOR_FREQ;
sensor_attach(&sc->sc_sensordev, &sc->sc_hz_sensor[1]);
sensordev_install(&sc->sc_sensordev);
sensor_task_register(sc, qccpu_refresh_sensor, 1);
}
void
qccpu_collect_lut(struct qccpu_softc *sc, int group)
{
int prev_freq = 0;
uint32_t freq;
int idx;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh[group];
for (idx = 0; ; idx++) {
freq = bus_space_read_4(iot, ioh,
CPUF_FREQ_LUT + idx * LUT_ROW_SIZE);
if (idx != 0 && prev_freq == freq) {
sc->sc_num_lut[group] = idx;
break;
}
sc->sc_freq[group][idx] = freq;
#ifdef DEBUG
printf("%s: %d: %x %u\n", DEVNAME(sc), idx, freq,
qccpu_lut_to_freq(sc, idx, group));
#endif /* DEBUG */
prev_freq = freq;
if (idx >= MAX_LUT-1)
break;
}
return;
}
uint32_t
qccpu_get_frequency(void *cookie, uint32_t *cells)
{
struct qccpu_softc *sc = cookie;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh;
uint32_t lval;
uint32_t group;
if (cells[0] >= NUM_GROUP) {
printf("%s: bad cell %d\n", __func__, cells[0]);
return 0;
}
group = cells[0];
ioh = sc->sc_ioh[cells[0]];
lval = (bus_space_read_4(iot, ioh, CPUF_DOMAIN_STATE)
>> CPUF_DOMAIN_STATE_LVAL_S) & CPUF_DOMAIN_STATE_LVAL_M;
return lval *XO_FREQ_HZ;
}
int
qccpu_set_frequency(void *cookie, uint32_t *cells, uint32_t freq)
{
struct qccpu_softc *sc = cookie;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh;
int index = 0;
int numcores, i;
uint32_t group;
if (cells[0] >= NUM_GROUP) {
printf("%s: bad cell %d\n", __func__, cells[0]);
return 1;
}
group = cells[0];
ioh = sc->sc_ioh[group];
while (index < sc->sc_num_lut[group]) {
if (freq == qccpu_lut_to_freq(sc, index, group))
break;
if (freq < qccpu_lut_to_freq(sc, index, group)) {
/* select next slower if not match, not zero */
if (index != 0)
index = index - 1;
break;
}
index++;
}
#ifdef DEBUG
printf("%s called freq %u index %d\n", __func__, freq, index);
#endif /* DEBUG */
if ((bus_space_read_4(iot, ioh, CPUF_DVCS_CTRL) &
CPUF_DVCS_CTRL_PER_CORE) != 0)
numcores = qccpu_lut_to_cores(sc, index, group);
else
numcores = 1;
for (i = 0; i < numcores; i++)
bus_space_write_4(iot, ioh, CPUF_PERF_STATE + i * 4, index);
return 0;
}
uint32_t
qccpu_lut_to_freq(struct qccpu_softc *sc, int index, uint32_t group)
{
return XO_FREQ_HZ *
((sc->sc_freq[group][index] >> CPUF_FREQ_LUT_LVAL_S)
& CPUF_FREQ_LUT_LVAL_M);
}
uint32_t
qccpu_lut_to_cores(struct qccpu_softc *sc, int index, uint32_t group)
{
return ((sc->sc_freq[group][index] >> CPUF_FREQ_LUT_CORES_S)
& CPUF_FREQ_LUT_CORES_M);
}
void
qccpu_refresh_sensor(void *arg)
{
struct qccpu_softc *sc = arg;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh;
int idx;
uint32_t lval;
for (idx = 0; idx < NUM_GROUP; idx++) {
ioh = sc->sc_ioh[idx];
lval = (bus_space_read_4(iot, ioh, CPUF_DOMAIN_STATE)
>> CPUF_DOMAIN_STATE_LVAL_S) & CPUF_DOMAIN_STATE_LVAL_M;
sc->sc_hz_sensor[idx].value = 1000000ULL * lval * XO_FREQ_HZ;
}
}

View file

@ -1,4 +1,4 @@
/* $OpenBSD: qcpas.c,v 1.1 2023/06/10 18:31:38 patrick Exp $ */
/* $OpenBSD: qcpas.c,v 1.2 2023/07/01 15:50:18 drahn Exp $ */
/*
* Copyright (c) 2023 Patrick Wildt <patrick@blueri.se>
*
@ -1111,6 +1111,7 @@ struct battmgr_bat_status {
uint32_t rate;
uint32_t battery_voltage;
uint32_t power_state;
#define BATTMGR_PWR_STATE_AC_ON (1 << 0)
uint32_t charging_source;
#define BATTMGR_CHARGING_SOURCE_AC 1
#define BATTMGR_CHARGING_SOURCE_USB 2
@ -1175,6 +1176,7 @@ qcpas_pmic_rtr_recv(void *cookie, uint8_t *buf, int len)
{
struct pmic_glink_hdr hdr;
uint32_t notification;
extern int hw_power;
if (len < sizeof(hdr)) {
printf("%s: pmic glink message too small\n",
@ -1256,6 +1258,14 @@ qcpas_pmic_rtr_recv(void *cookie, uint8_t *buf, int len)
info->battery_state = APM_BATT_CHARGING;
else if (bat->battery_state & BATTMGR_BAT_STATE_CRITICAL_LOW)
info->battery_state = APM_BATT_CRITICAL;
if (bat->power_state & BATTMGR_PWR_STATE_AC_ON) {
info->ac_state = APM_AC_ON;
hw_power = 1;
} else {
info->ac_state = APM_AC_OFF;
hw_power = 0;
}
#endif
free(bat, M_TEMP, sizeof(*bat));
break;

View file

@ -1,4 +1,4 @@
/* $OpenBSD: qcsmptp.c,v 1.1 2023/05/19 21:26:10 patrick Exp $ */
/* $OpenBSD: qcsmptp.c,v 1.2 2023/07/04 14:32:21 patrick Exp $ */
/*
* Copyright (c) 2023 Patrick Wildt <patrick@blueri.se>
*
@ -182,6 +182,18 @@ qcsmptp_deferred(struct device *self)
return;
}
if (qcsmem_alloc(sc->sc_remote_pid, sc->sc_smem_id[0],
sizeof(*sc->sc_in)) != 0) {
printf(": can't alloc smp2p item\n");
return;
}
sc->sc_in = qcsmem_get(sc->sc_remote_pid, sc->sc_smem_id[0], NULL);
if (sc->sc_in == NULL) {
printf(": can't get smp2p item\n");
return;
}
if (qcsmem_alloc(sc->sc_remote_pid, sc->sc_smem_id[1],
sizeof(*sc->sc_out)) != 0) {
printf(": can't alloc smp2p item\n");
@ -254,15 +266,6 @@ qcsmptp_intr(void *arg)
uint32_t changed, val;
int do_ack = 0, i;
/* Inbound item exists as soon as remoteproc is up. */
if (sc->sc_in == NULL)
sc->sc_in = qcsmem_get(sc->sc_remote_pid,
sc->sc_smem_id[0], NULL);
if (sc->sc_in == NULL) {
printf("%s: can't get smp2p item\n", sc->sc_dev.dv_xname);
return 1;
}
/* Do initial feature negotiation if inbound is new. */
if (!sc->sc_negotiated) {
if (sc->sc_in->version != sc->sc_out->version)

View file

@ -1,4 +1,4 @@
/* $OpenBSD: dwqe.c,v 1.8 2023/04/24 01:33:32 dlg Exp $ */
/* $OpenBSD: dwqe.c,v 1.10 2023/07/04 12:48:42 kettenis Exp $ */
/*
* Copyright (c) 2008, 2019 Mark Kettenis <kettenis@openbsd.org>
* Copyright (c) 2017, 2022 Patrick Wildt <patrick@blueri.se>
@ -444,7 +444,7 @@ dwqe_mii_readreg(struct device *self, int phy, int reg)
int n;
dwqe_write(sc, GMAC_MAC_MDIO_ADDR,
sc->sc_clk << GMAC_MAC_MDIO_ADDR_CR_SHIFT |
(sc->sc_clk << GMAC_MAC_MDIO_ADDR_CR_SHIFT) |
(phy << GMAC_MAC_MDIO_ADDR_PA_SHIFT) |
(reg << GMAC_MAC_MDIO_ADDR_RDA_SHIFT) |
GMAC_MAC_MDIO_ADDR_GOC_READ |
@ -468,7 +468,7 @@ dwqe_mii_writereg(struct device *self, int phy, int reg, int val)
dwqe_write(sc, GMAC_MAC_MDIO_DATA, val);
dwqe_write(sc, GMAC_MAC_MDIO_ADDR,
sc->sc_clk << GMAC_MAC_MDIO_ADDR_CR_SHIFT |
(sc->sc_clk << GMAC_MAC_MDIO_ADDR_CR_SHIFT) |
(phy << GMAC_MAC_MDIO_ADDR_PA_SHIFT) |
(reg << GMAC_MAC_MDIO_ADDR_RDA_SHIFT) |
GMAC_MAC_MDIO_ADDR_GOC_WRITE |
@ -672,15 +672,21 @@ dwqe_rx_proc(struct dwqe_softc *sc)
len, BUS_DMASYNC_POSTREAD);
bus_dmamap_unload(sc->sc_dmat, rxb->tb_map);
/* Strip off CRC. */
len -= ETHER_CRC_LEN;
KASSERT(len > 0);
m = rxb->tb_m;
rxb->tb_m = NULL;
m->m_pkthdr.len = m->m_len = len;
ml_enqueue(&ml, m);
if (rxd->sd_tdes3 & RDES3_ES) {
ifp->if_ierrors++;
m_freem(m);
} else {
/* Strip off CRC. */
len -= ETHER_CRC_LEN;
KASSERT(len > 0);
m->m_pkthdr.len = m->m_len = len;
ml_enqueue(&ml, m);
}
put++;
if (sc->sc_rx_cons == (DWQE_NRXDESC - 1))
@ -698,7 +704,6 @@ dwqe_rx_proc(struct dwqe_softc *sc)
bus_dmamap_sync(sc->sc_dmat, DWQE_DMA_MAP(sc->sc_rxring), 0,
DWQE_DMA_LEN(sc->sc_rxring),
BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
}
void

View file

@ -1,4 +1,4 @@
/* $OpenBSD: mfi.c,v 1.189 2023/05/25 19:35:58 kurt Exp $ */
/* $OpenBSD: mfi.c,v 1.190 2023/07/06 10:17:43 visa Exp $ */
/*
* Copyright (c) 2006 Marco Peereboom <marco@peereboom.us>
*
@ -925,8 +925,9 @@ mfi_poll(struct mfi_softc *sc, struct mfi_ccb *ccb)
void
mfi_exec(struct mfi_softc *sc, struct mfi_ccb *ccb)
{
struct mutex m = MUTEX_INITIALIZER_FLAGS(IPL_BIO, __MTX_NAME,
MTX_NOWITNESS);
struct mutex m;
mtx_init(&m, IPL_BIO);
#ifdef DIAGNOSTIC
if (ccb->ccb_cookie != NULL || ccb->ccb_done != NULL)

View file

@ -1,4 +1,4 @@
/* $OpenBSD: mpi.c,v 1.225 2023/05/25 19:35:58 kurt Exp $ */
/* $OpenBSD: mpi.c,v 1.226 2023/07/06 10:17:43 visa Exp $ */
/*
* Copyright (c) 2005, 2006, 2009 David Gwynne <dlg@openbsd.org>
@ -1263,10 +1263,11 @@ mpi_poll_done(struct mpi_ccb *ccb)
void
mpi_wait(struct mpi_softc *sc, struct mpi_ccb *ccb)
{
struct mutex cookie = MUTEX_INITIALIZER_FLAGS(
IPL_BIO, __MTX_NAME, MTX_NOWITNESS);
struct mutex cookie;
void (*done)(struct mpi_ccb *);
mtx_init(&cookie, IPL_BIO);
done = ccb->ccb_done;
ccb->ccb_done = mpi_wait_done;
ccb->ccb_cookie = &cookie;

View file

@ -2436,6 +2436,10 @@ int amdgpu_vm_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
long timeout = msecs_to_jiffies(2000);
int r;
/* No valid flags defined yet */
if (args->in.flags)
return -EINVAL;
switch (args->in.op) {
case AMDGPU_VM_OP_RESERVE_VMID:
/* We only have requirement to reserve vmid from gfxhub */

View file

@ -348,6 +348,35 @@ static inline bool is_dc_timing_adjust_needed(struct dm_crtc_state *old_state,
return false;
}
/**
* update_planes_and_stream_adapter() - Send planes to be updated in DC
*
* DC has a generic way to update planes and stream via
* dc_update_planes_and_stream function; however, DM might need some
* adjustments and preparation before calling it. This function is a wrapper
* for the dc_update_planes_and_stream that does any required configuration
* before passing control to DC.
*/
static inline bool update_planes_and_stream_adapter(struct dc *dc,
int update_type,
int planes_count,
struct dc_stream_state *stream,
struct dc_stream_update *stream_update,
struct dc_surface_update *array_of_surface_update)
{
/*
* Previous frame finished and HW is ready for optimization.
*/
if (update_type == UPDATE_TYPE_FAST)
dc_post_update_surfaces_to_stream(dc);
return dc_update_planes_and_stream(dc,
array_of_surface_update,
planes_count,
stream,
stream_update);
}
/**
* dm_pflip_high_irq() - Handle pageflip interrupt
* @interrupt_params: ignored
@ -2634,10 +2663,13 @@ static void dm_gpureset_commit_state(struct dc_state *dc_state,
bundle->surface_updates[m].surface->force_full_update =
true;
}
dc_commit_updates_for_stream(
dm->dc, bundle->surface_updates,
dc_state->stream_status->plane_count,
dc_state->streams[k], &bundle->stream_update, dc_state);
update_planes_and_stream_adapter(dm->dc,
UPDATE_TYPE_FULL,
dc_state->stream_status->plane_count,
dc_state->streams[k],
&bundle->stream_update,
bundle->surface_updates);
}
cleanup:
@ -7874,6 +7906,12 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
if (acrtc_state->abm_level != dm_old_crtc_state->abm_level)
bundle->stream_update.abm_level = &acrtc_state->abm_level;
mutex_lock(&dm->dc_lock);
if ((acrtc_state->update_type > UPDATE_TYPE_FAST) &&
acrtc_state->stream->link->psr_settings.psr_allow_active)
amdgpu_dm_psr_disable(acrtc_state->stream);
mutex_unlock(&dm->dc_lock);
/*
* If FreeSync state on the stream has changed then we need to
* re-adjust the min/max bounds now that DC doesn't handle this
@ -7887,16 +7925,12 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
spin_unlock_irqrestore(&pcrtc->dev->event_lock, flags);
}
mutex_lock(&dm->dc_lock);
if ((acrtc_state->update_type > UPDATE_TYPE_FAST) &&
acrtc_state->stream->link->psr_settings.psr_allow_active)
amdgpu_dm_psr_disable(acrtc_state->stream);
dc_commit_updates_for_stream(dm->dc,
bundle->surface_updates,
planes_count,
acrtc_state->stream,
&bundle->stream_update,
dc_state);
update_planes_and_stream_adapter(dm->dc,
acrtc_state->update_type,
planes_count,
acrtc_state->stream,
&bundle->stream_update,
bundle->surface_updates);
/**
* Enable or disable the interrupts on the backend.
@ -8338,12 +8372,11 @@ static void amdgpu_dm_atomic_commit_tail(struct drm_atomic_state *state)
mutex_lock(&dm->dc_lock);
dc_commit_updates_for_stream(dm->dc,
dummy_updates,
status->plane_count,
dm_new_crtc_state->stream,
&stream_update,
dc_state);
dc_update_planes_and_stream(dm->dc,
dummy_updates,
status->plane_count,
dm_new_crtc_state->stream,
&stream_update);
mutex_unlock(&dm->dc_lock);
}

View file

@ -401,8 +401,13 @@ bool dc_stream_adjust_vmin_vmax(struct dc *dc,
{
int i;
if (memcmp(adjust, &stream->adjust, sizeof(struct dc_crtc_timing_adjust)) == 0)
return true;
/*
* Don't adjust DRR while there's bandwidth optimizations pending to
* avoid conflicting with firmware updates.
*/
if (dc->ctx->dce_version > DCE_VERSION_MAX)
if (dc->optimized_required || dc->wm_optimized_required)
return false;
stream->adjust.v_total_max = adjust->v_total_max;
stream->adjust.v_total_mid = adjust->v_total_mid;
@ -2024,27 +2029,33 @@ void dc_post_update_surfaces_to_stream(struct dc *dc)
post_surface_trace(dc);
if (dc->ctx->dce_version >= DCE_VERSION_MAX)
TRACE_DCN_CLOCK_STATE(&context->bw_ctx.bw.dcn.clk);
else
/*
* Only relevant for DCN behavior where we can guarantee the optimization
* is safe to apply - retain the legacy behavior for DCE.
*/
if (dc->ctx->dce_version < DCE_VERSION_MAX)
TRACE_DCE_CLOCK_STATE(&context->bw_ctx.bw.dce);
else {
TRACE_DCN_CLOCK_STATE(&context->bw_ctx.bw.dcn.clk);
if (is_flip_pending_in_pipes(dc, context))
return;
if (is_flip_pending_in_pipes(dc, context))
return;
for (i = 0; i < dc->res_pool->pipe_count; i++)
if (context->res_ctx.pipe_ctx[i].stream == NULL ||
context->res_ctx.pipe_ctx[i].plane_state == NULL) {
context->res_ctx.pipe_ctx[i].pipe_idx = i;
dc->hwss.disable_plane(dc, &context->res_ctx.pipe_ctx[i]);
}
for (i = 0; i < dc->res_pool->pipe_count; i++)
if (context->res_ctx.pipe_ctx[i].stream == NULL ||
context->res_ctx.pipe_ctx[i].plane_state == NULL) {
context->res_ctx.pipe_ctx[i].pipe_idx = i;
dc->hwss.disable_plane(dc, &context->res_ctx.pipe_ctx[i]);
}
process_deferred_updates(dc);
process_deferred_updates(dc);
dc->hwss.optimize_bandwidth(dc, context);
dc->hwss.optimize_bandwidth(dc, context);
if (dc->debug.enable_double_buffered_dsc_pg_support)
dc->hwss.update_dsc_pg(dc, context, true);
if (dc->debug.enable_double_buffered_dsc_pg_support)
dc->hwss.update_dsc_pg(dc, context, true);
}
dc->optimized_required = false;
dc->wm_optimized_required = false;
@ -3869,12 +3880,9 @@ void dc_commit_updates_for_stream(struct dc *dc,
if (new_pipe->plane_state && new_pipe->plane_state != old_pipe->plane_state)
new_pipe->plane_state->force_full_update = true;
}
} else if (update_type == UPDATE_TYPE_FAST && dc_ctx->dce_version >= DCE_VERSION_MAX) {
} else if (update_type == UPDATE_TYPE_FAST) {
/*
* Previous frame finished and HW is ready for optimization.
*
* Only relevant for DCN behavior where we can guarantee the optimization
* is safe to apply - retain the legacy behavior for DCE.
*/
dc_post_update_surfaces_to_stream(dc);
}

View file

@ -552,7 +552,6 @@ int radeon_gem_set_domain_ioctl(struct drm_device *dev, void *data,
struct radeon_device *rdev = dev->dev_private;
struct drm_radeon_gem_set_domain *args = data;
struct drm_gem_object *gobj;
struct radeon_bo *robj;
int r;
/* for now if someone requests domain CPU -
@ -565,13 +564,12 @@ int radeon_gem_set_domain_ioctl(struct drm_device *dev, void *data,
up_read(&rdev->exclusive_lock);
return -ENOENT;
}
robj = gem_to_radeon_bo(gobj);
r = radeon_gem_set_domain(gobj, args->read_domains, args->write_domain);
drm_gem_object_put(gobj);
up_read(&rdev->exclusive_lock);
r = radeon_gem_handle_lockup(robj->rdev, r);
r = radeon_gem_handle_lockup(rdev, r);
return r;
}

View file

@ -1,4 +1,4 @@
/* $OpenBSD: if_bge.c,v 1.400 2023/01/18 23:31:37 kettenis Exp $ */
/* $OpenBSD: if_bge.c,v 1.401 2023/07/04 10:22:39 jmatthew Exp $ */
/*
* Copyright (c) 2001 Wind River Systems
@ -74,6 +74,7 @@
#include "bpfilter.h"
#include "vlan.h"
#include "kstat.h"
#include <sys/param.h>
#include <sys/systm.h>
@ -85,6 +86,7 @@
#include <sys/timeout.h>
#include <sys/socket.h>
#include <sys/atomic.h>
#include <sys/kstat.h>
#include <net/if.h>
#include <net/if_media.h>
@ -203,6 +205,58 @@ void bge_ape_unlock(struct bge_softc *, int);
void bge_ape_send_event(struct bge_softc *, uint32_t);
void bge_ape_driver_state_change(struct bge_softc *, int);
#if NKSTAT > 0
void bge_kstat_attach(struct bge_softc *);
enum {
bge_stat_out_octets = 0,
bge_stat_collisions,
bge_stat_xon_sent,
bge_stat_xoff_sent,
bge_stat_xmit_errors,
bge_stat_coll_frames,
bge_stat_multicoll_frames,
bge_stat_deferred_xmit,
bge_stat_excess_coll,
bge_stat_late_coll,
bge_stat_out_ucast_pkt,
bge_stat_out_mcast_pkt,
bge_stat_out_bcast_pkt,
bge_stat_in_octets,
bge_stat_fragments,
bge_stat_in_ucast_pkt,
bge_stat_in_mcast_pkt,
bge_stat_in_bcast_pkt,
bge_stat_fcs_errors,
bge_stat_align_errors,
bge_stat_xon_rcvd,
bge_stat_xoff_rcvd,
bge_stat_ctrl_frame_rcvd,
bge_stat_xoff_entered,
bge_stat_too_long_frames,
bge_stat_jabbers,
bge_stat_too_short_pkts,
bge_stat_dma_rq_full,
bge_stat_dma_hprq_full,
bge_stat_sdc_queue_full,
bge_stat_nic_sendprod_set,
bge_stat_status_updated,
bge_stat_irqs,
bge_stat_avoided_irqs,
bge_stat_tx_thresh_hit,
bge_stat_filtdrop,
bge_stat_dma_wrq_full,
bge_stat_dma_hpwrq_full,
bge_stat_out_of_bds,
bge_stat_if_in_drops,
bge_stat_if_in_errors,
bge_stat_rx_thresh_hit,
};
#endif
#ifdef BGE_DEBUG
#define DPRINTF(x) do { if (bgedebug) printf x; } while (0)
#define DPRINTFN(n,x) do { if (bgedebug >= (n)) printf x; } while (0)
@ -2993,6 +3047,12 @@ bge_attach(struct device *parent, struct device *self, void *aux)
else
sc->bge_return_ring_cnt = BGE_RETURN_RING_CNT_5705;
mtx_init(&sc->bge_kstat_mtx, IPL_SOFTCLOCK);
#if NKSTAT > 0
if (BGE_IS_5705_PLUS(sc))
bge_kstat_attach(sc);
#endif
/* Set up ifnet structure */
ifp = &sc->arpcom.ac_if;
ifp->if_softc = sc;
@ -3767,9 +3827,11 @@ bge_tick(void *xsc)
s = splnet();
if (BGE_IS_5705_PLUS(sc))
if (BGE_IS_5705_PLUS(sc)) {
mtx_enter(&sc->bge_kstat_mtx);
bge_stats_update_regs(sc);
else
mtx_leave(&sc->bge_kstat_mtx);
} else
bge_stats_update(sc);
if (sc->bge_flags & BGE_FIBER_TBI) {
@ -3799,12 +3861,16 @@ void
bge_stats_update_regs(struct bge_softc *sc)
{
struct ifnet *ifp = &sc->arpcom.ac_if;
uint32_t collisions, discards, inerrors;
uint32_t ucast, mcast, bcast;
u_int32_t val;
#if NKSTAT > 0
struct kstat_kv *kvs = sc->bge_kstat->ks_data;
#endif
sc->bge_tx_collisions += CSR_READ_4(sc, BGE_MAC_STATS +
collisions = CSR_READ_4(sc, BGE_MAC_STATS +
offsetof(struct bge_mac_stats_regs, etherStatsCollisions));
sc->bge_rx_overruns += CSR_READ_4(sc, BGE_RXLP_LOCSTAT_OUT_OF_BDS);
/*
* XXX
* Unlike other controllers, the BGE_RXLP_LOCSTAT_IFIN_DROPS counter
@ -3826,23 +3892,22 @@ bge_stats_update_regs(struct bge_softc *sc)
BGE_ASICREV(sc->bge_chipid) != BGE_ASICREV_BCM5762 &&
sc->bge_chipid != BGE_CHIPID_BCM5719_A0 &&
sc->bge_chipid != BGE_CHIPID_BCM5720_A0)
sc->bge_rx_discards += CSR_READ_4(sc, BGE_RXLP_LOCSTAT_IFIN_DROPS);
discards = CSR_READ_4(sc, BGE_RXLP_LOCSTAT_IFIN_DROPS);
else
discards = 0;
sc->bge_rx_inerrors += CSR_READ_4(sc, BGE_RXLP_LOCSTAT_IFIN_ERRORS);
inerrors = CSR_READ_4(sc, BGE_RXLP_LOCSTAT_IFIN_ERRORS);
ifp->if_collisions = sc->bge_tx_collisions;
ifp->if_ierrors = sc->bge_rx_discards + sc->bge_rx_inerrors;
ifp->if_collisions += collisions;
ifp->if_ierrors += discards + inerrors;
ucast = CSR_READ_4(sc, BGE_MAC_STATS +
offsetof(struct bge_mac_stats_regs, ifHCOutUcastPkts));
mcast = CSR_READ_4(sc, BGE_MAC_STATS +
offsetof(struct bge_mac_stats_regs, ifHCOutMulticastPkts));
bcast = CSR_READ_4(sc, BGE_MAC_STATS +
offsetof(struct bge_mac_stats_regs, ifHCOutBroadcastPkts));
if (sc->bge_flags & BGE_RDMA_BUG) {
u_int32_t val, ucast, mcast, bcast;
ucast = CSR_READ_4(sc, BGE_MAC_STATS +
offsetof(struct bge_mac_stats_regs, ifHCOutUcastPkts));
mcast = CSR_READ_4(sc, BGE_MAC_STATS +
offsetof(struct bge_mac_stats_regs, ifHCOutMulticastPkts));
bcast = CSR_READ_4(sc, BGE_MAC_STATS +
offsetof(struct bge_mac_stats_regs, ifHCOutBroadcastPkts));
/*
* If controller transmitted more than BGE_NUM_RDMA_CHANNELS
* frames, it's safe to disable workaround for DMA engine's
@ -3858,6 +3923,15 @@ bge_stats_update_regs(struct bge_softc *sc)
sc->bge_flags &= ~BGE_RDMA_BUG;
}
}
#if NKSTAT > 0
kstat_kv_u32(&kvs[bge_stat_out_ucast_pkt]) += ucast;
kstat_kv_u32(&kvs[bge_stat_out_mcast_pkt]) += mcast;
kstat_kv_u32(&kvs[bge_stat_out_bcast_pkt]) += bcast;
kstat_kv_u32(&kvs[bge_stat_collisions]) += collisions;
kstat_kv_u32(&kvs[bge_stat_if_in_drops]) += discards;
kstat_kv_u32(&kvs[bge_stat_if_in_errors]) += inerrors;
#endif
}
void
@ -4814,3 +4888,151 @@ bge_link_upd(struct bge_softc *sc)
BGE_MACSTAT_CFG_CHANGED|BGE_MACSTAT_MI_COMPLETE|
BGE_MACSTAT_LINK_CHANGED);
}
#if NKSTAT > 0
struct bge_stat {
char name[KSTAT_KV_NAMELEN];
enum kstat_kv_unit unit;
bus_size_t reg;
};
#define MACREG(_f) \
BGE_MAC_STATS + offsetof(struct bge_mac_stats_regs, _f)
static const struct bge_stat bge_kstat_tpl[] = {
/* MAC stats */
[bge_stat_out_octets] = { "out octets", KSTAT_KV_U_BYTES,
MACREG(ifHCOutOctets) },
[bge_stat_collisions] = { "collisions", KSTAT_KV_U_NONE, 0 },
[bge_stat_xon_sent] = { "xon sent", KSTAT_KV_U_NONE,
MACREG(outXonSent) },
[bge_stat_xoff_sent] = { "xoff sent", KSTAT_KV_U_NONE,
MACREG(outXonSent) },
[bge_stat_xmit_errors] = { "xmit errors", KSTAT_KV_U_NONE,
MACREG(dot3StatsInternalMacTransmitErrors) },
[bge_stat_coll_frames] = { "coll frames", KSTAT_KV_U_PACKETS,
MACREG(dot3StatsSingleCollisionFrames) },
[bge_stat_multicoll_frames] = { "multicoll frames", KSTAT_KV_U_PACKETS,
MACREG(dot3StatsMultipleCollisionFrames) },
[bge_stat_deferred_xmit] = { "deferred xmit", KSTAT_KV_U_NONE,
MACREG(dot3StatsDeferredTransmissions) },
[bge_stat_excess_coll] = { "excess coll", KSTAT_KV_U_NONE,
MACREG(dot3StatsExcessiveCollisions) },
[bge_stat_late_coll] = { "late coll", KSTAT_KV_U_NONE,
MACREG(dot3StatsLateCollisions) },
[bge_stat_out_ucast_pkt] = { "out ucast pkts", KSTAT_KV_U_PACKETS, 0 },
[bge_stat_out_mcast_pkt] = { "out mcast pkts", KSTAT_KV_U_PACKETS, 0 },
[bge_stat_out_bcast_pkt] = { "out bcast pkts", KSTAT_KV_U_PACKETS, 0 },
[bge_stat_in_octets] = { "in octets", KSTAT_KV_U_BYTES,
MACREG(ifHCInOctets) },
[bge_stat_fragments] = { "fragments", KSTAT_KV_U_NONE,
MACREG(etherStatsFragments) },
[bge_stat_in_ucast_pkt] = { "in ucast pkts", KSTAT_KV_U_PACKETS,
MACREG(ifHCInUcastPkts) },
[bge_stat_in_mcast_pkt] = { "in mcast pkts", KSTAT_KV_U_PACKETS,
MACREG(ifHCInMulticastPkts) },
[bge_stat_in_bcast_pkt] = { "in bcast pkts", KSTAT_KV_U_PACKETS,
MACREG(ifHCInBroadcastPkts) },
[bge_stat_fcs_errors] = { "FCS errors", KSTAT_KV_U_NONE,
MACREG(dot3StatsFCSErrors) },
[bge_stat_align_errors] = { "align errors", KSTAT_KV_U_NONE,
MACREG(dot3StatsAlignmentErrors) },
[bge_stat_xon_rcvd] = { "xon rcvd", KSTAT_KV_U_NONE,
MACREG(xonPauseFramesReceived) },
[bge_stat_xoff_rcvd] = { "xoff rcvd", KSTAT_KV_U_NONE,
MACREG(xoffPauseFramesReceived) },
[bge_stat_ctrl_frame_rcvd] = { "ctrlframes rcvd", KSTAT_KV_U_NONE,
MACREG(macControlFramesReceived) },
[bge_stat_xoff_entered] = { "xoff entered", KSTAT_KV_U_NONE,
MACREG(xoffStateEntered) },
[bge_stat_too_long_frames] = { "too long frames", KSTAT_KV_U_NONE,
MACREG(dot3StatsFramesTooLong) },
[bge_stat_jabbers] = { "jabbers", KSTAT_KV_U_NONE,
MACREG(etherStatsJabbers) },
[bge_stat_too_short_pkts] = { "too short pkts", KSTAT_KV_U_NONE,
MACREG(etherStatsUndersizePkts) },
/* Send Data Initiator stats */
[bge_stat_dma_rq_full] = { "DMA RQ full", KSTAT_KV_U_NONE,
BGE_LOCSTATS_DMA_RQ_FULL },
[bge_stat_dma_hprq_full] = { "DMA HPRQ full", KSTAT_KV_U_NONE,
BGE_LOCSTATS_DMA_HIPRIO_RQ_FULL },
[bge_stat_sdc_queue_full] = { "SDC queue full", KSTAT_KV_U_NONE,
BGE_LOCSTATS_SDC_QUEUE_FULL },
[bge_stat_nic_sendprod_set] = { "sendprod set", KSTAT_KV_U_NONE,
BGE_LOCSTATS_NIC_SENDPROD_SET },
[bge_stat_status_updated] = { "stats updated", KSTAT_KV_U_NONE,
BGE_LOCSTATS_STATS_UPDATED },
[bge_stat_irqs] = { "irqs", KSTAT_KV_U_NONE, BGE_LOCSTATS_IRQS },
[bge_stat_avoided_irqs] = { "avoided irqs", KSTAT_KV_U_NONE,
BGE_LOCSTATS_AVOIDED_IRQS },
[bge_stat_tx_thresh_hit] = { "tx thresh hit", KSTAT_KV_U_NONE,
BGE_LOCSTATS_TX_THRESH_HIT },
/* Receive List Placement stats */
[bge_stat_filtdrop] = { "filtdrop", KSTAT_KV_U_NONE,
BGE_RXLP_LOCSTAT_FILTDROP },
[bge_stat_dma_wrq_full] = { "DMA WRQ full", KSTAT_KV_U_NONE,
BGE_RXLP_LOCSTAT_DMA_WRQ_FULL },
[bge_stat_dma_hpwrq_full] = { "DMA HPWRQ full", KSTAT_KV_U_NONE,
BGE_RXLP_LOCSTAT_DMA_HPWRQ_FULL },
[bge_stat_out_of_bds] = { "out of BDs", KSTAT_KV_U_NONE,
BGE_RXLP_LOCSTAT_OUT_OF_BDS },
[bge_stat_if_in_drops] = { "if in drops", KSTAT_KV_U_NONE, 0 },
[bge_stat_if_in_errors] = { "if in errors", KSTAT_KV_U_NONE, 0 },
[bge_stat_rx_thresh_hit] = { "rx thresh hit", KSTAT_KV_U_NONE,
BGE_RXLP_LOCSTAT_RXTHRESH_HIT },
};
int
bge_kstat_read(struct kstat *ks)
{
struct bge_softc *sc = ks->ks_softc;
struct kstat_kv *kvs = ks->ks_data;
int i;
bge_stats_update_regs(sc);
for (i = 0; i < nitems(bge_kstat_tpl); i++) {
if (bge_kstat_tpl[i].reg != 0)
kstat_kv_u32(kvs) += CSR_READ_4(sc,
bge_kstat_tpl[i].reg);
kvs++;
}
getnanouptime(&ks->ks_updated);
return 0;
}
void
bge_kstat_attach(struct bge_softc *sc)
{
struct kstat *ks;
struct kstat_kv *kvs;
int i;
ks = kstat_create(sc->bge_dev.dv_xname, 0, "bge-stats", 0,
KSTAT_T_KV, 0);
if (ks == NULL)
return;
kvs = mallocarray(nitems(bge_kstat_tpl), sizeof(*kvs), M_DEVBUF,
M_ZERO | M_WAITOK);
for (i = 0; i < nitems(bge_kstat_tpl); i++) {
const struct bge_stat *tpl = &bge_kstat_tpl[i];
kstat_kv_unit_init(&kvs[i], tpl->name, KSTAT_KV_T_UINT32,
tpl->unit);
}
kstat_set_mutex(ks, &sc->bge_kstat_mtx);
ks->ks_softc = sc;
ks->ks_data = kvs;
ks->ks_datalen = nitems(bge_kstat_tpl) * sizeof(*kvs);
ks->ks_read = bge_kstat_read;
sc->bge_kstat = ks;
kstat_install(ks);
}
#endif /* NKSTAT > 0 */

View file

@ -1,4 +1,4 @@
/* $OpenBSD: if_bgereg.h,v 1.135 2022/01/09 05:42:46 jsg Exp $ */
/* $OpenBSD: if_bgereg.h,v 1.136 2023/07/04 10:22:39 jmatthew Exp $ */
/*
* Copyright (c) 2001 Wind River Systems
@ -2942,4 +2942,7 @@ struct bge_softc {
u_int32_t bge_rx_overruns;
u_int32_t bge_tx_collisions;
bus_dmamap_t bge_txdma[BGE_TX_RING_CNT];
struct mutex bge_kstat_mtx;
struct kstat *bge_kstat;
};

View file

@ -1,4 +1,4 @@
/* $OpenBSD: if_iwm.c,v 1.407 2023/04/14 12:45:10 stsp Exp $ */
/* $OpenBSD: if_iwm.c,v 1.408 2023/07/05 15:07:28 stsp Exp $ */
/*
* Copyright (c) 2014, 2016 genua gmbh <info@genua.de>
@ -8574,7 +8574,7 @@ iwm_bgscan_done(struct ieee80211com *ic,
free(sc->bgscan_unref_arg, M_DEVBUF, sc->bgscan_unref_arg_size);
sc->bgscan_unref_arg = arg;
sc->bgscan_unref_arg_size = arg_size;
iwm_add_task(sc, sc->sc_nswq, &sc->bgscan_done_task);
iwm_add_task(sc, systq, &sc->bgscan_done_task);
}
void

View file

@ -1,4 +1,4 @@
/* $OpenBSD: if_iwx.c,v 1.173 2023/06/27 15:31:27 stsp Exp $ */
/* $OpenBSD: if_iwx.c,v 1.175 2023/07/05 15:07:28 stsp Exp $ */
/*
* Copyright (c) 2014, 2016 genua gmbh <info@genua.de>
@ -2925,7 +2925,7 @@ iwx_disable_txq(struct iwx_softc *sc, int sta_id, int qid, uint8_t tid)
cmd_v0.cb_size = htole32(0);
cmd_v0.byte_cnt_addr = htole64(0);
cmd_v0.tfdq_addr = htole64(0);
hcmd.id = IWX_SCD_QUEUE_CFG,
hcmd.id = IWX_SCD_QUEUE_CFG;
hcmd.data[0] = &cmd_v0;
hcmd.len[0] = sizeof(cmd_v0);
} else if (cmd_ver == 3) {
@ -7607,7 +7607,7 @@ iwx_bgscan_done(struct ieee80211com *ic,
free(sc->bgscan_unref_arg, M_DEVBUF, sc->bgscan_unref_arg_size);
sc->bgscan_unref_arg = arg;
sc->bgscan_unref_arg_size = arg_size;
iwx_add_task(sc, sc->sc_nswq, &sc->bgscan_done_task);
iwx_add_task(sc, systq, &sc->bgscan_done_task);
}
void
@ -8048,7 +8048,7 @@ iwx_phy_send_rlc(struct iwx_softc *sc, struct iwx_phy_ctxt *phyctxt,
idle_cnt = chains_static;
active_cnt = chains_dynamic;
cmd.phy_id = htole32(phyctxt->id),
cmd.phy_id = htole32(phyctxt->id);
cmd.rlc.rx_chain_info = htole32(iwx_fw_valid_rx_ant(sc) <<
IWX_PHY_RX_CHAIN_VALID_POS);
cmd.rlc.rx_chain_info |= htole32(idle_cnt << IWX_PHY_RX_CHAIN_CNT_POS);

View file

@ -1,4 +1,4 @@
/* $OpenBSD: mfii.c,v 1.88 2023/05/25 19:35:58 kurt Exp $ */
/* $OpenBSD: mfii.c,v 1.89 2023/07/06 10:17:43 visa Exp $ */
/*
* Copyright (c) 2012 David Gwynne <dlg@openbsd.org>
@ -1764,8 +1764,9 @@ mfii_poll_done(struct mfii_softc *sc, struct mfii_ccb *ccb)
int
mfii_exec(struct mfii_softc *sc, struct mfii_ccb *ccb)
{
struct mutex m = MUTEX_INITIALIZER_FLAGS(IPL_BIO, __MTX_NAME,
MTX_NOWITNESS);
struct mutex m;
mtx_init(&m, IPL_BIO);
#ifdef DIAGNOSTIC
if (ccb->ccb_cookie != NULL || ccb->ccb_done != NULL)

View file

@ -1,4 +1,4 @@
/* $OpenBSD: mpii.c,v 1.145 2023/05/25 19:35:58 kurt Exp $ */
/* $OpenBSD: mpii.c,v 1.146 2023/07/06 10:17:43 visa Exp $ */
/*
* Copyright (c) 2010, 2012 Mike Belopuhov
* Copyright (c) 2009 James Giannoules
@ -2857,11 +2857,12 @@ mpii_init_queues(struct mpii_softc *sc)
void
mpii_wait(struct mpii_softc *sc, struct mpii_ccb *ccb)
{
struct mutex mtx = MUTEX_INITIALIZER_FLAGS(IPL_BIO,
__MTX_NAME, MTX_NOWITNESS);
struct mutex mtx;
void (*done)(struct mpii_ccb *);
void *cookie;
mtx_init(&mtx, IPL_BIO);
done = ccb->ccb_done;
cookie = ccb->ccb_cookie;

View file

@ -1,4 +1,4 @@
/* $OpenBSD: virtio_pci.c,v 1.33 2023/05/29 08:13:35 sf Exp $ */
/* $OpenBSD: virtio_pci.c,v 1.34 2023/07/05 18:11:08 patrick Exp $ */
/* $NetBSD: virtio.c,v 1.3 2011/11/02 23:05:52 njoly Exp $ */
/*
@ -976,7 +976,7 @@ virtio_pci_setup_msix(struct virtio_pci_softc *sc, struct pci_attach_args *pa,
for (i = 0; i < vsc->sc_nvqs; i++)
virtio_pci_set_msix_queue_vector(sc, i, 1);
} else {
for (i = 0; i <= vsc->sc_nvqs; i++) {
for (i = 0; i < vsc->sc_nvqs; i++) {
if (virtio_pci_msix_establish(sc, pa, i + 1,
virtio_pci_queue_intr, &vsc->sc_vqs[i])) {
goto fail;

View file

@ -407,9 +407,8 @@ hv_hypercall(struct hv_softc *sc, uint64_t control, void *input,
}
#ifdef __amd64__
__asm__ volatile ("mov %0, %%r8" : : "r" (output_pa) : "r8");
__asm__ volatile ("call *%3" : "=a" (status) : "c" (control),
"d" (input_pa), "m" (sc->sc_hc));
extern uint64_t hv_hypercall_trampoline(uint64_t, paddr_t, paddr_t);
status = hv_hypercall_trampoline(control, input_pa, output_pa);
#else /* __i386__ */
{
uint32_t control_hi = control >> 32;

View file

@ -1,4 +1,4 @@
/* $OpenBSD: if_vio.c,v 1.23 2023/05/29 08:13:35 sf Exp $ */
/* $OpenBSD: if_vio.c,v 1.24 2023/07/03 07:40:52 kn Exp $ */
/*
* Copyright (c) 2012 Stefan Fritsch, Alexander Fiveg.
@ -265,8 +265,8 @@ int vio_init(struct ifnet *);
void vio_stop(struct ifnet *, int);
void vio_start(struct ifnet *);
int vio_ioctl(struct ifnet *, u_long, caddr_t);
void vio_get_lladr(struct arpcom *ac, struct virtio_softc *vsc);
void vio_put_lladr(struct arpcom *ac, struct virtio_softc *vsc);
void vio_get_lladdr(struct arpcom *ac, struct virtio_softc *vsc);
void vio_put_lladdr(struct arpcom *ac, struct virtio_softc *vsc);
/* rx */
int vio_add_rx_mbuf(struct vio_softc *, int);
@ -491,7 +491,7 @@ err_hdr:
}
void
vio_get_lladr(struct arpcom *ac, struct virtio_softc *vsc)
vio_get_lladdr(struct arpcom *ac, struct virtio_softc *vsc)
{
int i;
for (i = 0; i < ETHER_ADDR_LEN; i++) {
@ -501,7 +501,7 @@ vio_get_lladr(struct arpcom *ac, struct virtio_softc *vsc)
}
void
vio_put_lladr(struct arpcom *ac, struct virtio_softc *vsc)
vio_put_lladdr(struct arpcom *ac, struct virtio_softc *vsc)
{
int i;
for (i = 0; i < ETHER_ADDR_LEN; i++) {
@ -537,10 +537,10 @@ vio_attach(struct device *parent, struct device *self, void *aux)
virtio_negotiate_features(vsc, virtio_net_feature_names);
if (virtio_has_feature(vsc, VIRTIO_NET_F_MAC)) {
vio_get_lladr(&sc->sc_ac, vsc);
vio_get_lladdr(&sc->sc_ac, vsc);
} else {
ether_fakeaddr(ifp);
vio_put_lladr(&sc->sc_ac, vsc);
vio_put_lladdr(&sc->sc_ac, vsc);
}
printf(": address %s\n", ether_sprintf(sc->sc_ac.ac_enaddr));

View file

@ -1,4 +1,4 @@
/* $OpenBSD: ubcmtp.c,v 1.24 2022/10/26 16:07:28 kn Exp $ */
/* $OpenBSD: ubcmtp.c,v 1.25 2023/07/02 21:44:04 bru Exp $ */
/*
* Copyright (c) 2013-2014, joshua stein <jcs@openbsd.org>
@ -309,6 +309,10 @@ static const struct ubcmtp_dev ubcmtp_devices[] = {
},
};
static struct wsmouse_param ubcmtp_wsmousecfg[] = {
{ WSMOUSECFG_MTBTN_MAXDIST, 0 }, /* 0: Compute a default value. */
};
struct ubcmtp_softc {
struct device sc_dev; /* base device */
@ -529,7 +533,8 @@ ubcmtp_configure(struct ubcmtp_softc *sc)
hw->mt_slots = UBCMTP_MAX_FINGERS;
hw->flags = WSMOUSEHW_MT_TRACKING;
return wsmouse_configure(sc->sc_wsmousedev, NULL, 0);
return wsmouse_configure(sc->sc_wsmousedev,
ubcmtp_wsmousecfg, nitems(ubcmtp_wsmousecfg));
}
int

View file

@ -1,4 +1,4 @@
/* $OpenBSD: wsconsio.h,v 1.99 2023/04/20 19:28:31 jcs Exp $ */
/* $OpenBSD: wsconsio.h,v 1.100 2023/07/02 21:44:04 bru Exp $ */
/* $NetBSD: wsconsio.h,v 1.74 2005/04/28 07:15:44 martin Exp $ */
/*
@ -279,6 +279,9 @@ struct wsmouse_calibcoords {
* WSMOUSEIO_SETPARAMS calls. Arbitrary subsets can be passed, provided
* that all keys are valid and that the number of key/value pairs doesn't
* exceed WSMOUSECFG_MAX.
*
* The keys are divided into various groups, which end with marker entries
* of the form WSMOUSECFG__*.
*/
enum wsmousecfg {
/*
@ -295,6 +298,8 @@ enum wsmousecfg {
WSMOUSECFG_REVERSE_SCROLLING,
/* reverse scroll directions */
WSMOUSECFG__FILTERS,
/*
* Coordinate handling, applying only in WSMOUSE_COMPAT mode.
*/
@ -307,6 +312,8 @@ enum wsmousecfg {
ture is not supported anymore. */
WSMOUSECFG_SMOOTHING, /* smoothing factor (0-7) */
WSMOUSECFG__TPFILTERS,
/*
* Touchpad features
*/
@ -319,6 +326,9 @@ enum wsmousecfg {
WSMOUSECFG_SWAPSIDES, /* invert soft-button/scroll areas */
WSMOUSECFG_DISABLE, /* disable all output except for
clicks in the top-button area */
WSMOUSECFG_MTBUTTONS, /* multi-touch buttons */
WSMOUSECFG__TPFEATURES,
/*
* Touchpad options
@ -340,14 +350,25 @@ enum wsmousecfg {
WSMOUSECFG_TAP_ONE_BTNMAP, /* one-finger tap button mapping */
WSMOUSECFG_TAP_TWO_BTNMAP, /* two-finger tap button mapping */
WSMOUSECFG_TAP_THREE_BTNMAP, /* three-finger tap button mapping */
WSMOUSECFG_MTBTN_MAXDIST, /* MTBUTTONS: distance limit for
two-finger clicks */
WSMOUSECFG__TPSETUP,
/*
* Enable/Disable debug output.
*/
WSMOUSECFG_LOG_INPUT = 256,
WSMOUSECFG_LOG_EVENTS,
WSMOUSECFG__DEBUG,
};
#define WSMOUSECFG_MAX 41 /* max size of param array per ioctl */
#define WSMOUSECFG_MAX ((WSMOUSECFG__FILTERS - WSMOUSECFG_DX_SCALE) \
+ (WSMOUSECFG__TPFILTERS - WSMOUSECFG_DX_MAX) \
+ (WSMOUSECFG__TPFEATURES - WSMOUSECFG_SOFTBUTTONS) \
+ (WSMOUSECFG__TPSETUP - WSMOUSECFG_LEFT_EDGE) \
+ (WSMOUSECFG__DEBUG - WSMOUSECFG_LOG_INPUT))
struct wsmouse_param {
enum wsmousecfg key;

View file

@ -1,4 +1,4 @@
/* $OpenBSD: wsevent.c,v 1.26 2022/07/02 08:50:42 visa Exp $ */
/* $OpenBSD: wsevent.c,v 1.27 2023/07/06 10:16:58 visa Exp $ */
/* $NetBSD: wsevent.c,v 1.16 2003/08/07 16:31:29 agc Exp $ */
/*
@ -134,6 +134,8 @@ wsevent_fini(struct wseventvar *ev)
free(ev->q, M_DEVBUF, WSEVENT_QSIZE * sizeof(struct wscons_event));
ev->q = NULL;
klist_invalidate(&ev->sel.si_note);
sigio_free(&ev->sigio);
}

View file

@ -1,4 +1,4 @@
/* $OpenBSD: wstpad.c,v 1.31 2022/06/09 22:17:18 bru Exp $ */
/* $OpenBSD: wstpad.c,v 1.32 2023/07/02 21:44:04 bru Exp $ */
/*
* Copyright (c) 2015, 2016 Ulf Brosziewski
@ -149,6 +149,7 @@ struct tpad_touch {
#define WSTPAD_HORIZSCROLL (1 << 5)
#define WSTPAD_SWAPSIDES (1 << 6)
#define WSTPAD_DISABLE (1 << 7)
#define WSTPAD_MTBUTTONS (1 << 8)
#define WSTPAD_MT (1 << 31)
@ -201,6 +202,8 @@ struct wstpad {
/* two-finger contacts */
int f2pressure;
int f2width;
/* MTBUTTONS: distance limit for two-finger clicks */
int mtbtn_maxdist;
} params;
/* handler state and configuration: */
@ -634,6 +637,37 @@ wstpad_get_sbtn(struct wsmouseinput *input, int top)
return (btn != PRIMARYBTN ? btn : 0);
}
int
wstpad_mtbtn_contacts(struct wsmouseinput *input)
{
struct wstpad *tp = input->tp;
struct tpad_touch *t;
int dx, dy, dist, limit;
if (tp->ignore != 0)
return (tp->contacts - 1);
if (tp->contacts == 2 && (t = get_2nd_touch(input)) != NULL) {
dx = abs(t->x - tp->t->x) << 12;
dy = abs(t->y - tp->t->y) * tp->ratio;
dist = (dx >= dy ? dx + 3 * dy / 8 : dy + 3 * dx / 8);
limit = tp->params.mtbtn_maxdist << 12;
if (input->mt.ptr_mask != 0)
limit = limit * 2 / 3;
if (dist > limit)
return (1);
}
return (tp->contacts);
}
u_int
wstpad_get_mtbtn(struct wsmouseinput *input)
{
int contacts = wstpad_mtbtn_contacts(input);
return (contacts == 2 ? RIGHTBTN : (contacts == 3 ? MIDDLEBTN : 0));
}
void
wstpad_softbuttons(struct wsmouseinput *input, u_int *cmds, int hdlr)
{
@ -646,7 +680,8 @@ wstpad_softbuttons(struct wsmouseinput *input, u_int *cmds, int hdlr)
}
if (tp->softbutton == 0 && PRIMARYBTN_CLICKED(tp)) {
tp->softbutton = wstpad_get_sbtn(input, top);
tp->softbutton = ((tp->features & WSTPAD_MTBUTTONS)
? wstpad_get_mtbtn(input) : wstpad_get_sbtn(input, top));
if (tp->softbutton)
*cmds |= 1 << SOFTBUTTON_DOWN;
}
@ -1599,6 +1634,15 @@ wstpad_configure(struct wsmouseinput *input)
tp->scroll.hdist = 4 * h_unit;
tp->scroll.vdist = 4 * v_unit;
tp->tap.maxdist = 4 * h_unit;
if (IS_MT(tp) && h_res > 1 && v_res > 1 &&
input->hw.hw_type == WSMOUSEHW_CLICKPAD &&
(width + h_res / 2) / h_res > 100 &&
(height + v_res / 2) / v_res > 60) {
tp->params.mtbtn_maxdist = h_res * 35;
} else {
tp->params.mtbtn_maxdist = -1; /* not available */
}
}
/* A touch with a flag set in this mask does not move the pointer. */
@ -1619,13 +1663,24 @@ wstpad_configure(struct wsmouseinput *input)
tp->edge.center_left = tp->edge.center - offset;
tp->edge.center_right = tp->edge.center + offset;
/*
* Make the MTBUTTONS configuration consistent. A non-negative 'maxdist'
* value makes the feature visible in wsconsctl. 0-values are replaced
* by a default (one fourth of the length of the touchpad diagonal).
*/
if (tp->params.mtbtn_maxdist < 0) {
tp->features &= ~WSTPAD_MTBUTTONS;
} else if (tp->params.mtbtn_maxdist == 0) {
diag = isqrt(width * width + height * height);
tp->params.mtbtn_maxdist = diag / 4;
}
tp->handlers = 0;
if (tp->features & WSTPAD_SOFTBUTTONS)
if (tp->features & (WSTPAD_SOFTBUTTONS | WSTPAD_MTBUTTONS))
tp->handlers |= 1 << SOFTBUTTON_HDLR;
if (tp->features & WSTPAD_TOPBUTTONS)
tp->handlers |= 1 << TOPBUTTON_HDLR;
if (tp->features & WSTPAD_TWOFINGERSCROLL)
tp->handlers |= 1 << F2SCROLL_HDLR;
else if (tp->features & WSTPAD_EDGESCROLL)
@ -1691,7 +1746,7 @@ wstpad_set_param(struct wsmouseinput *input, int key, int val)
return (EINVAL);
switch (key) {
case WSMOUSECFG_SOFTBUTTONS ... WSMOUSECFG_DISABLE:
case WSMOUSECFG_SOFTBUTTONS ... WSMOUSECFG_MTBUTTONS:
switch (key) {
case WSMOUSECFG_SOFTBUTTONS:
flag = WSTPAD_SOFTBUTTONS;
@ -1717,6 +1772,9 @@ wstpad_set_param(struct wsmouseinput *input, int key, int val)
case WSMOUSECFG_DISABLE:
flag = WSTPAD_DISABLE;
break;
case WSMOUSECFG_MTBUTTONS:
flag = WSTPAD_MTBUTTONS;
break;
}
if (val)
tp->features |= flag;
@ -1768,6 +1826,10 @@ wstpad_set_param(struct wsmouseinput *input, int key, int val)
case WSMOUSECFG_TAP_THREE_BTNMAP:
tp->tap.btnmap[2] = BTNMASK(val);
break;
case WSMOUSECFG_MTBTN_MAXDIST:
if (IS_MT(tp))
tp->params.mtbtn_maxdist = val;
break;
default:
return (ENOTSUP);
}
@ -1785,7 +1847,7 @@ wstpad_get_param(struct wsmouseinput *input, int key, int *pval)
return (EINVAL);
switch (key) {
case WSMOUSECFG_SOFTBUTTONS ... WSMOUSECFG_DISABLE:
case WSMOUSECFG_SOFTBUTTONS ... WSMOUSECFG_MTBUTTONS:
switch (key) {
case WSMOUSECFG_SOFTBUTTONS:
flag = WSTPAD_SOFTBUTTONS;
@ -1811,6 +1873,9 @@ wstpad_get_param(struct wsmouseinput *input, int key, int *pval)
case WSMOUSECFG_DISABLE:
flag = WSTPAD_DISABLE;
break;
case WSMOUSECFG_MTBUTTONS:
flag = WSTPAD_MTBUTTONS;
break;
}
*pval = !!(tp->features & flag);
break;
@ -1859,6 +1924,9 @@ wstpad_get_param(struct wsmouseinput *input, int key, int *pval)
case WSMOUSECFG_TAP_THREE_BTNMAP:
*pval = ffs(tp->tap.btnmap[2]);
break;
case WSMOUSECFG_MTBTN_MAXDIST:
*pval = tp->params.mtbtn_maxdist;
break;
default:
return (ENOTSUP);
}