sync with OpenBSD -current
This commit is contained in:
parent
d178ff6848
commit
24abc92308
GPG key ID:
F42C07F07E2E35B7
14 changed files with 682 additions and 61 deletions
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@ -1,4 +1,4 @@
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# $OpenBSD: GENERIC,v 1.283 2024/02/15 16:33:54 deraadt Exp $
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# $OpenBSD: GENERIC,v 1.284 2024/03/02 19:53:17 kettenis Exp $
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#
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# GENERIC machine description file
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#
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@ -319,6 +319,8 @@ rkpcie* at fdt?
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pci* at rkpcie?
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rkpwm* at fdt?
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rkrng* at fdt?
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rkspi* at fdt?
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rkpmic* at spi?
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rktemp* at fdt?
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rkvop* at fdt?
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rkdwusb* at fdt?
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@ -1,4 +1,4 @@
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# $OpenBSD: RAMDISK,v 1.213 2024/02/15 16:33:54 deraadt Exp $
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# $OpenBSD: RAMDISK,v 1.214 2024/03/02 19:53:17 kettenis Exp $
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machine arm64
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maxusers 4
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@ -242,6 +242,8 @@ rkpcie* at fdt?
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pci* at rkpcie?
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rkpwm* at fdt?
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rkrng* at fdt?
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rkspi* at fdt?
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rkpmic* at spi?
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rkdwusb* at fdt?
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dwmmc* at fdt?
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sdmmc* at dwmmc?
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@ -1,8 +1,9 @@
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# $OpenBSD: files.fdt,v 1.199 2024/01/16 23:37:50 jsg Exp $
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# $OpenBSD: files.fdt,v 1.201 2024/03/02 19:52:41 kettenis Exp $
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#
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# Config file and device description for machine-independent FDT code.
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# Included by ports that need it.
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define spi {}
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define spmi {}
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device iicmux: i2cbus
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@ -398,7 +399,8 @@ attach rkpinctrl at fdt
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file dev/fdt/rkpinctrl.c rkpinctrl
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device rkpmic
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attach rkpmic at i2c
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attach rkpmic at spi with rkpmic_spi
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attach rkpmic at i2c with rkpmic_i2c
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file dev/fdt/rkpmic.c rkpmic
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device rkpwm
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@ -409,6 +411,10 @@ device rkrng
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attach rkrng at fdt
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file dev/fdt/rkrng.c rkrng
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device rkspi: spi
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attach rkspi at fdt
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file dev/fdt/rkspi.c rkspi
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device rktcphy: fdt
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attach rktcphy at fdt
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file dev/fdt/rktcphy.c rktcphy
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@ -440,7 +446,6 @@ device dwpcie: pcibus
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attach dwpcie at fdt
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file dev/fdt/dwpcie.c dwpcie
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define spi {}
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device moxtet
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attach moxtet at spi
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file dev/fdt/moxtet.c moxtet
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@ -1,4 +1,4 @@
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/* $OpenBSD: rkclock.c,v 1.85 2024/02/26 18:54:25 kettenis Exp $ */
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/* $OpenBSD: rkclock.c,v 1.86 2024/03/02 19:48:13 kettenis Exp $ */
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/*
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* Copyright (c) 2017, 2018 Mark Kettenis <kettenis@openbsd.org>
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*
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@ -3897,6 +3897,31 @@ const struct rkclock rk3588_clocks[] = {
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SEL(13, 13), 0,
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{ RK3588_CLK_200M_SRC , RK3588_CLK_100M_SRC },
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},
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{
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RK3588_CLK_SPI0, RK3588_CRU_CLKSEL_CON(59),
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SEL(3, 2), 0,
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{ RK3588_CLK_200M_SRC, RK3588_CLK_150M_SRC, RK3588_XIN24M },
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},
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{
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RK3588_CLK_SPI1, RK3588_CRU_CLKSEL_CON(59),
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SEL(5, 4), 0,
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{ RK3588_CLK_200M_SRC, RK3588_CLK_150M_SRC, RK3588_XIN24M },
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},
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{
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RK3588_CLK_SPI2, RK3588_CRU_CLKSEL_CON(59),
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SEL(7, 6), 0,
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{ RK3588_CLK_200M_SRC, RK3588_CLK_150M_SRC, RK3588_XIN24M },
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},
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{
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RK3588_CLK_SPI3, RK3588_CRU_CLKSEL_CON(59),
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SEL(9, 8), 0,
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{ RK3588_CLK_200M_SRC, RK3588_CLK_150M_SRC, RK3588_XIN24M },
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},
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{
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RK3588_CLK_SPI4, RK3588_CRU_CLKSEL_CON(59),
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SEL(11, 10), 0,
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{ RK3588_CLK_200M_SRC, RK3588_CLK_150M_SRC, RK3588_XIN24M },
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},
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{
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RK3588_CLK_UART1_SRC, RK3588_CRU_CLKSEL_CON(41),
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SEL(14, 14), DIV(13, 9),
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@ -406,6 +406,11 @@
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#define RK3588_CLK_I2C6 136
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#define RK3588_CLK_I2C7 137
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#define RK3588_CLK_I2C8 138
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#define RK3588_CLK_SPI0 151
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#define RK3588_CLK_SPI1 152
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#define RK3588_CLK_SPI2 153
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#define RK3588_CLK_SPI3 154
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#define RK3588_CLK_SPI4 155
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#define RK3588_CLK_UART1_SRC 168
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#define RK3588_CLK_UART1_FRAC 169
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#define RK3588_CLK_UART1 170
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@ -1,4 +1,4 @@
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/* $OpenBSD: rkpmic.c,v 1.13 2023/04/10 04:21:20 jsg Exp $ */
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/* $OpenBSD: rkpmic.c,v 1.14 2024/03/02 19:52:41 kettenis Exp $ */
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/*
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* Copyright (c) 2017 Mark Kettenis <kettenis@openbsd.org>
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*
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@ -25,6 +25,7 @@
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#include <dev/ofw/fdt.h>
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#include <dev/i2c/i2cvar.h>
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#include <dev/spi/spivar.h>
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#include <dev/clock_subr.h>
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@ -47,6 +48,9 @@
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#define RK809_RTC_STATUS 0x0e
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#define RK80X_RTC_STATUS_POWER_UP 0x80
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#define RKSPI_CMD_READ (0 << 7)
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#define RKSPI_CMD_WRITE (1 << 7)
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struct rkpmic_vsel_range {
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uint32_t base, delta;
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uint8_t vsel_min, vsel_max;
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@ -99,6 +103,55 @@ const struct rkpmic_regdata rk805_regdata[] = {
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{ }
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};
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/*
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* Used by RK806 for BUCK
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* 0-159: 0.5V-1.5V, step=6.25mV
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* 160-236: 1.5V-3.4V, step=25mV
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* 237-255: 3.4V-3.4V, step=0mV
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*/
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const struct rkpmic_vsel_range rk806_vsel_range1[] = {
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{ 500000, 6250, 0, 159 },
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{ 1500000, 25000, 160, 236 },
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{ 3400000, 0, 237, 255 },
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{}
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};
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/*
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* Used by RK806 for LDO
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* 0-232: 0.5V-3.4V, step=12.5mV
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* 233-255: 3.4V-3.4V, step=0mV
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*/
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const struct rkpmic_vsel_range rk806_vsel_range2[] = {
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{ 500000, 12500, 0, 232 },
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{ 3400000, 0, 233, 255 },
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{}
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};
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const struct rkpmic_regdata rk806_regdata[] = {
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{ "dcdc-reg1", 0x1a, 0xff, rk806_vsel_range1 },
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{ "dcdc-reg2", 0x1b, 0xff, rk806_vsel_range1 },
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{ "dcdc-reg3", 0x1c, 0xff, rk806_vsel_range1 },
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{ "dcdc-reg4", 0x1d, 0xff, rk806_vsel_range1 },
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{ "dcdc-reg5", 0x1e, 0xff, rk806_vsel_range1 },
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{ "dcdc-reg6", 0x1f, 0xff, rk806_vsel_range1 },
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{ "dcdc-reg7", 0x20, 0xff, rk806_vsel_range1 },
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{ "dcdc-reg8", 0x21, 0xff, rk806_vsel_range1 },
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{ "dcdc-reg9", 0x22, 0xff, rk806_vsel_range1 },
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{ "dcdc-reg10", 0x23, 0xff, rk806_vsel_range1 },
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{ "nldo-reg1", 0x43, 0xff, rk806_vsel_range2 },
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{ "nldo-reg2", 0x44, 0xff, rk806_vsel_range2 },
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{ "nldo-reg3", 0x45, 0xff, rk806_vsel_range2 },
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{ "nldo-reg4", 0x46, 0xff, rk806_vsel_range2 },
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{ "nldo-reg5", 0x47, 0xff, rk806_vsel_range2 },
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{ "pldo-reg1", 0x4e, 0xff, rk806_vsel_range2 },
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{ "pldo-reg2", 0x4f, 0xff, rk806_vsel_range2 },
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{ "pldo-reg3", 0x50, 0xff, rk806_vsel_range2 },
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{ "pldo-reg4", 0x51, 0xff, rk806_vsel_range2 },
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{ "pldo-reg5", 0x52, 0xff, rk806_vsel_range2 },
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{ "pldo-reg6", 0x53, 0xff, rk806_vsel_range2 },
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{ }
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};
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/*
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* Used by RK808 for BUCK1 & BUCK2
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* 0-63: 0.7125V-1.5V, step=12.5mV
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@ -256,19 +309,39 @@ const struct rkpmic_regdata rk817_regdata[] = {
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struct rkpmic_softc {
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struct device sc_dev;
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i2c_tag_t sc_tag;
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i2c_addr_t sc_addr;
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int sc_node;
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i2c_tag_t sc_i2c_tag;
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i2c_addr_t sc_i2c_addr;
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spi_tag_t sc_spi_tag;
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struct spi_config sc_spi_conf;
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int sc_rtc_ctrl_reg, sc_rtc_status_reg;
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struct todr_chip_handle sc_todr;
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const struct rkpmic_regdata *sc_regdata;
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int (*sc_read)(struct rkpmic_softc *, uint8_t, void *, size_t);
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int (*sc_write)(struct rkpmic_softc *, uint8_t, void *, size_t);
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};
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int rkpmic_match(struct device *, void *, void *);
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int rkpmic_i2c_match(struct device *, void *, void *);
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void rkpmic_i2c_attach(struct device *, struct device *, void *);
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int rkpmic_i2c_read(struct rkpmic_softc *, uint8_t, void *, size_t);
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int rkpmic_i2c_write(struct rkpmic_softc *, uint8_t, void *, size_t);
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int rkpmic_spi_match(struct device *, void *, void *);
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void rkpmic_spi_attach(struct device *, struct device *, void *);
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int rkpmic_spi_read(struct rkpmic_softc *, uint8_t, void *, size_t);
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int rkpmic_spi_write(struct rkpmic_softc *, uint8_t, void *, size_t);
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void rkpmic_attach(struct device *, struct device *, void *);
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const struct cfattach rkpmic_ca = {
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sizeof(struct rkpmic_softc), rkpmic_match, rkpmic_attach
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const struct cfattach rkpmic_i2c_ca = {
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sizeof(struct rkpmic_softc), rkpmic_i2c_match, rkpmic_i2c_attach
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};
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const struct cfattach rkpmic_spi_ca = {
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sizeof(struct rkpmic_softc), rkpmic_spi_match, rkpmic_spi_attach
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};
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struct cfdriver rkpmic_cd = {
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@ -284,7 +357,7 @@ int rkpmic_gettime(struct todr_chip_handle *, struct timeval *);
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int rkpmic_settime(struct todr_chip_handle *, struct timeval *);
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int
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rkpmic_match(struct device *parent, void *match, void *aux)
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rkpmic_i2c_match(struct device *parent, void *match, void *aux)
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{
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struct i2c_attach_args *ia = aux;
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@ -295,33 +368,68 @@ rkpmic_match(struct device *parent, void *match, void *aux)
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}
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void
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rkpmic_attach(struct device *parent, struct device *self, void *aux)
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rkpmic_i2c_attach(struct device *parent, struct device *self, void *aux)
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{
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struct rkpmic_softc *sc = (struct rkpmic_softc *)self;
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struct i2c_attach_args *ia = aux;
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int node = *(int *)ia->ia_cookie;
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sc->sc_i2c_tag = ia->ia_tag;
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sc->sc_i2c_addr = ia->ia_addr;
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sc->sc_node = *(int *)ia->ia_cookie;
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sc->sc_read = rkpmic_i2c_read;
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sc->sc_write = rkpmic_i2c_write;
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rkpmic_attach(parent, self, aux);
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}
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int
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rkpmic_spi_match(struct device *parent, void *match, void *aux)
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{
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struct spi_attach_args *sa = aux;
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return (strcmp(sa->sa_name, "rockchip,rk806") == 0);
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}
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void
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rkpmic_spi_attach(struct device *parent, struct device *self, void *aux)
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{
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struct rkpmic_softc *sc = (struct rkpmic_softc *)self;
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struct spi_attach_args *sa = aux;
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sc->sc_spi_tag = sa->sa_tag;
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sc->sc_node = *(int *)sa->sa_cookie;
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sc->sc_read = rkpmic_spi_read;
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sc->sc_write = rkpmic_spi_write;
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sc->sc_spi_conf.sc_bpw = 8;
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sc->sc_spi_conf.sc_freq =
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OF_getpropint(sc->sc_node, "spi-max-frequency", 1000000);
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sc->sc_spi_conf.sc_cs = OF_getpropint(sc->sc_node, "reg", 0);
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rkpmic_attach(parent, self, aux);
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}
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void
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rkpmic_attach(struct device *parent, struct device *self, void *aux)
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{
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struct rkpmic_softc *sc = (struct rkpmic_softc *)self;
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const char *chip;
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int node;
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sc->sc_tag = ia->ia_tag;
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sc->sc_addr = ia->ia_addr;
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sc->sc_todr.cookie = sc;
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sc->sc_todr.todr_gettime = rkpmic_gettime;
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sc->sc_todr.todr_settime = rkpmic_settime;
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sc->sc_todr.todr_quality = 0;
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todr_attach(&sc->sc_todr);
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if (OF_is_compatible(node, "rockchip,rk805")) {
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if (OF_is_compatible(sc->sc_node, "rockchip,rk805")) {
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chip = "RK805";
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sc->sc_rtc_ctrl_reg = RK805_RTC_CTRL;
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sc->sc_rtc_status_reg = RK805_RTC_STATUS;
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sc->sc_regdata = rk805_regdata;
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} else if (OF_is_compatible(node, "rockchip,rk808")) {
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} else if (OF_is_compatible(sc->sc_node, "rockchip,rk806")) {
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chip = "RK806";
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sc->sc_regdata = rk806_regdata;
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} else if (OF_is_compatible(sc->sc_node, "rockchip,rk808")) {
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chip = "RK808";
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sc->sc_rtc_ctrl_reg = RK808_RTC_CTRL;
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sc->sc_rtc_status_reg = RK808_RTC_STATUS;
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sc->sc_regdata = rk808_regdata;
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} else if (OF_is_compatible(node, "rockchip,rk809")) {
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} else if (OF_is_compatible(sc->sc_node, "rockchip,rk809")) {
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chip = "RK809";
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sc->sc_rtc_ctrl_reg = RK809_RTC_CTRL;
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sc->sc_rtc_status_reg = RK809_RTC_STATUS;
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@ -334,7 +442,15 @@ rkpmic_attach(struct device *parent, struct device *self, void *aux)
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}
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printf(": %s\n", chip);
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node = OF_getnodebyname(node, "regulators");
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if (sc->sc_rtc_ctrl_reg) {
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sc->sc_todr.cookie = sc;
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sc->sc_todr.todr_gettime = rkpmic_gettime;
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sc->sc_todr.todr_settime = rkpmic_settime;
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sc->sc_todr.todr_quality = 0;
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todr_attach(&sc->sc_todr);
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}
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node = OF_getnodebyname(sc->sc_node, "regulators");
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if (node == 0)
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return;
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for (node = OF_child(node); node; node = OF_peer(node))
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@ -519,14 +635,8 @@ rkpmic_reg_read(struct rkpmic_softc *sc, int reg)
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{
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uint8_t cmd = reg;
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uint8_t val;
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int error;
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iic_acquire_bus(sc->sc_tag, I2C_F_POLL);
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error = iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_addr,
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&cmd, sizeof cmd, &val, sizeof val, I2C_F_POLL);
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iic_release_bus(sc->sc_tag, I2C_F_POLL);
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if (error) {
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if (sc->sc_read(sc, cmd, &val, sizeof(val))) {
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printf("%s: can't read register 0x%02x\n",
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sc->sc_dev.dv_xname, reg);
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val = 0xff;
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@ -539,14 +649,8 @@ void
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rkpmic_reg_write(struct rkpmic_softc *sc, int reg, uint8_t val)
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{
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uint8_t cmd = reg;
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||||
int error;
|
||||
|
||||
iic_acquire_bus(sc->sc_tag, I2C_F_POLL);
|
||||
error = iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, sc->sc_addr,
|
||||
&cmd, sizeof cmd, &val, sizeof val, I2C_F_POLL);
|
||||
iic_release_bus(sc->sc_tag, I2C_F_POLL);
|
||||
|
||||
if (error) {
|
||||
if (sc->sc_write(sc, cmd, &val, sizeof(val))) {
|
||||
printf("%s: can't write register 0x%02x\n",
|
||||
sc->sc_dev.dv_xname, reg);
|
||||
}
|
||||
|
|
@ -560,10 +664,7 @@ rkpmic_clock_read(struct rkpmic_softc *sc, struct clock_ymdhms *dt)
|
|||
uint8_t status;
|
||||
int error;
|
||||
|
||||
iic_acquire_bus(sc->sc_tag, I2C_F_POLL);
|
||||
error = iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_addr,
|
||||
&cmd, sizeof(cmd), regs, RK80X_NRTC_REGS, I2C_F_POLL);
|
||||
iic_release_bus(sc->sc_tag, I2C_F_POLL);
|
||||
error = sc->sc_read(sc, cmd, regs, RK80X_NRTC_REGS);
|
||||
|
||||
if (error) {
|
||||
printf("%s: can't read RTC\n", sc->sc_dev.dv_xname);
|
||||
|
|
@ -610,10 +711,7 @@ rkpmic_clock_write(struct rkpmic_softc *sc, struct clock_ymdhms *dt)
|
|||
/* Stop RTC such that we can write to it. */
|
||||
rkpmic_reg_write(sc, sc->sc_rtc_ctrl_reg, RK80X_RTC_CTRL_STOP_RTC);
|
||||
|
||||
iic_acquire_bus(sc->sc_tag, I2C_F_POLL);
|
||||
error = iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, sc->sc_addr,
|
||||
&cmd, sizeof(cmd), regs, RK80X_NRTC_REGS, I2C_F_POLL);
|
||||
iic_release_bus(sc->sc_tag, I2C_F_POLL);
|
||||
error = sc->sc_write(sc, cmd, regs, RK80X_NRTC_REGS);
|
||||
|
||||
/* Restart RTC. */
|
||||
rkpmic_reg_write(sc, sc->sc_rtc_ctrl_reg, 0);
|
||||
|
|
@ -628,3 +726,71 @@ rkpmic_clock_write(struct rkpmic_softc *sc, struct clock_ymdhms *dt)
|
|||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int
|
||||
rkpmic_i2c_read(struct rkpmic_softc *sc, uint8_t cmd, void *buf, size_t buflen)
|
||||
{
|
||||
int error;
|
||||
|
||||
iic_acquire_bus(sc->sc_i2c_tag, I2C_F_POLL);
|
||||
error = iic_exec(sc->sc_i2c_tag, I2C_OP_READ_WITH_STOP,
|
||||
sc->sc_i2c_addr, &cmd, sizeof(cmd), buf, buflen, I2C_F_POLL);
|
||||
iic_release_bus(sc->sc_i2c_tag, I2C_F_POLL);
|
||||
|
||||
return error;
|
||||
}
|
||||
|
||||
int
|
||||
rkpmic_i2c_write(struct rkpmic_softc *sc, uint8_t cmd, void *buf, size_t buflen)
|
||||
{
|
||||
int error;
|
||||
|
||||
iic_acquire_bus(sc->sc_i2c_tag, I2C_F_POLL);
|
||||
error = iic_exec(sc->sc_i2c_tag, I2C_OP_WRITE_WITH_STOP,
|
||||
sc->sc_i2c_addr, &cmd, sizeof(cmd), buf, buflen, I2C_F_POLL);
|
||||
iic_release_bus(sc->sc_i2c_tag, I2C_F_POLL);
|
||||
|
||||
return error;
|
||||
}
|
||||
|
||||
int
|
||||
rkpmic_spi_read(struct rkpmic_softc *sc, uint8_t cmd, void *buf, size_t buflen)
|
||||
{
|
||||
uint8_t cmdbuf[3];
|
||||
int error;
|
||||
|
||||
cmdbuf[0] = RKSPI_CMD_READ | (buflen - 1);
|
||||
cmdbuf[1] = cmd; /* 16-bit addr low */
|
||||
cmdbuf[2] = 0x00; /* 16-bit addr high */
|
||||
|
||||
spi_acquire_bus(sc->sc_spi_tag, 0);
|
||||
spi_config(sc->sc_spi_tag, &sc->sc_spi_conf);
|
||||
error = spi_transfer(sc->sc_spi_tag, cmdbuf, NULL, sizeof(cmdbuf),
|
||||
SPI_KEEP_CS);
|
||||
if (!error)
|
||||
error = spi_read(sc->sc_spi_tag, buf, buflen);
|
||||
spi_release_bus(sc->sc_spi_tag, 0);
|
||||
|
||||
return error;
|
||||
}
|
||||
|
||||
int
|
||||
rkpmic_spi_write(struct rkpmic_softc *sc, uint8_t cmd, void *buf, size_t buflen)
|
||||
{
|
||||
uint8_t cmdbuf[3];
|
||||
int error;
|
||||
|
||||
cmdbuf[0] = RKSPI_CMD_WRITE | (buflen - 1);
|
||||
cmdbuf[1] = cmd; /* 16-bit addr low */
|
||||
cmdbuf[2] = 0x00; /* 16-bit addr high */
|
||||
|
||||
spi_acquire_bus(sc->sc_spi_tag, 0);
|
||||
spi_config(sc->sc_spi_tag, &sc->sc_spi_conf);
|
||||
error = spi_transfer(sc->sc_spi_tag, cmdbuf, NULL, sizeof(cmdbuf),
|
||||
SPI_KEEP_CS);
|
||||
if (!error)
|
||||
error = spi_write(sc->sc_spi_tag, buf, buflen);
|
||||
spi_release_bus(sc->sc_spi_tag, 0);
|
||||
|
||||
return error;
|
||||
}
|
||||
|
|
|
|||
369
sys/dev/fdt/rkspi.c
Normal file
369
sys/dev/fdt/rkspi.c
Normal file
|
|
@ -0,0 +1,369 @@
|
|||
/* $OpenBSD: rkspi.c,v 1.1 2024/03/02 19:50:30 kettenis Exp $ */
|
||||
/*
|
||||
* Copyright (c) 2018,2023 Patrick Wildt <patrick@blueri.se>
|
||||
* Copyright (c) 2024 Mark Kettenis <kettenis@openbsd.org>
|
||||
*
|
||||
* Permission to use, copy, modify, and distribute this software for any
|
||||
* purpose with or without fee is hereby granted, provided that the above
|
||||
* copyright notice and this permission notice appear in all copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
|
||||
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
|
||||
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
||||
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
|
||||
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
#include <sys/device.h>
|
||||
|
||||
#include <machine/bus.h>
|
||||
#include <machine/fdt.h>
|
||||
|
||||
#include <dev/ofw/openfirm.h>
|
||||
#include <dev/ofw/ofw_clock.h>
|
||||
#include <dev/ofw/ofw_pinctrl.h>
|
||||
#include <dev/ofw/fdt.h>
|
||||
#include <dev/spi/spivar.h>
|
||||
|
||||
/* registers */
|
||||
#define SPI_CTRLR0 0x0000
|
||||
#define SPI_CTRLR0_DFS_4BIT (0x0 << 0)
|
||||
#define SPI_CTRLR0_DFS_8BIT (0x1 << 0)
|
||||
#define SPI_CTRLR0_DFS_16BIT (0x2 << 0)
|
||||
#define SPI_CTRLR0_SCPH (0x1 << 6)
|
||||
#define SPI_CTRLR0_SCPOL (0x1 << 7)
|
||||
#define SPI_CTRLR0_CSM_KEEP (0x0 << 8)
|
||||
#define SPI_CTRLR0_CSM_HALF (0x1 << 8)
|
||||
#define SPI_CTRLR0_CSM_ONE (0x2 << 8)
|
||||
#define SPI_CTRLR0_SSD_HALF (0x0 << 10)
|
||||
#define SPI_CTRLR0_SSD_ONE (0x1 << 10)
|
||||
#define SPI_CTRLR0_EM_LITTLE (0x0 << 11)
|
||||
#define SPI_CTRLR0_EM_BIG (0x1 << 11)
|
||||
#define SPI_CTRLR0_FBM_MSB (0x0 << 12)
|
||||
#define SPI_CTRLR0_FBM_LSB (0x1 << 12)
|
||||
#define SPI_CTRLR0_BHT_16BIT (0x0 << 13)
|
||||
#define SPI_CTRLR0_BHT_8BIT (0x1 << 13)
|
||||
#define SPI_CTRLR0_RSD(x) ((x) << 14)
|
||||
#define SPI_CTRLR0_FRF_SPI (0x0 << 16)
|
||||
#define SPI_CTRLR0_FRF_SSP (0x1 << 16)
|
||||
#define SPI_CTRLR0_FRF_MICROWIRE (0x2 << 16)
|
||||
#define SPI_CTRLR0_XFM_TR (0x0 << 18)
|
||||
#define SPI_CTRLR0_XFM_TO (0x1 << 18)
|
||||
#define SPI_CTRLR0_XFM_RO (0x2 << 18)
|
||||
#define SPI_CTRLR0_SOI(x) ((1 << (x)) << 23)
|
||||
#define SPI_CTRLR1 0x0004
|
||||
#define SPI_ENR 0x0008
|
||||
#define SPI_SER 0x000c
|
||||
#define SPI_SER_CS(x) ((1 << (x)) << 0)
|
||||
#define SPI_BAUDR 0x0010
|
||||
#define SPI_TXFTLR 0x0014
|
||||
#define SPI_RXFTLR 0x0018
|
||||
#define SPI_TXFLR 0x001c
|
||||
#define SPI_RXFLR 0x0020
|
||||
#define SPI_SR 0x0024
|
||||
#define SPI_SR_BSF (1 << 0)
|
||||
#define SPI_SR_TFF (1 << 1)
|
||||
#define SPI_SR_TFE (1 << 2)
|
||||
#define SPI_SR_RFE (1 << 3)
|
||||
#define SPI_SR_RFF (1 << 4)
|
||||
#define SPI_IPR 0x0028
|
||||
#define SPI_IMR 0x002c
|
||||
#define SPI_ISR 0x0030
|
||||
#define SPI_RISR 0x0034
|
||||
#define SPI_ICR 0x0038
|
||||
#define SPI_ICR_MASK (0x7f << 0)
|
||||
#define SPI_DMACR 0x003c
|
||||
#define SPI_DMATDLR 0x0040
|
||||
#define SPI_DMARDLR 0x0044
|
||||
#define SPI_VERSION 0x0048
|
||||
#define SPI_TXDR 0x0400
|
||||
#define SPI_RXDR 0x0800
|
||||
|
||||
#define DEVNAME(sc) ((sc)->sc_dev.dv_xname)
|
||||
|
||||
struct rkspi_softc {
|
||||
struct device sc_dev;
|
||||
bus_space_tag_t sc_iot;
|
||||
bus_space_handle_t sc_ioh;
|
||||
bus_size_t sc_ios;
|
||||
int sc_node;
|
||||
|
||||
struct rwlock sc_buslock;
|
||||
struct spi_controller sc_tag;
|
||||
|
||||
int sc_ridx;
|
||||
int sc_widx;
|
||||
int sc_cs;
|
||||
u_int sc_cs_delay;
|
||||
u_int sc_spi_freq;
|
||||
};
|
||||
|
||||
int rkspi_match(struct device *, void *, void *);
|
||||
void rkspi_attach(struct device *, struct device *, void *);
|
||||
int rkspi_detach(struct device *, int);
|
||||
int rkspi_intr(void *);
|
||||
|
||||
void rkspi_config(void *, struct spi_config *);
|
||||
int rkspi_transfer(void *, char *, char *, int, int);
|
||||
int rkspi_acquire_bus(void *, int);
|
||||
void rkspi_release_bus(void *, int);
|
||||
|
||||
int rkspi_wait_state(struct rkspi_softc *, uint32_t, uint32_t);
|
||||
|
||||
void rkspi_scan(struct rkspi_softc *);
|
||||
|
||||
#define HREAD4(sc, reg) \
|
||||
(bus_space_read_4((sc)->sc_iot, (sc)->sc_ioh, (reg)))
|
||||
#define HWRITE4(sc, reg, val) \
|
||||
bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, (reg), (val))
|
||||
#define HSET4(sc, reg, bits) \
|
||||
HWRITE4((sc), (reg), HREAD4((sc), (reg)) | (bits))
|
||||
#define HCLR4(sc, reg, bits) \
|
||||
HWRITE4((sc), (reg), HREAD4((sc), (reg)) & ~(bits))
|
||||
|
||||
const struct cfattach rkspi_ca = {
|
||||
sizeof(struct rkspi_softc), rkspi_match, rkspi_attach,
|
||||
rkspi_detach
|
||||
};
|
||||
|
||||
struct cfdriver rkspi_cd = {
|
||||
NULL, "rkspi", DV_DULL
|
||||
};
|
||||
|
||||
int
|
||||
rkspi_match(struct device *parent, void *match, void *aux)
|
||||
{
|
||||
struct fdt_attach_args *faa = aux;
|
||||
|
||||
return OF_is_compatible(faa->fa_node, "rockchip,rk3066-spi");
|
||||
}
|
||||
|
||||
void
|
||||
rkspi_attach(struct device *parent, struct device *self, void *aux)
|
||||
{
|
||||
struct rkspi_softc *sc = (struct rkspi_softc *)self;
|
||||
struct fdt_attach_args *faa = aux;
|
||||
|
||||
if (faa->fa_nreg < 1)
|
||||
return;
|
||||
|
||||
sc->sc_iot = faa->fa_iot;
|
||||
sc->sc_ios = faa->fa_reg[0].size;
|
||||
sc->sc_node = faa->fa_node;
|
||||
if (bus_space_map(sc->sc_iot, faa->fa_reg[0].addr,
|
||||
faa->fa_reg[0].size, 0, &sc->sc_ioh)) {
|
||||
printf(": can't map registers\n");
|
||||
return;
|
||||
}
|
||||
|
||||
pinctrl_byname(sc->sc_node, "default");
|
||||
clock_set_assigned(sc->sc_node);
|
||||
clock_enable(sc->sc_node, "apb_pclk");
|
||||
clock_enable(sc->sc_node, "spiclk");
|
||||
|
||||
sc->sc_spi_freq = clock_get_frequency(sc->sc_node, "spiclk");
|
||||
|
||||
printf("\n");
|
||||
|
||||
HWRITE4(sc, SPI_ENR, 0);
|
||||
HWRITE4(sc, SPI_DMACR, 0);
|
||||
HWRITE4(sc, SPI_DMATDLR, 0);
|
||||
HWRITE4(sc, SPI_DMARDLR, 0);
|
||||
HWRITE4(sc, SPI_IPR, 0);
|
||||
HWRITE4(sc, SPI_IMR, 0);
|
||||
HWRITE4(sc, SPI_ICR, SPI_ICR_MASK);
|
||||
|
||||
rw_init(&sc->sc_buslock, sc->sc_dev.dv_xname);
|
||||
|
||||
sc->sc_tag.sc_cookie = sc;
|
||||
sc->sc_tag.sc_config = rkspi_config;
|
||||
sc->sc_tag.sc_transfer = rkspi_transfer;
|
||||
sc->sc_tag.sc_acquire_bus = rkspi_acquire_bus;
|
||||
sc->sc_tag.sc_release_bus = rkspi_release_bus;
|
||||
|
||||
rkspi_scan(sc);
|
||||
}
|
||||
|
||||
int
|
||||
rkspi_detach(struct device *self, int flags)
|
||||
{
|
||||
struct rkspi_softc *sc = (struct rkspi_softc *)self;
|
||||
|
||||
HWRITE4(sc, SPI_ENR, 0);
|
||||
HWRITE4(sc, SPI_IMR, 0);
|
||||
bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_ios);
|
||||
return 0;
|
||||
}
|
||||
|
||||
void
|
||||
rkspi_config(void *cookie, struct spi_config *conf)
|
||||
{
|
||||
struct rkspi_softc *sc = cookie;
|
||||
uint32_t ctrlr0;
|
||||
uint16_t div;
|
||||
int cs;
|
||||
|
||||
div = 2;
|
||||
while ((sc->sc_spi_freq / div) > conf->sc_freq)
|
||||
div++;
|
||||
/* Clock divider needs to be even. */
|
||||
if (div & 1)
|
||||
div++;
|
||||
|
||||
cs = conf->sc_cs;
|
||||
if (cs >= 2) {
|
||||
printf("%s: invalid chip-select (%d)\n", DEVNAME(sc), cs);
|
||||
return;
|
||||
}
|
||||
sc->sc_cs = cs;
|
||||
sc->sc_cs_delay = conf->sc_cs_delay;
|
||||
|
||||
ctrlr0 = SPI_CTRLR0_BHT_8BIT | SPI_CTRLR0_SSD_ONE | SPI_CTRLR0_EM_BIG;
|
||||
if (conf->sc_flags & SPI_CONFIG_CPHA)
|
||||
ctrlr0 |= SPI_CTRLR0_SCPH;
|
||||
if (conf->sc_flags & SPI_CONFIG_CPOL)
|
||||
ctrlr0 |= SPI_CTRLR0_SCPOL;
|
||||
switch (conf->sc_bpw) {
|
||||
case 4:
|
||||
ctrlr0 |= SPI_CTRLR0_DFS_4BIT;
|
||||
break;
|
||||
case 8:
|
||||
ctrlr0 |= SPI_CTRLR0_DFS_8BIT;
|
||||
break;
|
||||
case 16:
|
||||
ctrlr0 |= SPI_CTRLR0_DFS_16BIT;
|
||||
break;
|
||||
default:
|
||||
printf("%s: invalid bits-per-word (%d)\n", DEVNAME(sc),
|
||||
conf->sc_bpw);
|
||||
return;
|
||||
}
|
||||
|
||||
HWRITE4(sc, SPI_ENR, 0);
|
||||
HWRITE4(sc, SPI_SER, 0);
|
||||
HWRITE4(sc, SPI_CTRLR0, ctrlr0);
|
||||
HWRITE4(sc, SPI_BAUDR, div);
|
||||
}
|
||||
|
||||
int
|
||||
rkspi_wait_state(struct rkspi_softc *sc, uint32_t mask, uint32_t value)
|
||||
{
|
||||
int timeout;
|
||||
|
||||
for (timeout = 1000; timeout > 0; timeout--) {
|
||||
if ((HREAD4(sc, SPI_SR) & mask) == value)
|
||||
return 0;
|
||||
delay(10);
|
||||
}
|
||||
|
||||
return ETIMEDOUT;
|
||||
}
|
||||
|
||||
int
|
||||
rkspi_transfer(void *cookie, char *out, char *in, int len, int flags)
|
||||
{
|
||||
struct rkspi_softc *sc = cookie;
|
||||
int i;
|
||||
|
||||
sc->sc_ridx = sc->sc_widx = 0;
|
||||
|
||||
/* drain input buffer */
|
||||
while (!(HREAD4(sc, SPI_SR) & SPI_SR_RFE))
|
||||
HREAD4(sc, SPI_RXDR);
|
||||
|
||||
if (out)
|
||||
HCLR4(sc, SPI_CTRLR0, SPI_CTRLR0_XFM_RO);
|
||||
else
|
||||
HSET4(sc, SPI_CTRLR0, SPI_CTRLR0_XFM_RO);
|
||||
HWRITE4(sc, SPI_CTRLR1, len - 1);
|
||||
|
||||
HSET4(sc, SPI_SER, SPI_SER_CS(sc->sc_cs));
|
||||
delay(sc->sc_cs_delay);
|
||||
|
||||
HWRITE4(sc, SPI_ENR, 1);
|
||||
|
||||
while (sc->sc_ridx < len || sc->sc_widx < len) {
|
||||
for (i = sc->sc_widx; i < len; i++) {
|
||||
if (rkspi_wait_state(sc, SPI_SR_TFF, 0))
|
||||
goto err;
|
||||
if (out)
|
||||
HWRITE4(sc, SPI_TXDR, out[i]);
|
||||
sc->sc_widx++;
|
||||
}
|
||||
|
||||
for (i = sc->sc_ridx; i < sc->sc_widx; i++) {
|
||||
if (rkspi_wait_state(sc, SPI_SR_RFE, 0))
|
||||
goto err;
|
||||
if (in)
|
||||
in[i] = HREAD4(sc, SPI_RXDR);
|
||||
else
|
||||
HREAD4(sc, SPI_RXDR);
|
||||
sc->sc_ridx++;
|
||||
}
|
||||
|
||||
if (rkspi_wait_state(sc, SPI_SR_BSF, 0))
|
||||
goto err;
|
||||
}
|
||||
|
||||
HWRITE4(sc, SPI_ENR, 0);
|
||||
|
||||
if (!ISSET(flags, SPI_KEEP_CS))
|
||||
HCLR4(sc, SPI_SER, SPI_SER_CS(sc->sc_cs));
|
||||
return 0;
|
||||
|
||||
err:
|
||||
HWRITE4(sc, SPI_ENR, 0);
|
||||
|
||||
HCLR4(sc, SPI_SER, SPI_SER_CS(sc->sc_cs));
|
||||
return ETIMEDOUT;
|
||||
}
|
||||
|
||||
int
|
||||
rkspi_acquire_bus(void *cookie, int flags)
|
||||
{
|
||||
struct rkspi_softc *sc = cookie;
|
||||
|
||||
rw_enter(&sc->sc_buslock, RW_WRITE);
|
||||
return 0;
|
||||
}
|
||||
|
||||
void
|
||||
rkspi_release_bus(void *cookie, int flags)
|
||||
{
|
||||
struct rkspi_softc *sc = cookie;
|
||||
|
||||
rw_exit(&sc->sc_buslock);
|
||||
}
|
||||
|
||||
void
|
||||
rkspi_scan(struct rkspi_softc *sc)
|
||||
{
|
||||
struct spi_attach_args sa;
|
||||
uint32_t reg[1];
|
||||
char name[32];
|
||||
int node;
|
||||
|
||||
for (node = OF_child(sc->sc_node); node; node = OF_peer(node)) {
|
||||
memset(name, 0, sizeof(name));
|
||||
memset(reg, 0, sizeof(reg));
|
||||
|
||||
if (OF_getprop(node, "compatible", name, sizeof(name)) == -1)
|
||||
continue;
|
||||
if (name[0] == '\0')
|
||||
continue;
|
||||
|
||||
if (OF_getprop(node, "reg", ®, sizeof(reg)) != sizeof(reg))
|
||||
continue;
|
||||
|
||||
memset(&sa, 0, sizeof(sa));
|
||||
sa.sa_tag = &sc->sc_tag;
|
||||
sa.sa_name = name;
|
||||
sa.sa_cookie = &node;
|
||||
|
||||
config_found(&sc->sc_dev, &sa, NULL);
|
||||
}
|
||||
}
|
||||
Loading…
Add table
Add a link
Reference in a new issue