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sync with OpenBSD -current

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This commit is contained in:
purplerain 2024-05-22 02:43:18 +00:00
parent b5356a44af
commit 12fde4069b
Signed by: purplerain
GPG key ID: F42C07F07E2E35B7
187 changed files with 1127 additions and 1365 deletions
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3
sys/arch/amd64/include/cpu.h
View file

@ -1,4 +1,4 @@
/* $OpenBSD: cpu.h,v 1.169 2024/05/12 16:49:38 guenther Exp $ */
/* $OpenBSD: cpu.h,v 1.170 2024/05/21 23:16:06 jsg Exp $ */
/* $NetBSD: cpu.h,v 1.1 2003/04/26 18:39:39 fvdl Exp $ */
/*-
@ -428,7 +428,6 @@ void lgdt(struct region_descriptor *);
struct pcb;
void savectx(struct pcb *);
void switch_exit(struct proc *, void (*)(struct proc *));
void proc_trampoline(void);
/* clock.c */

3
sys/arch/i386/include/cpu.h
View file

@ -1,4 +1,4 @@
/* $OpenBSD: cpu.h,v 1.188 2024/05/01 12:54:27 mpi Exp $ */
/* $OpenBSD: cpu.h,v 1.189 2024/05/21 23:16:06 jsg Exp $ */
/* $NetBSD: cpu.h,v 1.35 1996/05/05 19:29:26 christos Exp $ */
/*-
@ -418,7 +418,6 @@ void lgdt(struct region_descriptor *);
struct pcb;
void savectx(struct pcb *);
void switch_exit(struct proc *);
void proc_trampoline(void);
/* clock.c */

120
sys/dev/ic/ufshci.c
View file

@ -1,4 +1,4 @@
/* $OpenBSD: ufshci.c,v 1.24 2024/05/16 10:52:11 mglocker Exp $ */
/* $OpenBSD: ufshci.c,v 1.29 2024/05/21 18:19:22 mglocker Exp $ */
/*
* Copyright (c) 2022 Marcus Glocker <mglocker@openbsd.org>
@ -125,11 +125,6 @@ ufshci_intr(void *arg)
if (status & UFSHCI_REG_IS_UTRCS) {
DPRINTF(3, "%s: UTRCS interrupt\n", __func__);
/* Reset Interrupt Aggregation Counter and Timer. */
UFSHCI_WRITE_4(sc, UFSHCI_REG_UTRIACR,
UFSHCI_REG_UTRIACR_IAEN | UFSHCI_REG_UTRIACR_CTR);
sc->sc_intraggr_enabled = 0;
ufshci_xfer_complete(sc);
handled = 1;
@ -186,17 +181,38 @@ ufshci_attach(struct ufshci_softc *sc)
DPRINTF(1, " BI=0x%04x\n", UFSHCI_REG_HCMID_BI(sc->sc_hcmid));
DPRINTF(1, " MIC=0x%04x\n", UFSHCI_REG_HCMID_MIC(sc->sc_hcmid));
if (sc->sc_nutrs > 32) {
printf("%s: NUTRS can't be >32 (is %d)!\n",
sc->sc_dev.dv_xname, sc->sc_nutrs);
if (sc->sc_nutrs < UFSHCI_SLOTS_MIN ||
sc->sc_nutrs > UFSHCI_SLOTS_MAX) {
printf("%s: Invalid NUTRS value %d (must be %d-%d)!\n",
sc->sc_dev.dv_xname, sc->sc_nutrs,
UFSHCI_SLOTS_MIN, UFSHCI_SLOTS_MAX);
return 1;
} else if (sc->sc_nutrs == 1) {
sc->sc_iacth = sc->sc_nutrs;
} else if (sc->sc_nutrs > 1) {
sc->sc_iacth = sc->sc_nutrs - 1;
}
if (sc->sc_nutrs == UFSHCI_SLOTS_MAX)
sc->sc_iacth = UFSHCI_INTR_AGGR_COUNT_MAX;
else
sc->sc_iacth = sc->sc_nutrs;
DPRINTF(1, "Intr. aggr. counter threshold:\nIACTH=%d\n", sc->sc_iacth);
/*
* XXX:
* At the moment normal interrupts work better for us than interrupt
* aggregation, because:
*
* 1. With interrupt aggregation enabled, the I/O performance
* isn't better, but even slightly worse depending on the
* UFS controller and architecture.
* 2. With interrupt aggregation enabled we currently see
* intermittent SCSI command stalling. Probably there is a
* race condition where new SCSI commands are getting
* scheduled, while we miss to reset the interrupt aggregation
* counter/timer, which leaves us with no more interrupts
* triggered. This needs to be fixed, but I couldn't figure
* out yet how.
*/
#if 0
sc->sc_flags |= UFSHCI_FLAGS_AGGR_INTR; /* Enable intr. aggregation */
#endif
ufshci_init(sc);
if (ufshci_ccb_alloc(sc, sc->sc_nutrs) != 0) {
@ -233,6 +249,7 @@ ufshci_reset(struct ufshci_softc *sc)
* Reset and enable host controller
*/
UFSHCI_WRITE_4(sc, UFSHCI_REG_HCE, UFSHCI_REG_HCE_HCE);
/* 7.1.1 Host Controller Initialization: 3) */
for (i = 0; i < retry; i++) {
hce = UFSHCI_READ_4(sc, UFSHCI_REG_HCE);
@ -290,7 +307,8 @@ ufshci_dmamem_alloc(struct ufshci_softc *sc, size_t size)
udm->udm_size = size;
if (bus_dmamap_create(sc->sc_dmat, size, 1, size, 0,
BUS_DMA_WAITOK | BUS_DMA_ALLOCNOW | BUS_DMA_64BIT,
BUS_DMA_WAITOK | BUS_DMA_ALLOCNOW |
(sc->sc_cap & UFSHCI_REG_CAP_64AS) ? BUS_DMA_64BIT : 0,
&udm->udm_map) != 0)
goto udmfree;
@ -345,7 +363,6 @@ ufshci_init(struct ufshci_softc *sc)
*/
/* 7.1.1 Host Controller Initialization: 5) */
//UFSHCI_WRITE_4(sc, UFSHCI_REG_IE, UFSHCI_REG_IE_UCCE |
UFSHCI_WRITE_4(sc, UFSHCI_REG_IE,
UFSHCI_REG_IE_UTRCE | UFSHCI_REG_IE_UTMRCE);
@ -371,8 +388,16 @@ ufshci_init(struct ufshci_softc *sc)
*/
/* 7.1.1 Host Controller Initialization: 11) */
reg = UFSHCI_READ_4(sc, UFSHCI_REG_UTRIACR);
DPRINTF(2, "%s: UTRIACR=0x%08x\n", __func__, reg);
if (sc->sc_flags & UFSHCI_FLAGS_AGGR_INTR) {
UFSHCI_WRITE_4(sc, UFSHCI_REG_UTRIACR,
UFSHCI_REG_UTRIACR_IAEN |
UFSHCI_REG_UTRIACR_IAPWEN |
UFSHCI_REG_UTRIACR_CTR |
UFSHCI_REG_UTRIACR_IACTH(sc->sc_iacth) |
UFSHCI_REG_UTRIACR_IATOVAL(UFSHCI_INTR_AGGR_TIMEOUT));
} else {
UFSHCI_WRITE_4(sc, UFSHCI_REG_UTRIACR, 0);
}
/*
* 7.1.1 Host Controller Initialization: 12)
@ -496,7 +521,10 @@ ufshci_utr_cmd_nop(struct ufshci_softc *sc, struct ufshci_ccb *ccb,
utrd->dw0 |= UFSHCI_UTRD_DW0_DD_NO;
/* 7.2.1 Basic Steps when Building a UTP Transfer Request: 2c) */
utrd->dw0 |= UFSHCI_UTRD_DW0_I_REG;
if (sc->sc_flags & UFSHCI_FLAGS_AGGR_INTR)
utrd->dw0 |= UFSHCI_UTRD_DW0_I_REG;
else
utrd->dw0 |= UFSHCI_UTRD_DW0_I_INT;
/* 7.2.1 Basic Steps when Building a UTP Transfer Request: 2d) */
utrd->dw2 = UFSHCI_UTRD_DW2_OCS_IOV;
@ -586,7 +614,10 @@ ufshci_utr_cmd_lun(struct ufshci_softc *sc, struct ufshci_ccb *ccb,
utrd->dw0 |= UFSHCI_UTRD_DW0_DD_T2I;
/* 7.2.1 Basic Steps when Building a UTP Transfer Request: 2c) */
utrd->dw0 |= UFSHCI_UTRD_DW0_I_REG;
if (sc->sc_flags & UFSHCI_FLAGS_AGGR_INTR)
utrd->dw0 |= UFSHCI_UTRD_DW0_I_REG;
else
utrd->dw0 |= UFSHCI_UTRD_DW0_I_INT;
/* 7.2.1 Basic Steps when Building a UTP Transfer Request: 2d) */
utrd->dw2 = UFSHCI_UTRD_DW2_OCS_IOV;
@ -693,7 +724,10 @@ ufshci_utr_cmd_inquiry(struct ufshci_softc *sc, struct ufshci_ccb *ccb,
utrd->dw0 |= UFSHCI_UTRD_DW0_DD_T2I;
/* 7.2.1 Basic Steps when Building a UTP Transfer Request: 2c) */
utrd->dw0 |= UFSHCI_UTRD_DW0_I_REG;
if (sc->sc_flags & UFSHCI_FLAGS_AGGR_INTR)
utrd->dw0 |= UFSHCI_UTRD_DW0_I_REG;
else
utrd->dw0 |= UFSHCI_UTRD_DW0_I_INT;
/* 7.2.1 Basic Steps when Building a UTP Transfer Request: 2d) */
utrd->dw2 = UFSHCI_UTRD_DW2_OCS_IOV;
@ -798,7 +832,10 @@ ufshci_utr_cmd_capacity16(struct ufshci_softc *sc, struct ufshci_ccb *ccb,
utrd->dw0 |= UFSHCI_UTRD_DW0_DD_T2I;
/* 7.2.1 Basic Steps when Building a UTP Transfer Request: 2c) */
utrd->dw0 |= UFSHCI_UTRD_DW0_I_REG;
if (sc->sc_flags & UFSHCI_FLAGS_AGGR_INTR)
utrd->dw0 |= UFSHCI_UTRD_DW0_I_REG;
else
utrd->dw0 |= UFSHCI_UTRD_DW0_I_INT;
/* 7.2.1 Basic Steps when Building a UTP Transfer Request: 2d) */
utrd->dw2 = UFSHCI_UTRD_DW2_OCS_IOV;
@ -907,7 +944,10 @@ ufshci_utr_cmd_capacity(struct ufshci_softc *sc, struct ufshci_ccb *ccb,
utrd->dw0 |= UFSHCI_UTRD_DW0_DD_T2I;
/* 7.2.1 Basic Steps when Building a UTP Transfer Request: 2c) */
utrd->dw0 |= UFSHCI_UTRD_DW0_I_REG;
if (sc->sc_flags & UFSHCI_FLAGS_AGGR_INTR)
utrd->dw0 |= UFSHCI_UTRD_DW0_I_REG;
else
utrd->dw0 |= UFSHCI_UTRD_DW0_I_INT;
/* 7.2.1 Basic Steps when Building a UTP Transfer Request: 2d) */
utrd->dw2 = UFSHCI_UTRD_DW2_OCS_IOV;
@ -1020,7 +1060,10 @@ ufshci_utr_cmd_io(struct ufshci_softc *sc, struct ufshci_ccb *ccb,
utrd->dw0 |= UFSHCI_UTRD_DW0_DD_I2T;
/* 7.2.1 Basic Steps when Building a UTP Transfer Request: 2c) */
utrd->dw0 |= UFSHCI_UTRD_DW0_I_REG;
if (sc->sc_flags & UFSHCI_FLAGS_AGGR_INTR)
utrd->dw0 |= UFSHCI_UTRD_DW0_I_REG;
else
utrd->dw0 |= UFSHCI_UTRD_DW0_I_INT;
/* 7.2.1 Basic Steps when Building a UTP Transfer Request: 2d) */
utrd->dw2 = UFSHCI_UTRD_DW2_OCS_IOV;
@ -1134,7 +1177,10 @@ ufshci_utr_cmd_sync(struct ufshci_softc *sc, struct ufshci_ccb *ccb,
utrd->dw0 |= UFSHCI_UTRD_DW0_DD_I2T;
/* 7.2.1 Basic Steps when Building a UTP Transfer Request: 2c) */
utrd->dw0 |= UFSHCI_UTRD_DW0_I_REG;
if (sc->sc_flags & UFSHCI_FLAGS_AGGR_INTR)
utrd->dw0 |= UFSHCI_UTRD_DW0_I_REG;
else
utrd->dw0 |= UFSHCI_UTRD_DW0_I_INT;
/* 7.2.1 Basic Steps when Building a UTP Transfer Request: 2d) */
utrd->dw2 = UFSHCI_UTRD_DW2_OCS_IOV;
@ -1247,6 +1293,13 @@ ufshci_xfer_complete(struct ufshci_softc *sc)
DPRINTF(3, "slot %d completed\n", i);
}
/* 7.2.3: Reset Interrupt Aggregation Counter and Timer 4) */
if (sc->sc_flags & UFSHCI_FLAGS_AGGR_INTR) {
UFSHCI_WRITE_4(sc, UFSHCI_REG_UTRIACR,
UFSHCI_REG_UTRIACR_IAEN | UFSHCI_REG_UTRIACR_CTR);
}
mtx_leave(&sc->sc_cmd_mtx);
/*
@ -1287,7 +1340,8 @@ ufshci_ccb_alloc(struct ufshci_softc *sc, int nccbs)
if (bus_dmamap_create(sc->sc_dmat, UFSHCI_UCD_PRDT_MAX_XFER,
UFSHCI_UCD_PRDT_MAX_SEGS, UFSHCI_UCD_PRDT_MAX_XFER, 0,
BUS_DMA_WAITOK | BUS_DMA_ALLOCNOW | BUS_DMA_64BIT,
BUS_DMA_WAITOK | BUS_DMA_ALLOCNOW |
(sc->sc_cap & UFSHCI_REG_CAP_64AS) ? BUS_DMA_64BIT : 0,
&ccb->ccb_dmamap) != 0)
goto free_maps;
@ -1361,17 +1415,6 @@ ufshci_scsi_cmd(struct scsi_xfer *xs)
DPRINTF(3, "%s: cmd=0x%x\n", __func__, xs->cmd.opcode);
/* Schedule interrupt aggregation. */
if (ISSET(xs->flags, SCSI_POLL) == 0 && sc->sc_intraggr_enabled == 0) {
UFSHCI_WRITE_4(sc, UFSHCI_REG_UTRIACR,
UFSHCI_REG_UTRIACR_IAEN |
UFSHCI_REG_UTRIACR_IAPWEN |
UFSHCI_REG_UTRIACR_CTR |
UFSHCI_REG_UTRIACR_IACTH(sc->sc_iacth) |
UFSHCI_REG_UTRIACR_IATOVAL(UFSHCI_INTR_AGGR_TIMEOUT));
sc->sc_intraggr_enabled = 1;
}
switch (xs->cmd.opcode) {
case READ_COMMAND:
@ -1381,7 +1424,6 @@ ufshci_scsi_cmd(struct scsi_xfer *xs)
DPRINTF(3, "io read\n");
ufshci_scsi_io(xs, SCSI_DATA_IN);
break;
case WRITE_COMMAND:
case WRITE_10:
case WRITE_12:
@ -1389,17 +1431,14 @@ ufshci_scsi_cmd(struct scsi_xfer *xs)
DPRINTF(3, "io write\n");
ufshci_scsi_io(xs, SCSI_DATA_OUT);
break;
case SYNCHRONIZE_CACHE:
DPRINTF(3, "sync\n");
ufshci_scsi_sync(xs);
break;
case INQUIRY:
DPRINTF(3, "inquiry\n");
ufshci_scsi_inquiry(xs);
break;
case READ_CAPACITY_16:
DPRINTF(3, "capacity16\n");
ufshci_scsi_capacity16(xs);
@ -1408,7 +1447,6 @@ ufshci_scsi_cmd(struct scsi_xfer *xs)
DPRINTF(3, "capacity\n");
ufshci_scsi_capacity(xs);
break;
case TEST_UNIT_READY:
case PREVENT_ALLOW:
case START_STOP:

6
sys/dev/ic/ufshcireg.h
View file

@ -1,4 +1,4 @@
/* $OpenBSD: ufshcireg.h,v 1.9 2024/05/16 10:52:11 mglocker Exp $ */
/* $OpenBSD: ufshcireg.h,v 1.10 2024/05/20 20:08:04 mglocker Exp $ */
/*
* Copyright (c) 2022 Marcus Glocker <mglocker@openbsd.org>
@ -22,7 +22,9 @@
#define UFSHCI_UCD_PRDT_MAX_SEGS 64
#define UFSHCI_UCD_PRDT_MAX_XFER (UFSHCI_UCD_PRDT_MAX_SEGS * PAGE_SIZE)
#define UFSHCI_INTR_AGGR_TIMEOUT 0x08 /* 320us (1 unit = 40us) */
#define UFSHCI_MAX_UNITS 32
#define UFSHCI_INTR_AGGR_COUNT_MAX 31
#define UFSHCI_SLOTS_MIN 1
#define UFSHCI_SLOTS_MAX 32
#define UFSHCI_LBS 4096 /* UFS Logical Block Size:
For UFS minimum size shall be
4096 bytes */

5
sys/dev/ic/ufshcivar.h
View file

@ -1,4 +1,4 @@
/* $OpenBSD: ufshcivar.h,v 1.5 2024/05/15 20:15:33 mglocker Exp $ */
/* $OpenBSD: ufshcivar.h,v 1.7 2024/05/20 12:42:45 mglocker Exp $ */
/*
* Copyright (c) 2022 Marcus Glocker <mglocker@openbsd.org>
@ -57,10 +57,11 @@ struct ufshci_softc {
bus_size_t sc_ios;
bus_dma_tag_t sc_dmat;
uint8_t sc_intraggr_enabled;
uint8_t sc_iacth;
struct mutex sc_cmd_mtx;
#define UFSHCI_FLAGS_AGGR_INTR 1
uint8_t sc_flags;
uint32_t sc_ver;
uint32_t sc_cap;
uint32_t sc_hcpid;

7
sys/dev/pci/drm/amd/amdgpu/amdgpu_job.c
View file

@ -300,12 +300,15 @@ static struct dma_fence *amdgpu_job_run(struct drm_sched_job *sched_job)
dma_fence_set_error(finished, -ECANCELED);
if (finished->error < 0) {
DRM_INFO("Skip scheduling IBs!\n");
dev_dbg(adev->dev, "Skip scheduling IBs in ring(%s)",
ring->name);
} else {
r = amdgpu_ib_schedule(ring, job->num_ibs, job->ibs, job,
&fence);
if (r)
DRM_ERROR("Error scheduling IBs (%d)\n", r);
dev_err(adev->dev,
"Error scheduling IBs (%d) in ring(%s)", r,
ring->name);
}
job->job_run_counter++;

16
sys/dev/pci/drm/amd/amdgpu/amdgpu_object.c
View file

@ -1269,14 +1269,18 @@ int amdgpu_bo_get_metadata(struct amdgpu_bo *bo, void *buffer,
* amdgpu_bo_move_notify - notification about a memory move
* @bo: pointer to a buffer object
* @evict: if this move is evicting the buffer from the graphics address space
* @new_mem: new resource for backing the BO
*
* Marks the corresponding &amdgpu_bo buffer object as invalid, also performs
* bookkeeping.
* TTM driver callback which is called when ttm moves a buffer.
*/
void amdgpu_bo_move_notify(struct ttm_buffer_object *bo, bool evict)
void amdgpu_bo_move_notify(struct ttm_buffer_object *bo,
bool evict,
struct ttm_resource *new_mem)
{
struct amdgpu_device *adev = amdgpu_ttm_adev(bo->bdev);
struct ttm_resource *old_mem = bo->resource;
struct amdgpu_bo *abo;
if (!amdgpu_bo_is_amdgpu_bo(bo))
@ -1289,13 +1293,13 @@ void amdgpu_bo_move_notify(struct ttm_buffer_object *bo, bool evict)
#ifdef notyet
if (abo->tbo.base.dma_buf && !abo->tbo.base.import_attach &&
bo->resource->mem_type != TTM_PL_SYSTEM)
old_mem && old_mem->mem_type != TTM_PL_SYSTEM)
dma_buf_move_notify(abo->tbo.base.dma_buf);
#endif
/* remember the eviction */
if (evict)
atomic64_inc(&adev->num_evictions);
/* move_notify is called before move happens */
trace_amdgpu_bo_move(abo, new_mem ? new_mem->mem_type : -1,
old_mem ? old_mem->mem_type : -1);
}
void amdgpu_bo_get_memory(struct amdgpu_bo *bo,

4
sys/dev/pci/drm/amd/amdgpu/amdgpu_object.h
View file

@ -329,7 +329,9 @@ int amdgpu_bo_set_metadata (struct amdgpu_bo *bo, void *metadata,
int amdgpu_bo_get_metadata(struct amdgpu_bo *bo, void *buffer,
size_t buffer_size, uint32_t *metadata_size,
uint64_t *flags);
void amdgpu_bo_move_notify(struct ttm_buffer_object *bo, bool evict);
void amdgpu_bo_move_notify(struct ttm_buffer_object *bo,
bool evict,
struct ttm_resource *new_mem);
void amdgpu_bo_release_notify(struct ttm_buffer_object *bo);
vm_fault_t amdgpu_bo_fault_reserve_notify(struct ttm_buffer_object *bo);
void amdgpu_bo_fence(struct amdgpu_bo *bo, struct dma_fence *fence,

56
sys/dev/pci/drm/amd/amdgpu/amdgpu_ttm.c
View file

@ -424,7 +424,7 @@ bool amdgpu_res_cpu_visible(struct amdgpu_device *adev,
return false;
if (res->mem_type == TTM_PL_SYSTEM || res->mem_type == TTM_PL_TT ||
res->mem_type == AMDGPU_PL_PREEMPT)
res->mem_type == AMDGPU_PL_PREEMPT || res->mem_type == AMDGPU_PL_DOORBELL)
return true;
if (res->mem_type != TTM_PL_VRAM)
@ -432,7 +432,7 @@ bool amdgpu_res_cpu_visible(struct amdgpu_device *adev,
amdgpu_res_first(res, 0, res->size, &cursor);
while (cursor.remaining) {
if ((cursor.start + cursor.size) >= adev->gmc.visible_vram_size)
if ((cursor.start + cursor.size) > adev->gmc.visible_vram_size)
return false;
amdgpu_res_next(&cursor, cursor.size);
}
@ -486,14 +486,16 @@ static int amdgpu_bo_move(struct ttm_buffer_object *bo, bool evict,
if (!old_mem || (old_mem->mem_type == TTM_PL_SYSTEM &&
bo->ttm == NULL)) {
amdgpu_bo_move_notify(bo, evict, new_mem);
ttm_bo_move_null(bo, new_mem);
goto out;
return 0;
}
if (old_mem->mem_type == TTM_PL_SYSTEM &&
(new_mem->mem_type == TTM_PL_TT ||
new_mem->mem_type == AMDGPU_PL_PREEMPT)) {
amdgpu_bo_move_notify(bo, evict, new_mem);
ttm_bo_move_null(bo, new_mem);
goto out;
return 0;
}
if ((old_mem->mem_type == TTM_PL_TT ||
old_mem->mem_type == AMDGPU_PL_PREEMPT) &&
@ -503,9 +505,10 @@ static int amdgpu_bo_move(struct ttm_buffer_object *bo, bool evict,
return r;
amdgpu_ttm_backend_unbind(bo->bdev, bo->ttm);
amdgpu_bo_move_notify(bo, evict, new_mem);
ttm_resource_free(bo, &bo->resource);
ttm_bo_assign_mem(bo, new_mem);
goto out;
return 0;
}
if (old_mem->mem_type == AMDGPU_PL_GDS ||
@ -517,8 +520,9 @@ static int amdgpu_bo_move(struct ttm_buffer_object *bo, bool evict,
new_mem->mem_type == AMDGPU_PL_OA ||
new_mem->mem_type == AMDGPU_PL_DOORBELL) {
/* Nothing to save here */
amdgpu_bo_move_notify(bo, evict, new_mem);
ttm_bo_move_null(bo, new_mem);
goto out;
return 0;
}
if (bo->type == ttm_bo_type_device &&
@ -530,23 +534,24 @@ static int amdgpu_bo_move(struct ttm_buffer_object *bo, bool evict,
abo->flags &= ~AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED;
}
if (adev->mman.buffer_funcs_enabled) {
if (((old_mem->mem_type == TTM_PL_SYSTEM &&
new_mem->mem_type == TTM_PL_VRAM) ||
(old_mem->mem_type == TTM_PL_VRAM &&
new_mem->mem_type == TTM_PL_SYSTEM))) {
hop->fpfn = 0;
hop->lpfn = 0;
hop->mem_type = TTM_PL_TT;
hop->flags = TTM_PL_FLAG_TEMPORARY;
return -EMULTIHOP;
}
r = amdgpu_move_blit(bo, evict, new_mem, old_mem);
} else {
r = -ENODEV;
if (adev->mman.buffer_funcs_enabled &&
((old_mem->mem_type == TTM_PL_SYSTEM &&
new_mem->mem_type == TTM_PL_VRAM) ||
(old_mem->mem_type == TTM_PL_VRAM &&
new_mem->mem_type == TTM_PL_SYSTEM))) {
hop->fpfn = 0;
hop->lpfn = 0;
hop->mem_type = TTM_PL_TT;
hop->flags = TTM_PL_FLAG_TEMPORARY;
return -EMULTIHOP;
}
amdgpu_bo_move_notify(bo, evict, new_mem);
if (adev->mman.buffer_funcs_enabled)
r = amdgpu_move_blit(bo, evict, new_mem, old_mem);
else
r = -ENODEV;
if (r) {
/* Check that all memory is CPU accessible */
if (!amdgpu_res_copyable(adev, old_mem) ||
@ -560,11 +565,10 @@ static int amdgpu_bo_move(struct ttm_buffer_object *bo, bool evict,
return r;
}
trace_amdgpu_bo_move(abo, new_mem->mem_type, old_mem->mem_type);
out:
/* update statistics */
/* update statistics after the move */
if (evict)
atomic64_inc(&adev->num_evictions);
atomic64_add(bo->base.size, &adev->num_bytes_moved);
amdgpu_bo_move_notify(bo, evict);
return 0;
}
@ -1605,7 +1609,7 @@ static int amdgpu_ttm_access_memory(struct ttm_buffer_object *bo,
static void
amdgpu_bo_delete_mem_notify(struct ttm_buffer_object *bo)
{
amdgpu_bo_move_notify(bo, false);
amdgpu_bo_move_notify(bo, false, NULL);
}
static struct ttm_device_funcs amdgpu_bo_driver = {

15
sys/dev/pci/drm/amd/amdgpu/aqua_vanjaram.c
View file

@ -61,6 +61,11 @@ void aqua_vanjaram_doorbell_index_init(struct amdgpu_device *adev)
adev->doorbell_index.max_assignment = AMDGPU_DOORBELL_LAYOUT1_MAX_ASSIGNMENT << 1;
}
static bool aqua_vanjaram_xcp_vcn_shared(struct amdgpu_device *adev)
{
return (adev->xcp_mgr->num_xcps > adev->vcn.num_vcn_inst);
}
static void aqua_vanjaram_set_xcp_id(struct amdgpu_device *adev,
uint32_t inst_idx, struct amdgpu_ring *ring)
{
@ -86,7 +91,7 @@ static void aqua_vanjaram_set_xcp_id(struct amdgpu_device *adev,
case AMDGPU_RING_TYPE_VCN_ENC:
case AMDGPU_RING_TYPE_VCN_JPEG:
ip_blk = AMDGPU_XCP_VCN;
if (adev->xcp_mgr->mode == AMDGPU_CPX_PARTITION_MODE)
if (aqua_vanjaram_xcp_vcn_shared(adev))
inst_mask = 1 << (inst_idx * 2);
break;
default:
@ -139,10 +144,12 @@ static int aqua_vanjaram_xcp_sched_list_update(
aqua_vanjaram_xcp_gpu_sched_update(adev, ring, ring->xcp_id);
/* VCN is shared by two partitions under CPX MODE */
/* VCN may be shared by two partitions under CPX MODE in certain
* configs.
*/
if ((ring->funcs->type == AMDGPU_RING_TYPE_VCN_ENC ||
ring->funcs->type == AMDGPU_RING_TYPE_VCN_JPEG) &&
adev->xcp_mgr->mode == AMDGPU_CPX_PARTITION_MODE)
ring->funcs->type == AMDGPU_RING_TYPE_VCN_JPEG) &&
aqua_vanjaram_xcp_vcn_shared(adev))
aqua_vanjaram_xcp_gpu_sched_update(adev, ring, ring->xcp_id + 1);
}

16
sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c
View file

@ -1613,19 +1613,9 @@ static int sdma_v4_4_2_set_ecc_irq_state(struct amdgpu_device *adev,
u32 sdma_cntl;
sdma_cntl = RREG32_SDMA(type, regSDMA_CNTL);
switch (state) {
case AMDGPU_IRQ_STATE_DISABLE:
sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA_CNTL,
DRAM_ECC_INT_ENABLE, 0);
WREG32_SDMA(type, regSDMA_CNTL, sdma_cntl);
break;
/* sdma ecc interrupt is enabled by default
* driver doesn't need to do anything to
* enable the interrupt */
case AMDGPU_IRQ_STATE_ENABLE:
default:
break;
}
sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA_CNTL, DRAM_ECC_INT_ENABLE,
state == AMDGPU_IRQ_STATE_ENABLE ? 1 : 0);
WREG32_SDMA(type, regSDMA_CNTL, sdma_cntl);
return 0;
}

11
sys/dev/pci/drm/amd/amdkfd/kfd_chardev.c
View file

@ -1138,7 +1138,7 @@ static int kfd_ioctl_alloc_memory_of_gpu(struct file *filep,
goto err_unlock;
}
offset = dev->adev->rmmio_remap.bus_addr;
if (!offset) {
if (!offset || (PAGE_SIZE > 4096)) {
err = -ENOMEM;
goto err_unlock;
}
@ -1516,7 +1516,7 @@ static int kfd_ioctl_get_dmabuf_info(struct file *filep,
/* Find a KFD GPU device that supports the get_dmabuf_info query */
for (i = 0; kfd_topology_enum_kfd_devices(i, &dev) == 0; i++)
if (dev)
if (dev && !kfd_devcgroup_check_permission(dev))
break;
if (!dev)
return -EINVAL;
@ -1538,7 +1538,7 @@ static int kfd_ioctl_get_dmabuf_info(struct file *filep,
if (xcp_id >= 0)
args->gpu_id = dmabuf_adev->kfd.dev->nodes[xcp_id]->id;
else
args->gpu_id = dmabuf_adev->kfd.dev->nodes[0]->id;
args->gpu_id = dev->id;
args->flags = flags;
/* Copy metadata buffer to user mode */
@ -2307,7 +2307,7 @@ static int criu_restore_memory_of_gpu(struct kfd_process_device *pdd,
return -EINVAL;
}
offset = pdd->dev->adev->rmmio_remap.bus_addr;
if (!offset) {
if (!offset || (PAGE_SIZE > 4096)) {
pr_err("amdgpu_amdkfd_get_mmio_remap_phys_addr failed\n");
return -ENOMEM;
}
@ -3348,6 +3348,9 @@ static int kfd_mmio_mmap(struct kfd_node *dev, struct kfd_process *process,
if (vma->vm_end - vma->vm_start != PAGE_SIZE)
return -EINVAL;
if (PAGE_SIZE > 4096)
return -EINVAL;
address = dev->adev->rmmio_remap.bus_addr;
vm_flags_set(vma, VM_IO | VM_DONTCOPY | VM_DONTEXPAND | VM_NORESERVE |

17
sys/dev/pci/drm/amd/amdkfd/kfd_device.c
View file

@ -935,7 +935,6 @@ void kgd2kfd_suspend(struct kfd_dev *kfd, bool run_pm)
{
struct kfd_node *node;
int i;
int count;
if (!kfd->init_complete)
return;
@ -943,12 +942,10 @@ void kgd2kfd_suspend(struct kfd_dev *kfd, bool run_pm)
/* for runtime suspend, skip locking kfd */
if (!run_pm) {
mutex_lock(&kfd_processes_mutex);
count = ++kfd_locked;
mutex_unlock(&kfd_processes_mutex);
/* For first KFD device suspend all the KFD processes */
if (count == 1)
if (++kfd_locked == 1)
kfd_suspend_all_processes();
mutex_unlock(&kfd_processes_mutex);
}
for (i = 0; i < kfd->num_nodes; i++) {
@ -959,7 +956,7 @@ void kgd2kfd_suspend(struct kfd_dev *kfd, bool run_pm)
int kgd2kfd_resume(struct kfd_dev *kfd, bool run_pm)
{
int ret, count, i;
int ret, i;
if (!kfd->init_complete)
return 0;
@ -973,12 +970,10 @@ int kgd2kfd_resume(struct kfd_dev *kfd, bool run_pm)
/* for runtime resume, skip unlocking kfd */
if (!run_pm) {
mutex_lock(&kfd_processes_mutex);
count = --kfd_locked;
mutex_unlock(&kfd_processes_mutex);
WARN_ONCE(count < 0, "KFD suspend / resume ref. error");
if (count == 0)
if (--kfd_locked == 0)
ret = kfd_resume_all_processes();
WARN_ONCE(kfd_locked < 0, "KFD suspend / resume ref. error");
mutex_unlock(&kfd_processes_mutex);
}
return ret;

3
sys/dev/pci/drm/amd/amdkfd/kfd_int_process_v10.c
View file

@ -336,7 +336,8 @@ static void event_interrupt_wq_v10(struct kfd_node *dev,
break;
}
kfd_signal_event_interrupt(pasid, context_id0 & 0x7fffff, 23);
} else if (source_id == SOC15_INTSRC_CP_BAD_OPCODE) {
} else if (source_id == SOC15_INTSRC_CP_BAD_OPCODE &&
KFD_DBG_EC_TYPE_IS_PACKET(KFD_DEBUG_CP_BAD_OP_ECODE(context_id0))) {
kfd_set_dbg_ev_from_interrupt(dev, pasid,
KFD_DEBUG_DOORBELL_ID(context_id0),
KFD_EC_MASK(KFD_DEBUG_CP_BAD_OP_ECODE(context_id0)),

3
sys/dev/pci/drm/amd/amdkfd/kfd_int_process_v11.c
View file

@ -325,7 +325,8 @@ static void event_interrupt_wq_v11(struct kfd_node *dev,
/* CP */
if (source_id == SOC15_INTSRC_CP_END_OF_PIPE)
kfd_signal_event_interrupt(pasid, context_id0, 32);
else if (source_id == SOC15_INTSRC_CP_BAD_OPCODE)
else if (source_id == SOC15_INTSRC_CP_BAD_OPCODE &&
KFD_DBG_EC_TYPE_IS_PACKET(KFD_CTXID0_CP_BAD_OP_ECODE(context_id0)))
kfd_set_dbg_ev_from_interrupt(dev, pasid,
KFD_CTXID0_DOORBELL_ID(context_id0),
KFD_EC_MASK(KFD_CTXID0_CP_BAD_OP_ECODE(context_id0)),

3
sys/dev/pci/drm/amd/amdkfd/kfd_int_process_v9.c
View file

@ -385,7 +385,8 @@ static void event_interrupt_wq_v9(struct kfd_node *dev,
break;
}
kfd_signal_event_interrupt(pasid, sq_int_data, 24);
} else if (source_id == SOC15_INTSRC_CP_BAD_OPCODE) {
} else if (source_id == SOC15_INTSRC_CP_BAD_OPCODE &&
KFD_DBG_EC_TYPE_IS_PACKET(KFD_DEBUG_CP_BAD_OP_ECODE(context_id0))) {
kfd_set_dbg_ev_from_interrupt(dev, pasid,
KFD_DEBUG_DOORBELL_ID(context_id0),
KFD_EC_MASK(KFD_DEBUG_CP_BAD_OP_ECODE(context_id0)),

10
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
View file

@ -2978,6 +2978,10 @@ static int dm_resume(void *handle)
/* Do mst topology probing after resuming cached state*/
drm_connector_list_iter_begin(ddev, &iter);
drm_for_each_connector_iter(connector, &iter) {
if (connector->connector_type == DRM_MODE_CONNECTOR_WRITEBACK)
continue;
aconnector = to_amdgpu_dm_connector(connector);
if (aconnector->dc_link->type != dc_connection_mst_branch ||
aconnector->mst_root)
@ -5760,6 +5764,9 @@ get_highest_refresh_rate_mode(struct amdgpu_dm_connector *aconnector,
&aconnector->base.probed_modes :
&aconnector->base.modes;
if (aconnector->base.connector_type == DRM_MODE_CONNECTOR_WRITEBACK)
return NULL;
if (aconnector->freesync_vid_base.clock != 0)
return &aconnector->freesync_vid_base;
@ -8451,6 +8458,9 @@ static void amdgpu_dm_commit_audio(struct drm_device *dev,
continue;
notify:
if (connector->connector_type == DRM_MODE_CONNECTOR_WRITEBACK)
continue;
aconnector = to_amdgpu_dm_connector(connector);
mutex_lock(&adev->dm.audio_lock);

48
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
View file

@ -1465,7 +1465,9 @@ static ssize_t dp_dsc_clock_en_read(struct file *f, char __user *buf,
for (i = 0; i < MAX_PIPES; i++) {
pipe_ctx = &aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i];
if (pipe_ctx->stream &&
pipe_ctx->stream->link == aconnector->dc_link)
pipe_ctx->stream->link == aconnector->dc_link &&
pipe_ctx->stream->sink &&
pipe_ctx->stream->sink == aconnector->dc_sink)
break;
}
@ -1566,7 +1568,9 @@ static ssize_t dp_dsc_clock_en_write(struct file *f, const char __user *buf,
for (i = 0; i < MAX_PIPES; i++) {
pipe_ctx = &aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i];
if (pipe_ctx->stream &&
pipe_ctx->stream->link == aconnector->dc_link)
pipe_ctx->stream->link == aconnector->dc_link &&
pipe_ctx->stream->sink &&
pipe_ctx->stream->sink == aconnector->dc_sink)
break;
}
@ -1651,7 +1655,9 @@ static ssize_t dp_dsc_slice_width_read(struct file *f, char __user *buf,
for (i = 0; i < MAX_PIPES; i++) {
pipe_ctx = &aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i];
if (pipe_ctx->stream &&
pipe_ctx->stream->link == aconnector->dc_link)
pipe_ctx->stream->link == aconnector->dc_link &&
pipe_ctx->stream->sink &&
pipe_ctx->stream->sink == aconnector->dc_sink)
break;
}
@ -1750,7 +1756,9 @@ static ssize_t dp_dsc_slice_width_write(struct file *f, const char __user *buf,
for (i = 0; i < MAX_PIPES; i++) {
pipe_ctx = &aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i];
if (pipe_ctx->stream &&
pipe_ctx->stream->link == aconnector->dc_link)
pipe_ctx->stream->link == aconnector->dc_link &&
pipe_ctx->stream->sink &&
pipe_ctx->stream->sink == aconnector->dc_sink)
break;
}
@ -1835,7 +1843,9 @@ static ssize_t dp_dsc_slice_height_read(struct file *f, char __user *buf,
for (i = 0; i < MAX_PIPES; i++) {
pipe_ctx = &aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i];
if (pipe_ctx->stream &&
pipe_ctx->stream->link == aconnector->dc_link)
pipe_ctx->stream->link == aconnector->dc_link &&
pipe_ctx->stream->sink &&
pipe_ctx->stream->sink == aconnector->dc_sink)
break;
}
@ -1934,7 +1944,9 @@ static ssize_t dp_dsc_slice_height_write(struct file *f, const char __user *buf,
for (i = 0; i < MAX_PIPES; i++) {
pipe_ctx = &aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i];
if (pipe_ctx->stream &&
pipe_ctx->stream->link == aconnector->dc_link)
pipe_ctx->stream->link == aconnector->dc_link &&
pipe_ctx->stream->sink &&
pipe_ctx->stream->sink == aconnector->dc_sink)
break;
}
@ -2015,7 +2027,9 @@ static ssize_t dp_dsc_bits_per_pixel_read(struct file *f, char __user *buf,
for (i = 0; i < MAX_PIPES; i++) {
pipe_ctx = &aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i];
if (pipe_ctx->stream &&
pipe_ctx->stream->link == aconnector->dc_link)
pipe_ctx->stream->link == aconnector->dc_link &&
pipe_ctx->stream->sink &&
pipe_ctx->stream->sink == aconnector->dc_sink)
break;
}
@ -2111,7 +2125,9 @@ static ssize_t dp_dsc_bits_per_pixel_write(struct file *f, const char __user *bu
for (i = 0; i < MAX_PIPES; i++) {
pipe_ctx = &aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i];
if (pipe_ctx->stream &&
pipe_ctx->stream->link == aconnector->dc_link)
pipe_ctx->stream->link == aconnector->dc_link &&
pipe_ctx->stream->sink &&
pipe_ctx->stream->sink == aconnector->dc_sink)
break;
}
@ -2190,7 +2206,9 @@ static ssize_t dp_dsc_pic_width_read(struct file *f, char __user *buf,
for (i = 0; i < MAX_PIPES; i++) {
pipe_ctx = &aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i];
if (pipe_ctx->stream &&
pipe_ctx->stream->link == aconnector->dc_link)
pipe_ctx->stream->link == aconnector->dc_link &&
pipe_ctx->stream->sink &&
pipe_ctx->stream->sink == aconnector->dc_sink)
break;
}
@ -2246,7 +2264,9 @@ static ssize_t dp_dsc_pic_height_read(struct file *f, char __user *buf,
for (i = 0; i < MAX_PIPES; i++) {
pipe_ctx = &aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i];
if (pipe_ctx->stream &&
pipe_ctx->stream->link == aconnector->dc_link)
pipe_ctx->stream->link == aconnector->dc_link &&
pipe_ctx->stream->sink &&
pipe_ctx->stream->sink == aconnector->dc_sink)
break;
}
@ -2317,7 +2337,9 @@ static ssize_t dp_dsc_chunk_size_read(struct file *f, char __user *buf,
for (i = 0; i < MAX_PIPES; i++) {
pipe_ctx = &aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i];
if (pipe_ctx->stream &&
pipe_ctx->stream->link == aconnector->dc_link)
pipe_ctx->stream->link == aconnector->dc_link &&
pipe_ctx->stream->sink &&
pipe_ctx->stream->sink == aconnector->dc_sink)
break;
}
@ -2388,7 +2410,9 @@ static ssize_t dp_dsc_slice_bpg_offset_read(struct file *f, char __user *buf,
for (i = 0; i < MAX_PIPES; i++) {
pipe_ctx = &aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i];
if (pipe_ctx->stream &&
pipe_ctx->stream->link == aconnector->dc_link)
pipe_ctx->stream->link == aconnector->dc_link &&
pipe_ctx->stream->sink &&
pipe_ctx->stream->sink == aconnector->dc_sink)
break;
}

1
sys/dev/pci/drm/amd/display/dc/bios/bios_parser2.c
View file

@ -2961,6 +2961,7 @@ static enum bp_result construct_integrated_info(
result = get_integrated_info_v2_1(bp, info);
break;
case 2:
case 3:
result = get_integrated_info_v2_2(bp, info);
break;
default:

6
sys/dev/pci/drm/amd/display/dc/dcn31/dcn31_hpo_dp_link_encoder.c
View file

@ -395,6 +395,12 @@ void dcn31_hpo_dp_link_enc_set_throttled_vcp_size(
x),
25));
// If y rounds up to integer, carry it over to x.
if (y >> 25) {
x += 1;
y = 0;
}
switch (stream_encoder_inst) {
case 0:
REG_SET_2(DP_DPHY_SYM32_VC_RATE_CNTL0, 0,

2
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c
View file

@ -226,7 +226,7 @@ static int smu_v13_0_4_system_features_control(struct smu_context *smu, bool en)
struct amdgpu_device *adev = smu->adev;
int ret = 0;
if (!en && !adev->in_s0ix) {
if (!en && adev->in_s4) {
/* Adds a GFX reset as workaround just before sending the
* MP1_UNLOAD message to prevent GC/RLC/PMFW from entering
* an invalid state.

2
sys/dev/pci/drm/drm_connector.c
View file

@ -2933,7 +2933,7 @@ int drm_mode_getconnector(struct drm_device *dev, void *data,
dev->mode_config.max_width,
dev->mode_config.max_height);
else
drm_dbg_kms(dev, "User-space requested a forced probe on [CONNECTOR:%d:%s] but is not the DRM master, demoting to read-only probe",
drm_dbg_kms(dev, "User-space requested a forced probe on [CONNECTOR:%d:%s] but is not the DRM master, demoting to read-only probe\n",
connector->base.id, connector->name);
}

113
sys/dev/pci/drm/i915/display/intel_audio.c
View file

@ -75,19 +75,6 @@ struct intel_audio_funcs {
struct intel_crtc_state *crtc_state);
};
/* DP N/M table */
#define LC_810M 810000
#define LC_540M 540000
#define LC_270M 270000
#define LC_162M 162000
struct dp_aud_n_m {
int sample_rate;
int clock;
u16 m;
u16 n;
};
struct hdmi_aud_ncts {
int sample_rate;
int clock;
@ -95,60 +82,6 @@ struct hdmi_aud_ncts {
int cts;
};
/* Values according to DP 1.4 Table 2-104 */
static const struct dp_aud_n_m dp_aud_n_m[] = {
{ 32000, LC_162M, 1024, 10125 },
{ 44100, LC_162M, 784, 5625 },
{ 48000, LC_162M, 512, 3375 },
{ 64000, LC_162M, 2048, 10125 },
{ 88200, LC_162M, 1568, 5625 },
{ 96000, LC_162M, 1024, 3375 },
{ 128000, LC_162M, 4096, 10125 },
{ 176400, LC_162M, 3136, 5625 },
{ 192000, LC_162M, 2048, 3375 },
{ 32000, LC_270M, 1024, 16875 },
{ 44100, LC_270M, 784, 9375 },
{ 48000, LC_270M, 512, 5625 },
{ 64000, LC_270M, 2048, 16875 },
{ 88200, LC_270M, 1568, 9375 },
{ 96000, LC_270M, 1024, 5625 },
{ 128000, LC_270M, 4096, 16875 },
{ 176400, LC_270M, 3136, 9375 },
{ 192000, LC_270M, 2048, 5625 },
{ 32000, LC_540M, 1024, 33750 },
{ 44100, LC_540M, 784, 18750 },
{ 48000, LC_540M, 512, 11250 },
{ 64000, LC_540M, 2048, 33750 },
{ 88200, LC_540M, 1568, 18750 },
{ 96000, LC_540M, 1024, 11250 },
{ 128000, LC_540M, 4096, 33750 },
{ 176400, LC_540M, 3136, 18750 },
{ 192000, LC_540M, 2048, 11250 },
{ 32000, LC_810M, 1024, 50625 },
{ 44100, LC_810M, 784, 28125 },
{ 48000, LC_810M, 512, 16875 },
{ 64000, LC_810M, 2048, 50625 },
{ 88200, LC_810M, 1568, 28125 },
{ 96000, LC_810M, 1024, 16875 },
{ 128000, LC_810M, 4096, 50625 },
{ 176400, LC_810M, 3136, 28125 },
{ 192000, LC_810M, 2048, 16875 },
};
static const struct dp_aud_n_m *
audio_config_dp_get_n_m(const struct intel_crtc_state *crtc_state, int rate)
{
int i;
for (i = 0; i < ARRAY_SIZE(dp_aud_n_m); i++) {
if (rate == dp_aud_n_m[i].sample_rate &&
crtc_state->port_clock == dp_aud_n_m[i].clock)
return &dp_aud_n_m[i];
}
return NULL;
}
static const struct {
int clock;
u32 config;
@ -386,47 +319,17 @@ hsw_dp_audio_config_update(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state)
{
struct drm_i915_private *i915 = to_i915(encoder->base.dev);
struct i915_audio_component *acomp = i915->display.audio.component;
enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
enum port port = encoder->port;
const struct dp_aud_n_m *nm;
int rate;
u32 tmp;
rate = acomp ? acomp->aud_sample_rate[port] : 0;
nm = audio_config_dp_get_n_m(crtc_state, rate);
if (nm)
drm_dbg_kms(&i915->drm, "using Maud %u, Naud %u\n", nm->m,
nm->n);
else
drm_dbg_kms(&i915->drm, "using automatic Maud, Naud\n");
/* Enable time stamps. Let HW calculate Maud/Naud values */
intel_de_rmw(i915, HSW_AUD_CFG(cpu_transcoder),
AUD_CONFIG_N_VALUE_INDEX |
AUD_CONFIG_PIXEL_CLOCK_HDMI_MASK |
AUD_CONFIG_UPPER_N_MASK |
AUD_CONFIG_LOWER_N_MASK |
AUD_CONFIG_N_PROG_ENABLE,
AUD_CONFIG_N_VALUE_INDEX);
tmp = intel_de_read(i915, HSW_AUD_CFG(cpu_transcoder));
tmp &= ~AUD_CONFIG_N_VALUE_INDEX;
tmp &= ~AUD_CONFIG_PIXEL_CLOCK_HDMI_MASK;
tmp &= ~AUD_CONFIG_N_PROG_ENABLE;
tmp |= AUD_CONFIG_N_VALUE_INDEX;
if (nm) {
tmp &= ~AUD_CONFIG_N_MASK;
tmp |= AUD_CONFIG_N(nm->n);
tmp |= AUD_CONFIG_N_PROG_ENABLE;
}
intel_de_write(i915, HSW_AUD_CFG(cpu_transcoder), tmp);
tmp = intel_de_read(i915, HSW_AUD_M_CTS_ENABLE(cpu_transcoder));
tmp &= ~AUD_CONFIG_M_MASK;
tmp &= ~AUD_M_CTS_M_VALUE_INDEX;
tmp &= ~AUD_M_CTS_M_PROG_ENABLE;
if (nm) {
tmp |= nm->m;
tmp |= AUD_M_CTS_M_VALUE_INDEX;
tmp |= AUD_M_CTS_M_PROG_ENABLE;
}
intel_de_write(i915, HSW_AUD_M_CTS_ENABLE(cpu_transcoder), tmp);
}
static void

19
sys/dev/pci/drm/i915/display/intel_bios.c
View file

@ -1035,22 +1035,11 @@ parse_lfp_backlight(struct drm_i915_private *i915,
panel->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI;
panel->vbt.backlight.controller = 0;
if (i915->display.vbt.version >= 191) {
size_t exp_size;
const struct lfp_backlight_control_method *method;
if (i915->display.vbt.version >= 236)
exp_size = sizeof(struct bdb_lfp_backlight_data);
else if (i915->display.vbt.version >= 234)
exp_size = EXP_BDB_LFP_BL_DATA_SIZE_REV_234;
else
exp_size = EXP_BDB_LFP_BL_DATA_SIZE_REV_191;
if (get_blocksize(backlight_data) >= exp_size) {
const struct lfp_backlight_control_method *method;
method = &backlight_data->backlight_control[panel_type];
panel->vbt.backlight.type = method->type;
panel->vbt.backlight.controller = method->controller;
}
method = &backlight_data->backlight_control[panel_type];
panel->vbt.backlight.type = method->type;
panel->vbt.backlight.controller = method->controller;
}
panel->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;

5
sys/dev/pci/drm/i915/display/intel_vbt_defs.h
View file

@ -897,11 +897,6 @@ struct lfp_brightness_level {
u16 reserved;
} __packed;
#define EXP_BDB_LFP_BL_DATA_SIZE_REV_191 \
offsetof(struct bdb_lfp_backlight_data, brightness_level)
#define EXP_BDB_LFP_BL_DATA_SIZE_REV_234 \
offsetof(struct bdb_lfp_backlight_data, brightness_precision_bits)
struct bdb_lfp_backlight_data {
u8 entry_size;
struct lfp_backlight_data_entry data[16];

6
sys/dev/pci/drm/i915/gt/intel_gt_ccs_mode.c
View file

@ -8,14 +8,14 @@
#include "intel_gt_ccs_mode.h"
#include "intel_gt_regs.h"
void intel_gt_apply_ccs_mode(struct intel_gt *gt)
unsigned int intel_gt_apply_ccs_mode(struct intel_gt *gt)
{
int cslice;
u32 mode = 0;
int first_ccs = __ffs(CCS_MASK(gt));
if (!IS_DG2(gt->i915))
return;
return 0;
/* Build the value for the fixed CCS load balancing */
for (cslice = 0; cslice < I915_MAX_CCS; cslice++) {
@ -35,5 +35,5 @@ void intel_gt_apply_ccs_mode(struct intel_gt *gt)
XEHP_CCS_MODE_CSLICE_MASK);
}
intel_uncore_write(gt->uncore, XEHP_CCS_MODE, mode);
return mode;
}

2
sys/dev/pci/drm/i915/gt/intel_gt_ccs_mode.h
View file

@ -8,6 +8,6 @@
struct intel_gt;
void intel_gt_apply_ccs_mode(struct intel_gt *gt);
unsigned int intel_gt_apply_ccs_mode(struct intel_gt *gt);
#endif /* __INTEL_GT_CCS_MODE_H__ */

4
sys/dev/pci/drm/i915/gt/intel_workarounds.c
View file

@ -2828,6 +2828,7 @@ add_render_compute_tuning_settings(struct intel_gt *gt,
static void ccs_engine_wa_mode(struct intel_engine_cs *engine, struct i915_wa_list *wal)
{
struct intel_gt *gt = engine->gt;
u32 mode;
if (!IS_DG2(gt->i915))
return;
@ -2844,7 +2845,8 @@ static void ccs_engine_wa_mode(struct intel_engine_cs *engine, struct i915_wa_li
* After having disabled automatic load balancing we need to
* assign all slices to a single CCS. We will call it CCS mode 1
*/
intel_gt_apply_ccs_mode(gt);
mode = intel_gt_apply_ccs_mode(gt);
wa_masked_en(wal, XEHP_CCS_MODE, mode);
}
/*

1
sys/dev/pci/drm/include/linux/compiler.h
View file

@ -24,6 +24,7 @@
#define noinline __attribute__((__noinline__))
#define noinline_for_stack __attribute__((__noinline__))
#define fallthrough do {} while (0)
#define __counted_by(x)
#define __PASTE(x,y) __CONCAT(x,y)

10
sys/dev/pci/drm/radeon/pptable.h
View file

@ -424,7 +424,7 @@ typedef struct _ATOM_PPLIB_SUMO_CLOCK_INFO{
typedef struct _ATOM_PPLIB_STATE_V2
{
//number of valid dpm levels in this state; Driver uses it to calculate the whole
//size of the state: sizeof(ATOM_PPLIB_STATE_V2) + (ucNumDPMLevels - 1) * sizeof(UCHAR)
//size of the state: struct_size(ATOM_PPLIB_STATE_V2, clockInfoIndex, ucNumDPMLevels)
UCHAR ucNumDPMLevels;
//a index to the array of nonClockInfos
@ -432,14 +432,14 @@ typedef struct _ATOM_PPLIB_STATE_V2
/**
* Driver will read the first ucNumDPMLevels in this array
*/
UCHAR clockInfoIndex[1];
UCHAR clockInfoIndex[] __counted_by(ucNumDPMLevels);
} ATOM_PPLIB_STATE_V2;
typedef struct _StateArray{
//how many states we have
UCHAR ucNumEntries;
ATOM_PPLIB_STATE_V2 states[1];
ATOM_PPLIB_STATE_V2 states[] __counted_by(ucNumEntries);
}StateArray;
@ -450,7 +450,7 @@ typedef struct _ClockInfoArray{
//sizeof(ATOM_PPLIB_CLOCK_INFO)
UCHAR ucEntrySize;
UCHAR clockInfo[1];
UCHAR clockInfo[] __counted_by(ucNumEntries);
}ClockInfoArray;
typedef struct _NonClockInfoArray{
@ -460,7 +460,7 @@ typedef struct _NonClockInfoArray{
//sizeof(ATOM_PPLIB_NONCLOCK_INFO)
UCHAR ucEntrySize;
ATOM_PPLIB_NONCLOCK_INFO nonClockInfo[1];
ATOM_PPLIB_NONCLOCK_INFO nonClockInfo[] __counted_by(ucNumEntries);
}NonClockInfoArray;
typedef struct _ATOM_PPLIB_Clock_Voltage_Dependency_Record

2
sys/dev/pci/drm/ttm/ttm_tt.c
View file

@ -92,7 +92,7 @@ int ttm_tt_create(struct ttm_buffer_object *bo, bool zero_alloc)
*/
if (bdev->pool.use_dma_alloc && cc_platform_has(CC_ATTR_GUEST_MEM_ENCRYPT)) {
page_flags |= TTM_TT_FLAG_DECRYPTED;
drm_info(ddev, "TT memory decryption enabled.");
drm_info_once(ddev, "TT memory decryption enabled.");
}
bo->ttm = bdev->funcs->ttm_tt_create(bo, page_flags);

88
sys/dev/pci/if_igc.c
View file

@ -1,4 +1,4 @@
/* $OpenBSD: if_igc.c,v 1.23 2024/05/07 18:35:23 jan Exp $ */
/* $OpenBSD: if_igc.c,v 1.24 2024/05/21 11:19:39 bluhm Exp $ */
/*-
* SPDX-License-Identifier: BSD-2-Clause
*
@ -107,21 +107,21 @@ void igc_setup_interface(struct igc_softc *);
void igc_init(void *);
void igc_start(struct ifqueue *);
int igc_txeof(struct tx_ring *);
int igc_txeof(struct igc_txring *);
void igc_stop(struct igc_softc *);
int igc_ioctl(struct ifnet *, u_long, caddr_t);
int igc_rxrinfo(struct igc_softc *, struct if_rxrinfo *);
int igc_rxfill(struct rx_ring *);
int igc_rxfill(struct igc_rxring *);
void igc_rxrefill(void *);
int igc_rxeof(struct rx_ring *);
int igc_rxeof(struct igc_rxring *);
void igc_rx_checksum(uint32_t, struct mbuf *, uint32_t);
void igc_watchdog(struct ifnet *);
void igc_media_status(struct ifnet *, struct ifmediareq *);
int igc_media_change(struct ifnet *);
void igc_iff(struct igc_softc *);
void igc_update_link_status(struct igc_softc *);
int igc_get_buf(struct rx_ring *, int);
int igc_tx_ctx_setup(struct tx_ring *, struct mbuf *, int, uint32_t *,
int igc_get_buf(struct igc_rxring *, int);
int igc_tx_ctx_setup(struct igc_txring *, struct mbuf *, int, uint32_t *,
uint32_t *);
void igc_configure_queues(struct igc_softc *);
@ -132,18 +132,18 @@ void igc_disable_intr(struct igc_softc *);
int igc_intr_link(void *);
int igc_intr_queue(void *);
int igc_allocate_transmit_buffers(struct tx_ring *);
int igc_allocate_transmit_buffers(struct igc_txring *);
int igc_setup_transmit_structures(struct igc_softc *);
int igc_setup_transmit_ring(struct tx_ring *);
int igc_setup_transmit_ring(struct igc_txring *);
void igc_initialize_transmit_unit(struct igc_softc *);
void igc_free_transmit_structures(struct igc_softc *);
void igc_free_transmit_buffers(struct tx_ring *);
int igc_allocate_receive_buffers(struct rx_ring *);
void igc_free_transmit_buffers(struct igc_txring *);
int igc_allocate_receive_buffers(struct igc_rxring *);
int igc_setup_receive_structures(struct igc_softc *);
int igc_setup_receive_ring(struct rx_ring *);
int igc_setup_receive_ring(struct igc_rxring *);
void igc_initialize_receive_unit(struct igc_softc *);
void igc_free_receive_structures(struct igc_softc *);
void igc_free_receive_buffers(struct rx_ring *);
void igc_free_receive_buffers(struct igc_rxring *);
void igc_initialize_rss_mapping(struct igc_softc *);
void igc_get_hw_control(struct igc_softc *);
@ -374,8 +374,8 @@ int
igc_allocate_queues(struct igc_softc *sc)
{
struct igc_queue *iq;
struct tx_ring *txr;
struct rx_ring *rxr;
struct igc_txring *txr;
struct igc_rxring *rxr;
int i, rsize, rxconf, tsize, txconf;
/* Allocate the top level queue structs. */
@ -387,7 +387,7 @@ igc_allocate_queues(struct igc_softc *sc)
}
/* Allocate the TX ring. */
sc->tx_rings = mallocarray(sc->sc_nqueues, sizeof(struct tx_ring),
sc->tx_rings = mallocarray(sc->sc_nqueues, sizeof(struct igc_txring),
M_DEVBUF, M_NOWAIT | M_ZERO);
if (sc->tx_rings == NULL) {
printf("%s: unable to allocate TX ring\n", DEVNAME(sc));
@ -395,7 +395,7 @@ igc_allocate_queues(struct igc_softc *sc)
}
/* Allocate the RX ring. */
sc->rx_rings = mallocarray(sc->sc_nqueues, sizeof(struct rx_ring),
sc->rx_rings = mallocarray(sc->sc_nqueues, sizeof(struct igc_rxring),
M_DEVBUF, M_NOWAIT | M_ZERO);
if (sc->rx_rings == NULL) {
printf("%s: unable to allocate RX ring\n", DEVNAME(sc));
@ -456,10 +456,12 @@ err_rx_desc:
err_tx_desc:
for (txr = sc->tx_rings; txconf > 0; txr++, txconf--)
igc_dma_free(sc, &txr->txdma);
free(sc->rx_rings, M_DEVBUF, sc->sc_nqueues * sizeof(struct rx_ring));
free(sc->rx_rings, M_DEVBUF,
sc->sc_nqueues * sizeof(struct igc_rxring));
sc->rx_rings = NULL;
rx_fail:
free(sc->tx_rings, M_DEVBUF, sc->sc_nqueues * sizeof(struct tx_ring));
free(sc->tx_rings, M_DEVBUF,
sc->sc_nqueues * sizeof(struct igc_txring));
sc->tx_rings = NULL;
fail:
return ENOMEM;
@ -833,8 +835,8 @@ igc_setup_interface(struct igc_softc *sc)
for (i = 0; i < sc->sc_nqueues; i++) {
struct ifqueue *ifq = ifp->if_ifqs[i];
struct ifiqueue *ifiq = ifp->if_iqs[i];
struct tx_ring *txr = &sc->tx_rings[i];
struct rx_ring *rxr = &sc->rx_rings[i];
struct igc_txring *txr = &sc->tx_rings[i];
struct igc_rxring *rxr = &sc->rx_rings[i];
ifq->ifq_softc = txr;
txr->ifq = ifq;
@ -849,7 +851,7 @@ igc_init(void *arg)
{
struct igc_softc *sc = (struct igc_softc *)arg;
struct ifnet *ifp = &sc->sc_ac.ac_if;
struct rx_ring *rxr;
struct igc_rxring *rxr;
uint32_t ctrl = 0;
int i, s;
@ -959,7 +961,7 @@ igc_start(struct ifqueue *ifq)
{
struct ifnet *ifp = ifq->ifq_if;
struct igc_softc *sc = ifp->if_softc;
struct tx_ring *txr = ifq->ifq_softc;
struct igc_txring *txr = ifq->ifq_softc;
union igc_adv_tx_desc *txdesc;
struct igc_tx_buf *txbuf;
bus_dmamap_t map;
@ -1067,7 +1069,7 @@ igc_start(struct ifqueue *ifq)
}
int
igc_txeof(struct tx_ring *txr)
igc_txeof(struct igc_txring *txr)
{
struct igc_softc *sc = txr->sc;
struct ifqueue *ifq = txr->ifq;
@ -1223,7 +1225,7 @@ int
igc_rxrinfo(struct igc_softc *sc, struct if_rxrinfo *ifri)
{
struct if_rxring_info *ifr;
struct rx_ring *rxr;
struct igc_rxring *rxr;
int error, i, n = 0;
ifr = mallocarray(sc->sc_nqueues, sizeof(*ifr), M_DEVBUF,
@ -1244,7 +1246,7 @@ igc_rxrinfo(struct igc_softc *sc, struct if_rxrinfo *ifri)
}
int
igc_rxfill(struct rx_ring *rxr)
igc_rxfill(struct igc_rxring *rxr)
{
struct igc_softc *sc = rxr->sc;
int i, post = 0;
@ -1277,7 +1279,7 @@ igc_rxfill(struct rx_ring *rxr)
void
igc_rxrefill(void *xrxr)
{
struct rx_ring *rxr = xrxr;
struct igc_rxring *rxr = xrxr;
struct igc_softc *sc = rxr->sc;
if (igc_rxfill(rxr)) {
@ -1296,7 +1298,7 @@ igc_rxrefill(void *xrxr)
*
*********************************************************************/
int
igc_rxeof(struct rx_ring *rxr)
igc_rxeof(struct igc_rxring *rxr)
{
struct igc_softc *sc = rxr->sc;
struct ifnet *ifp = &sc->sc_ac.ac_if;
@ -1657,7 +1659,7 @@ igc_update_link_status(struct igc_softc *sc)
*
**********************************************************************/
int
igc_get_buf(struct rx_ring *rxr, int i)
igc_get_buf(struct igc_rxring *rxr, int i)
{
struct igc_softc *sc = rxr->sc;
struct igc_rx_buf *rxbuf;
@ -1812,8 +1814,8 @@ igc_intr_queue(void *arg)
struct igc_queue *iq = arg;
struct igc_softc *sc = iq->sc;
struct ifnet *ifp = &sc->sc_ac.ac_if;
struct rx_ring *rxr = iq->rxr;
struct tx_ring *txr = iq->txr;
struct igc_rxring *rxr = iq->rxr;
struct igc_txring *txr = iq->txr;
if (ifp->if_flags & IFF_RUNNING) {
igc_txeof(txr);
@ -1833,7 +1835,7 @@ igc_intr_queue(void *arg)
*
**********************************************************************/
int
igc_allocate_transmit_buffers(struct tx_ring *txr)
igc_allocate_transmit_buffers(struct igc_txring *txr)
{
struct igc_softc *sc = txr->sc;
struct igc_tx_buf *txbuf;
@ -1875,7 +1877,7 @@ fail:
int
igc_setup_transmit_structures(struct igc_softc *sc)
{
struct tx_ring *txr = sc->tx_rings;
struct igc_txring *txr = sc->tx_rings;
int i;
for (i = 0; i < sc->sc_nqueues; i++, txr++) {
@ -1895,7 +1897,7 @@ fail:
*
**********************************************************************/
int
igc_setup_transmit_ring(struct tx_ring *txr)
igc_setup_transmit_ring(struct igc_txring *txr)
{
struct igc_softc *sc = txr->sc;
@ -1927,7 +1929,7 @@ void
igc_initialize_transmit_unit(struct igc_softc *sc)
{
struct ifnet *ifp = &sc->sc_ac.ac_if;
struct tx_ring *txr;
struct igc_txring *txr;
struct igc_hw *hw = &sc->hw;
uint64_t bus_addr;
uint32_t tctl, txdctl = 0;
@ -1981,7 +1983,7 @@ igc_initialize_transmit_unit(struct igc_softc *sc)
void
igc_free_transmit_structures(struct igc_softc *sc)
{
struct tx_ring *txr = sc->tx_rings;
struct igc_txring *txr = sc->tx_rings;
int i;
for (i = 0; i < sc->sc_nqueues; i++, txr++)
@ -1994,7 +1996,7 @@ igc_free_transmit_structures(struct igc_softc *sc)
*
**********************************************************************/
void
igc_free_transmit_buffers(struct tx_ring *txr)
igc_free_transmit_buffers(struct igc_txring *txr)
{
struct igc_softc *sc = txr->sc;
struct igc_tx_buf *txbuf;
@ -2035,7 +2037,7 @@ igc_free_transmit_buffers(struct tx_ring *txr)
**********************************************************************/
int
igc_tx_ctx_setup(struct tx_ring *txr, struct mbuf *mp, int prod,
igc_tx_ctx_setup(struct igc_txring *txr, struct mbuf *mp, int prod,
uint32_t *cmd_type_len, uint32_t *olinfo_status)
{
struct ether_extracted ext;
@ -2140,7 +2142,7 @@ igc_tx_ctx_setup(struct tx_ring *txr, struct mbuf *mp, int prod,
*
**********************************************************************/
int
igc_allocate_receive_buffers(struct rx_ring *rxr)
igc_allocate_receive_buffers(struct igc_rxring *rxr)
{
struct igc_softc *sc = rxr->sc;
struct igc_rx_buf *rxbuf;
@ -2183,7 +2185,7 @@ fail:
int
igc_setup_receive_structures(struct igc_softc *sc)
{
struct rx_ring *rxr = sc->rx_rings;
struct igc_rxring *rxr = sc->rx_rings;
int i;
for (i = 0; i < sc->sc_nqueues; i++, rxr++) {
@ -2203,7 +2205,7 @@ fail:
*
**********************************************************************/
int
igc_setup_receive_ring(struct rx_ring *rxr)
igc_setup_receive_ring(struct igc_rxring *rxr)
{
struct igc_softc *sc = rxr->sc;
struct ifnet *ifp = &sc->sc_ac.ac_if;
@ -2238,7 +2240,7 @@ igc_setup_receive_ring(struct rx_ring *rxr)
void
igc_initialize_receive_unit(struct igc_softc *sc)
{
struct rx_ring *rxr = sc->rx_rings;
struct igc_rxring *rxr = sc->rx_rings;
struct igc_hw *hw = &sc->hw;
uint32_t rctl, rxcsum, srrctl = 0;
int i;
@ -2342,7 +2344,7 @@ igc_initialize_receive_unit(struct igc_softc *sc)
void
igc_free_receive_structures(struct igc_softc *sc)
{
struct rx_ring *rxr;
struct igc_rxring *rxr;
int i;
for (i = 0, rxr = sc->rx_rings; i < sc->sc_nqueues; i++, rxr++)
@ -2358,7 +2360,7 @@ igc_free_receive_structures(struct igc_softc *sc)
*
**********************************************************************/
void
igc_free_receive_buffers(struct rx_ring *rxr)
igc_free_receive_buffers(struct igc_rxring *rxr)
{
struct igc_softc *sc = rxr->sc;
struct igc_rx_buf *rxbuf;

14
sys/dev/pci/if_igc.h
View file

@ -1,4 +1,4 @@
/* $OpenBSD: if_igc.h,v 1.3 2024/05/06 04:25:52 dlg Exp $ */
/* $OpenBSD: if_igc.h,v 1.4 2024/05/21 11:19:39 bluhm Exp $ */
/*-
* SPDX-License-Identifier: BSD-2-Clause
*
@ -250,14 +250,14 @@ struct igc_queue {
char name[16];
pci_intr_handle_t ih;
void *tag;
struct tx_ring *txr;
struct rx_ring *rxr;
struct igc_txring *txr;
struct igc_rxring *rxr;
};
/*
* The transmit ring, one per tx queue.
*/
struct tx_ring {
struct igc_txring {
struct igc_softc *sc;
struct ifqueue *ifq;
uint32_t me;
@ -273,7 +273,7 @@ struct tx_ring {
/*
* The Receive ring, one per rx queue.
*/
struct rx_ring {
struct igc_rxring {
struct igc_softc *sc;
struct ifiqueue *ifiq;
uint32_t me;
@ -316,8 +316,8 @@ struct igc_softc {
unsigned int sc_nqueues;
struct igc_queue *queues;
struct tx_ring *tx_rings;
struct rx_ring *rx_rings;
struct igc_txring *tx_rings;
struct igc_rxring *rx_rings;
/* Multicast array memory */
uint8_t *mta;

108
sys/dev/pci/if_ix.c
View file

@ -1,4 +1,4 @@
/* $OpenBSD: if_ix.c,v 1.214 2024/05/13 01:15:51 jsg Exp $ */
/* $OpenBSD: if_ix.c,v 1.215 2024/05/21 11:19:39 bluhm Exp $ */
/******************************************************************************
@ -131,39 +131,39 @@ void ixgbe_config_delay_values(struct ix_softc *);
void ixgbe_add_media_types(struct ix_softc *);
void ixgbe_config_link(struct ix_softc *);
int ixgbe_allocate_transmit_buffers(struct tx_ring *);
int ixgbe_allocate_transmit_buffers(struct ix_txring *);
int ixgbe_setup_transmit_structures(struct ix_softc *);
int ixgbe_setup_transmit_ring(struct tx_ring *);
int ixgbe_setup_transmit_ring(struct ix_txring *);
void ixgbe_initialize_transmit_units(struct ix_softc *);
void ixgbe_free_transmit_structures(struct ix_softc *);
void ixgbe_free_transmit_buffers(struct tx_ring *);
void ixgbe_free_transmit_buffers(struct ix_txring *);
int ixgbe_allocate_receive_buffers(struct rx_ring *);
int ixgbe_allocate_receive_buffers(struct ix_rxring *);
int ixgbe_setup_receive_structures(struct ix_softc *);
int ixgbe_setup_receive_ring(struct rx_ring *);
int ixgbe_setup_receive_ring(struct ix_rxring *);
void ixgbe_initialize_receive_units(struct ix_softc *);
void ixgbe_free_receive_structures(struct ix_softc *);
void ixgbe_free_receive_buffers(struct rx_ring *);
void ixgbe_free_receive_buffers(struct ix_rxring *);
void ixgbe_initialize_rss_mapping(struct ix_softc *);
int ixgbe_rxfill(struct rx_ring *);
int ixgbe_rxfill(struct ix_rxring *);
void ixgbe_rxrefill(void *);
int ixgbe_intr(struct ix_softc *sc);
void ixgbe_enable_intr(struct ix_softc *);
void ixgbe_disable_intr(struct ix_softc *);
int ixgbe_txeof(struct tx_ring *);
int ixgbe_rxeof(struct rx_ring *);
int ixgbe_txeof(struct ix_txring *);
int ixgbe_rxeof(struct ix_rxring *);
void ixgbe_rx_offload(uint32_t, uint16_t, struct mbuf *);
void ixgbe_iff(struct ix_softc *);
void ixgbe_map_queue_statistics(struct ix_softc *);
void ixgbe_update_link_status(struct ix_softc *);
int ixgbe_get_buf(struct rx_ring *, int);
int ixgbe_encap(struct tx_ring *, struct mbuf *);
int ixgbe_get_buf(struct ix_rxring *, int);
int ixgbe_encap(struct ix_txring *, struct mbuf *);
int ixgbe_dma_malloc(struct ix_softc *, bus_size_t,
struct ixgbe_dma_alloc *, int);
void ixgbe_dma_free(struct ix_softc *, struct ixgbe_dma_alloc *);
static int
ixgbe_tx_ctx_setup(struct tx_ring *, struct mbuf *, uint32_t *,
ixgbe_tx_ctx_setup(struct ix_txring *, struct mbuf *, uint32_t *,
uint32_t *);
void ixgbe_set_ivar(struct ix_softc *, uint8_t, uint8_t, int8_t);
void ixgbe_configure_ivars(struct ix_softc *);
@ -188,8 +188,8 @@ int ixgbe_queue_intr(void *);
#if NKSTAT > 0
static void ix_kstats(struct ix_softc *);
static void ix_rxq_kstats(struct ix_softc *, struct rx_ring *);
static void ix_txq_kstats(struct ix_softc *, struct tx_ring *);
static void ix_rxq_kstats(struct ix_softc *, struct ix_rxring *);
static void ix_txq_kstats(struct ix_softc *, struct ix_txring *);
static void ix_kstats_tick(void *);
#endif
@ -451,7 +451,7 @@ ixgbe_start(struct ifqueue *ifq)
{
struct ifnet *ifp = ifq->ifq_if;
struct ix_softc *sc = ifp->if_softc;
struct tx_ring *txr = ifq->ifq_softc;
struct ix_txring *txr = ifq->ifq_softc;
struct mbuf *m_head;
unsigned int head, free, used;
int post = 0;
@ -639,7 +639,7 @@ int
ixgbe_rxrinfo(struct ix_softc *sc, struct if_rxrinfo *ifri)
{
struct if_rxring_info *ifr, ifr1;
struct rx_ring *rxr;
struct ix_rxring *rxr;
int error, i;
u_int n = 0;
@ -673,7 +673,7 @@ void
ixgbe_watchdog(struct ifnet * ifp)
{
struct ix_softc *sc = (struct ix_softc *)ifp->if_softc;
struct tx_ring *txr = sc->tx_rings;
struct ix_txring *txr = sc->tx_rings;
struct ixgbe_hw *hw = &sc->hw;
int tx_hang = FALSE;
int i;
@ -735,7 +735,7 @@ ixgbe_init(void *arg)
{
struct ix_softc *sc = (struct ix_softc *)arg;
struct ifnet *ifp = &sc->arpcom.ac_if;
struct rx_ring *rxr = sc->rx_rings;
struct ix_rxring *rxr = sc->rx_rings;
uint32_t k, txdctl, rxdctl, rxctrl, mhadd, itr;
int i, s, err;
@ -1076,8 +1076,8 @@ ixgbe_queue_intr(void *vque)
struct ix_queue *que = vque;
struct ix_softc *sc = que->sc;
struct ifnet *ifp = &sc->arpcom.ac_if;
struct rx_ring *rxr = que->rxr;
struct tx_ring *txr = que->txr;
struct ix_rxring *rxr = que->rxr;
struct ix_txring *txr = que->txr;
if (ISSET(ifp->if_flags, IFF_RUNNING)) {
ixgbe_rxeof(rxr);
@ -1101,8 +1101,8 @@ ixgbe_legacy_intr(void *arg)
{
struct ix_softc *sc = (struct ix_softc *)arg;
struct ifnet *ifp = &sc->arpcom.ac_if;
struct rx_ring *rxr = sc->rx_rings;
struct tx_ring *txr = sc->tx_rings;
struct ix_rxring *rxr = sc->rx_rings;
struct ix_txring *txr = sc->tx_rings;
int rv;
rv = ixgbe_intr(sc);
@ -1423,7 +1423,7 @@ ixgbe_media_change(struct ifnet *ifp)
**********************************************************************/
int
ixgbe_encap(struct tx_ring *txr, struct mbuf *m_head)
ixgbe_encap(struct ix_txring *txr, struct mbuf *m_head)
{
struct ix_softc *sc = txr->sc;
uint32_t olinfo_status = 0, cmd_type_len;
@ -1953,8 +1953,8 @@ ixgbe_setup_interface(struct ix_softc *sc)
for (i = 0; i < sc->num_queues; i++) {
struct ifqueue *ifq = ifp->if_ifqs[i];
struct ifiqueue *ifiq = ifp->if_iqs[i];
struct tx_ring *txr = &sc->tx_rings[i];
struct rx_ring *rxr = &sc->rx_rings[i];
struct ix_txring *txr = &sc->tx_rings[i];
struct ix_rxring *rxr = &sc->rx_rings[i];
ifq->ifq_softc = txr;
txr->ifq = ifq;
@ -2142,8 +2142,8 @@ ixgbe_allocate_queues(struct ix_softc *sc)
{
struct ifnet *ifp = &sc->arpcom.ac_if;
struct ix_queue *que;
struct tx_ring *txr;
struct rx_ring *rxr;
struct ix_txring *txr;
struct ix_rxring *rxr;
int rsize, tsize;
int txconf = 0, rxconf = 0, i;
@ -2156,14 +2156,14 @@ ixgbe_allocate_queues(struct ix_softc *sc)
/* Then allocate the TX ring struct memory */
if (!(sc->tx_rings = mallocarray(sc->num_queues,
sizeof(struct tx_ring), M_DEVBUF, M_NOWAIT | M_ZERO))) {
sizeof(struct ix_txring), M_DEVBUF, M_NOWAIT | M_ZERO))) {
printf("%s: Unable to allocate TX ring memory\n", ifp->if_xname);
goto fail;
}
/* Next allocate the RX */
if (!(sc->rx_rings = mallocarray(sc->num_queues,
sizeof(struct rx_ring), M_DEVBUF, M_NOWAIT | M_ZERO))) {
sizeof(struct ix_rxring), M_DEVBUF, M_NOWAIT | M_ZERO))) {
printf("%s: Unable to allocate RX ring memory\n", ifp->if_xname);
goto rx_fail;
}
@ -2235,10 +2235,10 @@ err_rx_desc:
err_tx_desc:
for (txr = sc->tx_rings; txconf > 0; txr++, txconf--)
ixgbe_dma_free(sc, &txr->txdma);
free(sc->rx_rings, M_DEVBUF, sc->num_queues * sizeof(struct rx_ring));
free(sc->rx_rings, M_DEVBUF, sc->num_queues * sizeof(struct ix_rxring));
sc->rx_rings = NULL;
rx_fail:
free(sc->tx_rings, M_DEVBUF, sc->num_queues * sizeof(struct tx_ring));
free(sc->tx_rings, M_DEVBUF, sc->num_queues * sizeof(struct ix_txring));
sc->tx_rings = NULL;
fail:
return (ENOMEM);
@ -2252,7 +2252,7 @@ fail:
*
**********************************************************************/
int
ixgbe_allocate_transmit_buffers(struct tx_ring *txr)
ixgbe_allocate_transmit_buffers(struct ix_txring *txr)
{
struct ix_softc *sc = txr->sc;
struct ifnet *ifp = &sc->arpcom.ac_if;
@ -2293,7 +2293,7 @@ fail:
*
**********************************************************************/
int
ixgbe_setup_transmit_ring(struct tx_ring *txr)
ixgbe_setup_transmit_ring(struct ix_txring *txr)
{
struct ix_softc *sc = txr->sc;
int error;
@ -2325,7 +2325,7 @@ ixgbe_setup_transmit_ring(struct tx_ring *txr)
int
ixgbe_setup_transmit_structures(struct ix_softc *sc)
{
struct tx_ring *txr = sc->tx_rings;
struct ix_txring *txr = sc->tx_rings;
int i, error;
for (i = 0; i < sc->num_queues; i++, txr++) {
@ -2348,7 +2348,7 @@ void
ixgbe_initialize_transmit_units(struct ix_softc *sc)
{
struct ifnet *ifp = &sc->arpcom.ac_if;
struct tx_ring *txr;
struct ix_txring *txr;
struct ixgbe_hw *hw = &sc->hw;
int i;
uint64_t tdba;
@ -2430,7 +2430,7 @@ ixgbe_initialize_transmit_units(struct ix_softc *sc)
void
ixgbe_free_transmit_structures(struct ix_softc *sc)
{
struct tx_ring *txr = sc->tx_rings;
struct ix_txring *txr = sc->tx_rings;
int i;
for (i = 0; i < sc->num_queues; i++, txr++)
@ -2443,7 +2443,7 @@ ixgbe_free_transmit_structures(struct ix_softc *sc)
*
**********************************************************************/
void
ixgbe_free_transmit_buffers(struct tx_ring *txr)
ixgbe_free_transmit_buffers(struct ix_txring *txr)
{
struct ix_softc *sc = txr->sc;
struct ixgbe_tx_buf *tx_buffer;
@ -2561,7 +2561,7 @@ ixgbe_tx_offload(struct mbuf *mp, uint32_t *vlan_macip_lens,
}
static int
ixgbe_tx_ctx_setup(struct tx_ring *txr, struct mbuf *mp,
ixgbe_tx_ctx_setup(struct ix_txring *txr, struct mbuf *mp,
uint32_t *cmd_type_len, uint32_t *olinfo_status)
{
struct ixgbe_adv_tx_context_desc *TXD;
@ -2614,7 +2614,7 @@ ixgbe_tx_ctx_setup(struct tx_ring *txr, struct mbuf *mp,
*
**********************************************************************/
int
ixgbe_txeof(struct tx_ring *txr)
ixgbe_txeof(struct ix_txring *txr)
{
struct ix_softc *sc = txr->sc;
struct ifqueue *ifq = txr->ifq;
@ -2684,7 +2684,7 @@ ixgbe_txeof(struct tx_ring *txr)
*
**********************************************************************/
int
ixgbe_get_buf(struct rx_ring *rxr, int i)
ixgbe_get_buf(struct ix_rxring *rxr, int i)
{
struct ix_softc *sc = rxr->sc;
struct ixgbe_rx_buf *rxbuf;
@ -2733,7 +2733,7 @@ ixgbe_get_buf(struct rx_ring *rxr, int i)
*
**********************************************************************/
int
ixgbe_allocate_receive_buffers(struct rx_ring *rxr)
ixgbe_allocate_receive_buffers(struct ix_rxring *rxr)
{
struct ix_softc *sc = rxr->sc;
struct ifnet *ifp = &sc->arpcom.ac_if;
@ -2774,7 +2774,7 @@ fail:
*
**********************************************************************/
int
ixgbe_setup_receive_ring(struct rx_ring *rxr)
ixgbe_setup_receive_ring(struct ix_rxring *rxr)
{
struct ix_softc *sc = rxr->sc;
struct ifnet *ifp = &sc->arpcom.ac_if;
@ -2806,7 +2806,7 @@ ixgbe_setup_receive_ring(struct rx_ring *rxr)
}
int
ixgbe_rxfill(struct rx_ring *rxr)
ixgbe_rxfill(struct ix_rxring *rxr)
{
struct ix_softc *sc = rxr->sc;
int post = 0;
@ -2842,7 +2842,7 @@ ixgbe_rxfill(struct rx_ring *rxr)
void
ixgbe_rxrefill(void *xrxr)
{
struct rx_ring *rxr = xrxr;
struct ix_rxring *rxr = xrxr;
struct ix_softc *sc = rxr->sc;
if (ixgbe_rxfill(rxr)) {
@ -2862,7 +2862,7 @@ ixgbe_rxrefill(void *xrxr)
int
ixgbe_setup_receive_structures(struct ix_softc *sc)
{
struct rx_ring *rxr = sc->rx_rings;
struct ix_rxring *rxr = sc->rx_rings;
int i;
for (i = 0; i < sc->num_queues; i++, rxr++)
@ -2886,7 +2886,7 @@ void
ixgbe_initialize_receive_units(struct ix_softc *sc)
{
struct ifnet *ifp = &sc->arpcom.ac_if;
struct rx_ring *rxr = sc->rx_rings;
struct ix_rxring *rxr = sc->rx_rings;
struct ixgbe_hw *hw = &sc->hw;
uint32_t bufsz, fctrl, srrctl, rxcsum, rdrxctl;
uint32_t hlreg;
@ -3061,7 +3061,7 @@ ixgbe_initialize_rss_mapping(struct ix_softc *sc)
void
ixgbe_free_receive_structures(struct ix_softc *sc)
{
struct rx_ring *rxr;
struct ix_rxring *rxr;
int i;
for (i = 0, rxr = sc->rx_rings; i < sc->num_queues; i++, rxr++)
@ -3077,7 +3077,7 @@ ixgbe_free_receive_structures(struct ix_softc *sc)
*
**********************************************************************/
void
ixgbe_free_receive_buffers(struct rx_ring *rxr)
ixgbe_free_receive_buffers(struct ix_rxring *rxr)
{
struct ix_softc *sc;
struct ixgbe_rx_buf *rxbuf;
@ -3116,7 +3116,7 @@ ixgbe_free_receive_buffers(struct rx_ring *rxr)
*
*********************************************************************/
int
ixgbe_rxeof(struct rx_ring *rxr)
ixgbe_rxeof(struct ix_rxring *rxr)
{
struct ix_softc *sc = rxr->sc;
struct ifnet *ifp = &sc->arpcom.ac_if;
@ -3850,7 +3850,7 @@ ix_kstats(struct ix_softc *sc)
}
static void
ix_rxq_kstats(struct ix_softc *sc, struct rx_ring *rxr)
ix_rxq_kstats(struct ix_softc *sc, struct ix_rxring *rxr)
{
struct ix_rxq_kstats *stats;
struct kstat *ks;
@ -3874,7 +3874,7 @@ ix_rxq_kstats(struct ix_softc *sc, struct rx_ring *rxr)
}
static void
ix_txq_kstats(struct ix_softc *sc, struct tx_ring *txr)
ix_txq_kstats(struct ix_softc *sc, struct ix_txring *txr)
{
struct ix_txq_kstats *stats;
struct kstat *ks;
@ -3980,7 +3980,7 @@ int
ix_rxq_kstats_read(struct kstat *ks)
{
struct ix_rxq_kstats *stats = ks->ks_data;
struct rx_ring *rxr = ks->ks_softc;
struct ix_rxring *rxr = ks->ks_softc;
struct ix_softc *sc = rxr->sc;
struct ixgbe_hw *hw = &sc->hw;
uint32_t i = rxr->me;
@ -4007,7 +4007,7 @@ int
ix_txq_kstats_read(struct kstat *ks)
{
struct ix_txq_kstats *stats = ks->ks_data;
struct tx_ring *txr = ks->ks_softc;
struct ix_txring *txr = ks->ks_softc;
struct ix_softc *sc = txr->sc;
struct ixgbe_hw *hw = &sc->hw;
uint32_t i = txr->me;

14
sys/dev/pci/if_ix.h
View file

@ -1,4 +1,4 @@
/* $OpenBSD: if_ix.h,v 1.46 2023/08/04 10:58:27 jan Exp $ */
/* $OpenBSD: if_ix.h,v 1.47 2024/05/21 11:19:39 bluhm Exp $ */
/******************************************************************************
@ -158,14 +158,14 @@ struct ix_queue {
char name[8];
pci_intr_handle_t ih;
void *tag;
struct tx_ring *txr;
struct rx_ring *rxr;
struct ix_txring *txr;
struct ix_rxring *rxr;
};
/*
* The transmit ring, one per tx queue
*/
struct tx_ring {
struct ix_txring {
struct ix_softc *sc;
struct ifqueue *ifq;
uint32_t me;
@ -190,7 +190,7 @@ struct tx_ring {
/*
* The Receive ring, one per rx queue
*/
struct rx_ring {
struct ix_rxring {
struct ix_softc *sc;
struct ifiqueue *ifiq;
uint32_t me;
@ -262,14 +262,14 @@ struct ix_softc {
* Transmit rings:
* Allocated at run time, an array of rings.
*/
struct tx_ring *tx_rings;
struct ix_txring *tx_rings;
int num_tx_desc;
/*
* Receive rings:
* Allocated at run time, an array of rings.
*/
struct rx_ring *rx_rings;
struct ix_rxring *rx_rings;
uint64_t que_mask;
int num_rx_desc;

4
sys/dev/pci/if_mwx.c
View file

@ -1,4 +1,4 @@
/* $OpenBSD: if_mwx.c,v 1.2 2024/02/21 12:08:05 jsg Exp $ */
/* $OpenBSD: if_mwx.c,v 1.3 2024/05/20 21:22:43 martijn Exp $ */
/*
* Copyright (c) 2022 Claudio Jeker <claudio@openbsd.org>
* Copyright (c) 2021 MediaTek Inc.
@ -1426,7 +1426,7 @@ mwx_txwi_alloc(struct mwx_softc *sc, int count)
}
}
for (i = count; i >= MT_PACKET_ID_FIRST; i--)
for (i = count - 1; i >= MT_PACKET_ID_FIRST; i--)
LIST_INSERT_HEAD(&q->mt_freelist, &q->mt_data[i], mt_entry);
return 0;

5
sys/dev/pci/if_rge.c
View file

@ -1,4 +1,4 @@
/* $OpenBSD: if_rge.c,v 1.24 2024/04/13 23:44:11 jsg Exp $ */
/* $OpenBSD: if_rge.c,v 1.25 2024/05/20 01:51:32 kevlo Exp $ */
/*
* Copyright (c) 2019, 2020, 2023 Kevin Lo <kevlo@openbsd.org>
@ -209,7 +209,8 @@ rge_attach(struct device *parent, struct device *self, void *aux)
/*
* Allocate interrupt.
*/
if (pci_intr_map_msi(pa, &ih) == 0)
if (pci_intr_map_msix(pa, 0, &ih) == 0 ||
pci_intr_map_msi(pa, &ih) == 0)
sc->rge_flags |= RGE_FLAG_MSI;
else if (pci_intr_map(pa, &ih) != 0) {
printf(": couldn't map interrupt\n");

51
sys/dev/pci/if_vmx.c
View file

@ -1,4 +1,4 @@
/* $OpenBSD: if_vmx.c,v 1.85 2024/05/13 01:15:51 jsg Exp $ */
/* $OpenBSD: if_vmx.c,v 1.86 2024/05/21 19:49:06 jan Exp $ */
/*
* Copyright (c) 2013 Tsubai Masanari
@ -203,7 +203,7 @@ void vmxnet3_rxintr(struct vmxnet3_softc *, struct vmxnet3_rxqueue *);
void vmxnet3_rxfill_tick(void *);
void vmxnet3_rxfill(struct vmxnet3_rxring *);
void vmxnet3_iff(struct vmxnet3_softc *);
void vmxnet3_rx_csum(struct vmxnet3_rxcompdesc *, struct mbuf *);
void vmxnet3_rx_offload(struct vmxnet3_rxcompdesc *, struct mbuf *);
void vmxnet3_stop(struct ifnet *);
void vmxnet3_reset(struct vmxnet3_softc *);
int vmxnet3_init(struct vmxnet3_softc *);
@ -1127,14 +1127,8 @@ vmxnet3_rxintr(struct vmxnet3_softc *sc, struct vmxnet3_rxqueue *rq)
}
m->m_pkthdr.len = m->m_len = len;
vmxnet3_rx_csum(rxcd, m);
#if NVLAN > 0
if (letoh32(rxcd->rxc_word2 & VMXNET3_RXC_VLAN)) {
m->m_flags |= M_VLANTAG;
m->m_pkthdr.ether_vtag = letoh32((rxcd->rxc_word2 >>
VMXNET3_RXC_VLANTAG_S) & VMXNET3_RXC_VLANTAG_M);
}
#endif
vmxnet3_rx_offload(rxcd, m);
if (((letoh32(rxcd->rxc_word0) >> VMXNET3_RXC_RSSTYPE_S) &
VMXNET3_RXC_RSSTYPE_M) != VMXNET3_RXC_RSSTYPE_NONE) {
m->m_pkthdr.ph_flowid = letoh32(rxcd->rxc_word1);
@ -1215,22 +1209,39 @@ vmxnet3_iff(struct vmxnet3_softc *sc)
void
vmxnet3_rx_csum(struct vmxnet3_rxcompdesc *rxcd, struct mbuf *m)
vmxnet3_rx_offload(struct vmxnet3_rxcompdesc *rxcd, struct mbuf *m)
{
if (letoh32(rxcd->rxc_word0 & VMXNET3_RXC_NOCSUM))
/*
* VLAN Offload
*/
#if NVLAN > 0
if (ISSET(rxcd->rxc_word2, VMXNET3_RXC_VLAN)) {
SET(m->m_flags, M_VLANTAG);
m->m_pkthdr.ether_vtag = letoh32((rxcd->rxc_word2 >>
VMXNET3_RXC_VLANTAG_S) & VMXNET3_RXC_VLANTAG_M);
}
#endif
/*
* Checksum Offload
*/
if (ISSET(rxcd->rxc_word0, VMXNET3_RXC_NOCSUM))
return;
if ((rxcd->rxc_word3 & (VMXNET3_RXC_IPV4 | VMXNET3_RXC_IPSUM_OK)) ==
(VMXNET3_RXC_IPV4 | VMXNET3_RXC_IPSUM_OK))
m->m_pkthdr.csum_flags |= M_IPV4_CSUM_IN_OK;
if (ISSET(rxcd->rxc_word3, VMXNET3_RXC_IPV4) &&
ISSET(rxcd->rxc_word3, VMXNET3_RXC_IPSUM_OK))
SET(m->m_pkthdr.csum_flags, M_IPV4_CSUM_IN_OK);
if (rxcd->rxc_word3 & VMXNET3_RXC_FRAGMENT)
if (ISSET(rxcd->rxc_word3, VMXNET3_RXC_FRAGMENT))
return;
if (rxcd->rxc_word3 & (VMXNET3_RXC_TCP | VMXNET3_RXC_UDP)) {
if (rxcd->rxc_word3 & VMXNET3_RXC_CSUM_OK)
m->m_pkthdr.csum_flags |=
M_TCP_CSUM_IN_OK | M_UDP_CSUM_IN_OK;
if (ISSET(rxcd->rxc_word3, VMXNET3_RXC_CSUM_OK)) {
if (ISSET(rxcd->rxc_word3, VMXNET3_RXC_TCP))
SET(m->m_pkthdr.csum_flags, M_TCP_CSUM_IN_OK);
else if (ISSET(rxcd->rxc_word3, VMXNET3_RXC_UDP))
SET(m->m_pkthdr.csum_flags, M_UDP_CSUM_IN_OK);
}
}

22
sys/dev/pci/pcidevs
View file

@ -1,4 +1,4 @@
$OpenBSD: pcidevs,v 1.2074 2024/04/20 08:54:01 jsg Exp $
$OpenBSD: pcidevs,v 1.2075 2024/05/21 07:03:55 jsg Exp $
/* $NetBSD: pcidevs,v 1.30 1997/06/24 06:20:24 thorpej Exp $ */
/*
@ -790,8 +790,8 @@ product AMD 19_1X_PCIE_1 0x14a5 19h/1xh PCIE
product AMD 19_1X_RCEC 0x14a6 19h/1xh RCEC
product AMD 19_1X_PCIE_2 0x14a7 19h/1xh PCIE
product AMD 19_1X_PCIE_3 0x14aa 19h/1xh PCIE
product AMD 19_1X_PCIE_4 0x14ac 19h/1xh PCIE
product AMD 19_1X_PCIE_5 0x14ab 19h/1xh PCIE
product AMD 19_1X_PCIE_4 0x14ab 19h/1xh PCIE
product AMD 19_1X_PCIE_5 0x14ac 19h/1xh PCIE
product AMD 19_1X_DF_1 0x14ad 19h/1xh Data Fabric
product AMD 19_1X_DF_2 0x14ae 19h/1xh Data Fabric
product AMD 19_1X_DF_3 0x14af 19h/1xh Data Fabric
@ -1177,8 +1177,8 @@ product AQUANTIA AQC107 0x07b1 AQC107
product AQUANTIA AQC108 0x08b1 AQC108
product AQUANTIA AQC109 0x09b1 AQC109
product AQUANTIA AQC111 0x11b1 AQC111
product AQUANTIA AQC112 0x12b1 AQC112
product AQUANTIA AQC116C 0x11c0 AQC116C
product AQUANTIA AQC112 0x12b1 AQC112
product AQUANTIA AQC115C 0x12c0 AQC115C
product AQUANTIA AQC113C 0x14c0 AQC113C
product AQUANTIA AQC113CA 0x34c0 AQC113CA
@ -8800,10 +8800,10 @@ product REALTEK RTL8723AE 0x8723 8723AE
product REALTEK RTL8821AE 0x8821 8821AE
product REALTEK RTL8852AE 0x8852 8852AE
product REALTEK RTL8852AE_VT 0xa85a 8852AE-VT
product REALTEK RTL8852BE 0xb852 8852BE
product REALTEK RTL8852BE_2 0xb85b 8852BE
product REALTEK RTL8723BE 0xb723 8723BE
product REALTEK RTL8822BE 0xb822 8822BE
product REALTEK RTL8852BE 0xb852 8852BE
product REALTEK RTL8852BE_2 0xb85b 8852BE
product REALTEK RTL8821CE 0xc821 8821CE
product REALTEK RTL8822CE 0xc822 8822CE
product REALTEK RTL8852CE 0xc852 8852CE
@ -9337,11 +9337,11 @@ product SYMBIOS YELLOWFIN_1 0x0701 Yellowfin
product SYMBIOS YELLOWFIN_2 0x0702 Yellowfin
product SYMBIOS 61C102 0x0901 61C102
product SYMBIOS 63C815 0x1000 63C815
product SYMBIOS 1030R 0x1030 53c1030R
product SYMBIOS MEGARAID_39XX 0x10e1 MegaRAID SAS39XX
product SYMBIOS MEGARAID_39XX_2 0x10e2 MegaRAID SAS39XX
product SYMBIOS MEGARAID_38XX 0x10e5 MegaRAID SAS38XX
product SYMBIOS MEGARAID_38XX_2 0x10e6 MegaRAID SAS38XX
product SYMBIOS 1030R 0x1030 53c1030R
product SYMBIOS MEGARAID 0x1960 MegaRAID
/* Packet Engines products */
@ -9958,16 +9958,16 @@ product VORTEX GDT_8X22RZ 0x02f6 GDT8x22RZ
product VORTEX GDT_ICP 0x0300 ICP
product VORTEX GDT_ICP2 0x0301 ICP
/* Beijing WangXun Technology products */
product WANGXUN WX1860A2 0x0101 WX1860A2
product WANGXUN WX1860AL1 0x010b WX1860AL1
/* Nanjing QinHeng Electronics products */
product WCH CH352 0x3253 CH352
product WCH2 CH351 0x2273 CH351
product WCH2 CH382_2 0x3250 CH382
product WCH2 CH382_1 0x3253 CH382
/* Beijing WangXun Technology products */
product WANGXUN WX1860A2 0x0101 WX1860A2
product WANGXUN WX1860AL1 0x010b WX1860AL1
/* Western Digital products */
product WD WD33C193A 0x0193 WD33C193A
product WD WD33C196A 0x0196 WD33C196A

22
sys/dev/pci/pcidevs.h
View file

@ -2,7 +2,7 @@
* THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT.
*
* generated from:
* OpenBSD: pcidevs,v 1.2074 2024/04/20 08:54:01 jsg Exp
* OpenBSD: pcidevs,v 1.2075 2024/05/21 07:03:55 jsg Exp
*/
/* $NetBSD: pcidevs,v 1.30 1997/06/24 06:20:24 thorpej Exp $ */
@ -795,8 +795,8 @@
#define PCI_PRODUCT_AMD_19_1X_RCEC 0x14a6 /* 19h/1xh RCEC */
#define PCI_PRODUCT_AMD_19_1X_PCIE_2 0x14a7 /* 19h/1xh PCIE */
#define PCI_PRODUCT_AMD_19_1X_PCIE_3 0x14aa /* 19h/1xh PCIE */
#define PCI_PRODUCT_AMD_19_1X_PCIE_4 0x14ac /* 19h/1xh PCIE */
#define PCI_PRODUCT_AMD_19_1X_PCIE_5 0x14ab /* 19h/1xh PCIE */
#define PCI_PRODUCT_AMD_19_1X_PCIE_4 0x14ab /* 19h/1xh PCIE */
#define PCI_PRODUCT_AMD_19_1X_PCIE_5 0x14ac /* 19h/1xh PCIE */
#define PCI_PRODUCT_AMD_19_1X_DF_1 0x14ad /* 19h/1xh Data Fabric */
#define PCI_PRODUCT_AMD_19_1X_DF_2 0x14ae /* 19h/1xh Data Fabric */
#define PCI_PRODUCT_AMD_19_1X_DF_3 0x14af /* 19h/1xh Data Fabric */
@ -1182,8 +1182,8 @@
#define PCI_PRODUCT_AQUANTIA_AQC108 0x08b1 /* AQC108 */
#define PCI_PRODUCT_AQUANTIA_AQC109 0x09b1 /* AQC109 */
#define PCI_PRODUCT_AQUANTIA_AQC111 0x11b1 /* AQC111 */
#define PCI_PRODUCT_AQUANTIA_AQC112 0x12b1 /* AQC112 */
#define PCI_PRODUCT_AQUANTIA_AQC116C 0x11c0 /* AQC116C */
#define PCI_PRODUCT_AQUANTIA_AQC112 0x12b1 /* AQC112 */
#define PCI_PRODUCT_AQUANTIA_AQC115C 0x12c0 /* AQC115C */
#define PCI_PRODUCT_AQUANTIA_AQC113C 0x14c0 /* AQC113C */
#define PCI_PRODUCT_AQUANTIA_AQC113CA 0x34c0 /* AQC113CA */
@ -8805,10 +8805,10 @@
#define PCI_PRODUCT_REALTEK_RTL8821AE 0x8821 /* 8821AE */
#define PCI_PRODUCT_REALTEK_RTL8852AE 0x8852 /* 8852AE */
#define PCI_PRODUCT_REALTEK_RTL8852AE_VT 0xa85a /* 8852AE-VT */
#define PCI_PRODUCT_REALTEK_RTL8852BE 0xb852 /* 8852BE */
#define PCI_PRODUCT_REALTEK_RTL8852BE_2 0xb85b /* 8852BE */
#define PCI_PRODUCT_REALTEK_RTL8723BE 0xb723 /* 8723BE */
#define PCI_PRODUCT_REALTEK_RTL8822BE 0xb822 /* 8822BE */
#define PCI_PRODUCT_REALTEK_RTL8852BE 0xb852 /* 8852BE */
#define PCI_PRODUCT_REALTEK_RTL8852BE_2 0xb85b /* 8852BE */
#define PCI_PRODUCT_REALTEK_RTL8821CE 0xc821 /* 8821CE */
#define PCI_PRODUCT_REALTEK_RTL8822CE 0xc822 /* 8822CE */
#define PCI_PRODUCT_REALTEK_RTL8852CE 0xc852 /* 8852CE */
@ -9342,11 +9342,11 @@
#define PCI_PRODUCT_SYMBIOS_YELLOWFIN_2 0x0702 /* Yellowfin */
#define PCI_PRODUCT_SYMBIOS_61C102 0x0901 /* 61C102 */
#define PCI_PRODUCT_SYMBIOS_63C815 0x1000 /* 63C815 */
#define PCI_PRODUCT_SYMBIOS_1030R 0x1030 /* 53c1030R */
#define PCI_PRODUCT_SYMBIOS_MEGARAID_39XX 0x10e1 /* MegaRAID SAS39XX */
#define PCI_PRODUCT_SYMBIOS_MEGARAID_39XX_2 0x10e2 /* MegaRAID SAS39XX */
#define PCI_PRODUCT_SYMBIOS_MEGARAID_38XX 0x10e5 /* MegaRAID SAS38XX */
#define PCI_PRODUCT_SYMBIOS_MEGARAID_38XX_2 0x10e6 /* MegaRAID SAS38XX */
#define PCI_PRODUCT_SYMBIOS_1030R 0x1030 /* 53c1030R */
#define PCI_PRODUCT_SYMBIOS_MEGARAID 0x1960 /* MegaRAID */
/* Packet Engines products */
@ -9963,16 +9963,16 @@
#define PCI_PRODUCT_VORTEX_GDT_ICP 0x0300 /* ICP */
#define PCI_PRODUCT_VORTEX_GDT_ICP2 0x0301 /* ICP */
/* Beijing WangXun Technology products */
#define PCI_PRODUCT_WANGXUN_WX1860A2 0x0101 /* WX1860A2 */
#define PCI_PRODUCT_WANGXUN_WX1860AL1 0x010b /* WX1860AL1 */
/* Nanjing QinHeng Electronics products */
#define PCI_PRODUCT_WCH_CH352 0x3253 /* CH352 */
#define PCI_PRODUCT_WCH2_CH351 0x2273 /* CH351 */
#define PCI_PRODUCT_WCH2_CH382_2 0x3250 /* CH382 */
#define PCI_PRODUCT_WCH2_CH382_1 0x3253 /* CH382 */
/* Beijing WangXun Technology products */
#define PCI_PRODUCT_WANGXUN_WX1860A2 0x0101 /* WX1860A2 */
#define PCI_PRODUCT_WANGXUN_WX1860AL1 0x010b /* WX1860AL1 */
/* Western Digital products */
#define PCI_PRODUCT_WD_WD33C193A 0x0193 /* WD33C193A */
#define PCI_PRODUCT_WD_WD33C196A 0x0196 /* WD33C196A */

50
sys/dev/pci/pcidevs_data.h
View file

@ -2,7 +2,7 @@
* THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT.
*
* generated from:
* OpenBSD: pcidevs,v 1.2074 2024/04/20 08:54:01 jsg Exp
* OpenBSD: pcidevs,v 1.2075 2024/05/21 07:03:55 jsg Exp
*/
/* $NetBSD: pcidevs,v 1.30 1997/06/24 06:20:24 thorpej Exp $ */
@ -2911,14 +2911,14 @@ static const struct pci_known_product pci_known_products[] = {
PCI_VENDOR_AQUANTIA, PCI_PRODUCT_AQUANTIA_AQC111,
"AQC111",
},
{
PCI_VENDOR_AQUANTIA, PCI_PRODUCT_AQUANTIA_AQC112,
"AQC112",
},
{
PCI_VENDOR_AQUANTIA, PCI_PRODUCT_AQUANTIA_AQC116C,
"AQC116C",
},
{
PCI_VENDOR_AQUANTIA, PCI_PRODUCT_AQUANTIA_AQC112,
"AQC112",
},
{
PCI_VENDOR_AQUANTIA, PCI_PRODUCT_AQUANTIA_AQC115C,
"AQC115C",
@ -31767,14 +31767,6 @@ static const struct pci_known_product pci_known_products[] = {
PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RTL8852AE_VT,
"8852AE-VT",
},
{
PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RTL8852BE,
"8852BE",
},
{
PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RTL8852BE_2,
"8852BE",
},
{
PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RTL8723BE,
"8723BE",
@ -31783,6 +31775,14 @@ static const struct pci_known_product pci_known_products[] = {
PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RTL8822BE,
"8822BE",
},
{
PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RTL8852BE,
"8852BE",
},
{
PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RTL8852BE_2,
"8852BE",
},
{
PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RTL8821CE,
"8821CE",
@ -33619,6 +33619,10 @@ static const struct pci_known_product pci_known_products[] = {
PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_63C815,
"63C815",
},
{
PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_1030R,
"53c1030R",
},
{
PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_MEGARAID_39XX,
"MegaRAID SAS39XX",
@ -33635,10 +33639,6 @@ static const struct pci_known_product pci_known_products[] = {
PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_MEGARAID_38XX_2,
"MegaRAID SAS38XX",
},
{
PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_1030R,
"53c1030R",
},
{
PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_MEGARAID,
"MegaRAID",
@ -35827,6 +35827,14 @@ static const struct pci_known_product pci_known_products[] = {
PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_ICP2,
"ICP",
},
{
PCI_VENDOR_WANGXUN, PCI_PRODUCT_WANGXUN_WX1860A2,
"WX1860A2",
},
{
PCI_VENDOR_WANGXUN, PCI_PRODUCT_WANGXUN_WX1860AL1,
"WX1860AL1",
},
{
PCI_VENDOR_WCH, PCI_PRODUCT_WCH_CH352,
"CH352",
@ -35843,14 +35851,6 @@ static const struct pci_known_product pci_known_products[] = {
PCI_VENDOR_WCH2, PCI_PRODUCT_WCH2_CH382_1,
"CH382",
},
{
PCI_VENDOR_WANGXUN, PCI_PRODUCT_WANGXUN_WX1860A2,
"WX1860A2",
},
{
PCI_VENDOR_WANGXUN, PCI_PRODUCT_WANGXUN_WX1860AL1,
"WX1860AL1",
},
{
PCI_VENDOR_WD, PCI_PRODUCT_WD_WD33C193A,
"WD33C193A",

4
sys/dev/usb/usbdevs
View file

@ -1,4 +1,4 @@
$OpenBSD: usbdevs,v 1.763 2024/05/15 01:41:19 kevlo Exp $
$OpenBSD: usbdevs,v 1.764 2024/05/21 07:13:29 jsg Exp $
/* $NetBSD: usbdevs,v 1.322 2003/05/10 17:47:14 hamajima Exp $ */
/*
@ -1004,8 +1004,8 @@ product APPLE WELLSPRING9_JIS 0x0274 Keyboard/Trackpad
product APPLE WELLSPRING8_ANSI 0x0290 Keyboard/Trackpad
product APPLE WELLSPRING8_ISO 0x0291 Keyboard/Trackpad
product APPLE WELLSPRING8_JIS 0x0292 Keyboard/Trackpad
product APPLE WELLSPRINGM1_J293 0x0341 Keyboard/Trackpad
product APPLE OPTMOUSE 0x0302 Optical mouse
product APPLE WELLSPRINGM1_J293 0x0341 Keyboard/Trackpad
product APPLE BLUETOOTH_HCI 0x1000 HID-proxy
product APPLE SPEAKERS 0x1101 Speakers
product APPLE IPHONE 0x1290 iPhone

6
sys/dev/usb/usbdevs.h
View file

@ -1,10 +1,10 @@
/* $OpenBSD: usbdevs.h,v 1.775 2024/05/15 01:41:41 kevlo Exp $ */
/* $OpenBSD: usbdevs.h,v 1.776 2024/05/21 07:14:20 jsg Exp $ */
/*
* THIS FILE IS AUTOMATICALLY GENERATED. DO NOT EDIT.
*
* generated from:
* OpenBSD: usbdevs,v 1.763 2024/05/15 01:41:19 kevlo Exp
* OpenBSD: usbdevs,v 1.764 2024/05/21 07:13:29 jsg Exp
*/
/* $NetBSD: usbdevs,v 1.322 2003/05/10 17:47:14 hamajima Exp $ */
@ -1011,8 +1011,8 @@
#define USB_PRODUCT_APPLE_WELLSPRING8_ANSI 0x0290 /* Keyboard/Trackpad */
#define USB_PRODUCT_APPLE_WELLSPRING8_ISO 0x0291 /* Keyboard/Trackpad */
#define USB_PRODUCT_APPLE_WELLSPRING8_JIS 0x0292 /* Keyboard/Trackpad */
#define USB_PRODUCT_APPLE_WELLSPRINGM1_J293 0x0341 /* Keyboard/Trackpad */
#define USB_PRODUCT_APPLE_OPTMOUSE 0x0302 /* Optical mouse */
#define USB_PRODUCT_APPLE_WELLSPRINGM1_J293 0x0341 /* Keyboard/Trackpad */
#define USB_PRODUCT_APPLE_BLUETOOTH_HCI 0x1000 /* HID-proxy */
#define USB_PRODUCT_APPLE_SPEAKERS 0x1101 /* Speakers */
#define USB_PRODUCT_APPLE_IPHONE 0x1290 /* iPhone */

12
sys/dev/usb/usbdevs_data.h
View file

@ -1,10 +1,10 @@
/* $OpenBSD: usbdevs_data.h,v 1.769 2024/05/15 01:41:41 kevlo Exp $ */
/* $OpenBSD: usbdevs_data.h,v 1.770 2024/05/21 07:14:20 jsg Exp $ */
/*
* THIS FILE IS AUTOMATICALLY GENERATED. DO NOT EDIT.
*
* generated from:
* OpenBSD: usbdevs,v 1.763 2024/05/15 01:41:19 kevlo Exp
* OpenBSD: usbdevs,v 1.764 2024/05/21 07:13:29 jsg Exp
*/
/* $NetBSD: usbdevs,v 1.322 2003/05/10 17:47:14 hamajima Exp $ */
@ -925,14 +925,14 @@ const struct usb_known_product usb_known_products[] = {
USB_VENDOR_APPLE, USB_PRODUCT_APPLE_WELLSPRING8_JIS,
"Keyboard/Trackpad",
},
{
USB_VENDOR_APPLE, USB_PRODUCT_APPLE_WELLSPRINGM1_J293,
"Keyboard/Trackpad",
},
{
USB_VENDOR_APPLE, USB_PRODUCT_APPLE_OPTMOUSE,
"Optical mouse",
},
{
USB_VENDOR_APPLE, USB_PRODUCT_APPLE_WELLSPRINGM1_J293,
"Keyboard/Trackpad",
},
{
USB_VENDOR_APPLE, USB_PRODUCT_APPLE_BLUETOOTH_HCI,
"HID-proxy",

33
sys/kern/kern_exit.c
View file

@ -1,4 +1,4 @@
/* $OpenBSD: kern_exit.c,v 1.220 2024/01/19 01:43:26 bluhm Exp $ */
/* $OpenBSD: kern_exit.c,v 1.221 2024/05/20 10:32:20 claudio Exp $ */
/* $NetBSD: kern_exit.c,v 1.39 1996/04/22 01:38:25 christos Exp $ */
/*
@ -132,8 +132,6 @@ exit1(struct proc *p, int xexit, int xsig, int flags)
/* nope, multi-threaded */
if (flags == EXIT_NORMAL)
single_thread_set(p, SINGLE_EXIT);
else if (flags == EXIT_THREAD)
single_thread_check(p, 0);
}
if (flags == EXIT_NORMAL && !(pr->ps_flags & PS_EXITING)) {
@ -157,15 +155,27 @@ exit1(struct proc *p, int xexit, int xsig, int flags)
}
/* unlink ourselves from the active threads */
SCHED_LOCK(s);
mtx_enter(&pr->ps_mtx);
TAILQ_REMOVE(&pr->ps_threads, p, p_thr_link);
SCHED_UNLOCK(s);
pr->ps_threadcnt--;
pr->ps_exitcnt++;
/*
* if somebody else wants to take us to single threaded mode,
* count ourselves out.
*/
if (pr->ps_single) {
if (--pr->ps_singlecnt == 0)
wakeup(&pr->ps_singlecnt);
}
if ((p->p_flag & P_THREAD) == 0) {
/* main thread gotta wait because it has the pid, et al */
while (pr->ps_threadcnt > 1)
tsleep_nsec(&pr->ps_threads, PWAIT, "thrdeath", INFSLP);
while (pr->ps_threadcnt + pr->ps_exitcnt > 1)
msleep_nsec(&pr->ps_threads, &pr->ps_mtx, PWAIT,
"thrdeath", INFSLP);
}
mtx_leave(&pr->ps_mtx);
rup = pr->ps_ru;
if (rup == NULL) {
@ -352,9 +362,11 @@ exit1(struct proc *p, int xexit, int xsig, int flags)
/* just a thread? detach it from its process */
if (p->p_flag & P_THREAD) {
/* scheduler_wait_hook(pr->ps_mainproc, p); XXX */
if (--pr->ps_threadcnt == 1)
mtx_enter(&pr->ps_mtx);
pr->ps_exitcnt--;
if (pr->ps_threadcnt + pr->ps_exitcnt == 1)
wakeup(&pr->ps_threads);
KASSERT(pr->ps_threadcnt > 0);
mtx_leave(&pr->ps_mtx);
}
/*
@ -829,7 +841,8 @@ process_zap(struct process *pr)
if (otvp)
vrele(otvp);
KASSERT(pr->ps_threadcnt == 1);
KASSERT(pr->ps_threadcnt == 0);
KASSERT(pr->ps_exitcnt == 1);
if (pr->ps_ptstat != NULL)
free(pr->ps_ptstat, M_SUBPROC, sizeof(*pr->ps_ptstat));
pool_put(&rusage_pool, pr->ps_ru);

12
sys/kern/kern_fork.c
View file

@ -1,4 +1,4 @@
/* $OpenBSD: kern_fork.c,v 1.257 2024/01/24 19:23:38 cheloha Exp $ */
/* $OpenBSD: kern_fork.c,v 1.258 2024/05/20 10:32:20 claudio Exp $ */
/* $NetBSD: kern_fork.c,v 1.29 1996/02/09 18:59:34 christos Exp $ */
/*
@ -535,7 +535,7 @@ thread_fork(struct proc *curp, void *stack, void *tcb, pid_t *tidptr,
struct proc *p;
pid_t tid;
vaddr_t uaddr;
int s, error;
int error;
if (stack == NULL)
return EINVAL;
@ -559,7 +559,6 @@ thread_fork(struct proc *curp, void *stack, void *tcb, pid_t *tidptr,
/* other links */
p->p_p = pr;
pr->ps_threadcnt++;
/* local copies */
p->p_fd = pr->ps_fd;
@ -578,18 +577,19 @@ thread_fork(struct proc *curp, void *stack, void *tcb, pid_t *tidptr,
LIST_INSERT_HEAD(&allproc, p, p_list);
LIST_INSERT_HEAD(TIDHASH(p->p_tid), p, p_hash);
SCHED_LOCK(s);
mtx_enter(&pr->ps_mtx);
TAILQ_INSERT_TAIL(&pr->ps_threads, p, p_thr_link);
pr->ps_threadcnt++;
/*
* if somebody else wants to take us to single threaded mode,
* count ourselves in.
*/
if (pr->ps_single) {
atomic_inc_int(&pr->ps_singlecount);
pr->ps_singlecnt++;
atomic_setbits_int(&p->p_flag, P_SUSPSINGLE);
}
SCHED_UNLOCK(s);
mtx_leave(&pr->ps_mtx);
/*
* Return tid to parent thread and copy it out to userspace

6
sys/kern/kern_proc.c
View file

@ -1,4 +1,4 @@
/* $OpenBSD: kern_proc.c,v 1.97 2024/01/19 01:43:27 bluhm Exp $ */
/* $OpenBSD: kern_proc.c,v 1.98 2024/05/20 10:32:20 claudio Exp $ */
/* $NetBSD: kern_proc.c,v 1.14 1996/02/09 18:59:41 christos Exp $ */
/*
@ -495,9 +495,9 @@ proc_printit(struct proc *p, const char *modif,
p->p_p->ps_flags, PS_BITS, p->p_flag, P_BITS);
(*pr)(" runpri=%u, usrpri=%u, slppri=%u, nice=%d\n",
p->p_runpri, p->p_usrpri, p->p_slppri, p->p_p->ps_nice);
(*pr)(" wchan=%p, wmesg=%s, ps_single=%p\n",
(*pr)(" wchan=%p, wmesg=%s, ps_single=%p scnt=%d ecnt=%d\n",
p->p_wchan, (p->p_wchan && p->p_wmesg) ? p->p_wmesg : "",
p->p_p->ps_single);
p->p_p->ps_single, p->p_p->ps_singlecnt, p->p_p->ps_exitcnt);
(*pr)(" forw=%p, list=%p,%p\n",
TAILQ_NEXT(p, p_runq), p->p_list.le_next, p->p_list.le_prev);
(*pr)(" process=%p user=%p, vmspace=%p\n",

8
sys/kern/kern_resource.c
View file

@ -1,4 +1,4 @@
/* $OpenBSD: kern_resource.c,v 1.81 2024/04/17 09:41:44 claudio Exp $ */
/* $OpenBSD: kern_resource.c,v 1.82 2024/05/20 10:32:20 claudio Exp $ */
/* $NetBSD: kern_resource.c,v 1.38 1996/10/23 07:19:38 matthias Exp $ */
/*-
@ -212,11 +212,13 @@ donice(struct proc *curp, struct process *chgpr, int n)
if (n < chgpr->ps_nice && suser(curp))
return (EACCES);
chgpr->ps_nice = n;
SCHED_LOCK(s);
mtx_enter(&chgpr->ps_mtx);
TAILQ_FOREACH(p, &chgpr->ps_threads, p_thr_link) {
SCHED_LOCK(s);
setpriority(p, p->p_estcpu, n);
SCHED_UNLOCK(s);
}
SCHED_UNLOCK(s);
mtx_leave(&chgpr->ps_mtx);
return (0);
}

86
sys/kern/kern_sig.c
View file

@ -1,4 +1,4 @@
/* $OpenBSD: kern_sig.c,v 1.327 2024/05/08 13:05:33 claudio Exp $ */
/* $OpenBSD: kern_sig.c,v 1.328 2024/05/20 10:32:20 claudio Exp $ */
/* $NetBSD: kern_sig.c,v 1.54 1996/04/22 01:38:32 christos Exp $ */
/*
@ -2060,11 +2060,12 @@ userret(struct proc *p)
}
int
single_thread_check_locked(struct proc *p, int deep, int s)
single_thread_check_locked(struct proc *p, int deep)
{
struct process *pr = p->p_p;
int s;
SCHED_ASSERT_LOCKED();
MUTEX_ASSERT_LOCKED(&pr->ps_mtx);
if (pr->ps_single == NULL || pr->ps_single == p)
return (0);
@ -2078,19 +2079,24 @@ single_thread_check_locked(struct proc *p, int deep, int s)
return (EINTR);
}
if (atomic_dec_int_nv(&pr->ps_singlecount) == 0)
wakeup(&pr->ps_singlecount);
if (pr->ps_flags & PS_SINGLEEXIT) {
SCHED_UNLOCK(s);
mtx_leave(&pr->ps_mtx);
KERNEL_LOCK();
exit1(p, 0, 0, EXIT_THREAD_NOCHECK);
/* NOTREACHED */
}
if (--pr->ps_singlecnt == 0)
wakeup(&pr->ps_singlecnt);
/* not exiting and don't need to unwind, so suspend */
mtx_leave(&pr->ps_mtx);
SCHED_LOCK(s);
p->p_stat = SSTOP;
mi_switch();
SCHED_UNLOCK(s);
mtx_enter(&pr->ps_mtx);
} while (pr->ps_single != NULL);
return (0);
@ -2099,11 +2105,11 @@ single_thread_check_locked(struct proc *p, int deep, int s)
int
single_thread_check(struct proc *p, int deep)
{
int s, error;
int error;
SCHED_LOCK(s);
error = single_thread_check_locked(p, deep, s);
SCHED_UNLOCK(s);
mtx_enter(&p->p_p->ps_mtx);
error = single_thread_check_locked(p, deep);
mtx_leave(&p->p_p->ps_mtx);
return error;
}
@ -2126,10 +2132,10 @@ single_thread_set(struct proc *p, int flags)
KASSERT(curproc == p);
SCHED_LOCK(s);
error = single_thread_check_locked(p, flags & SINGLE_DEEP, s);
mtx_enter(&pr->ps_mtx);
error = single_thread_check_locked(p, flags & SINGLE_DEEP);
if (error) {
SCHED_UNLOCK(s);
mtx_leave(&pr->ps_mtx);
return error;
}
@ -2148,27 +2154,17 @@ single_thread_set(struct proc *p, int flags)
panic("single_thread_mode = %d", mode);
#endif
}
pr->ps_singlecount = 0;
membar_producer();
pr->ps_single = p;
pr->ps_singlecnt = pr->ps_threadcnt;
TAILQ_FOREACH(q, &pr->ps_threads, p_thr_link) {
if (q == p)
continue;
if (q->p_flag & P_WEXIT) {
if (mode == SINGLE_EXIT) {
if (q->p_stat == SSTOP) {
unsleep(q);
setrunnable(q);
atomic_inc_int(&pr->ps_singlecount);
}
}
continue;
}
SCHED_LOCK(s);
atomic_setbits_int(&q->p_flag, P_SUSPSINGLE);
switch (q->p_stat) {
case SIDL:
case SRUN:
atomic_inc_int(&pr->ps_singlecount);
case SDEAD:
break;
case SSLEEP:
/* if it's not interruptible, then just have to wait */
@ -2176,30 +2172,33 @@ single_thread_set(struct proc *p, int flags)
/* merely need to suspend? just stop it */
if (mode == SINGLE_SUSPEND) {
q->p_stat = SSTOP;
--pr->ps_singlecnt;
break;
}
/* need to unwind or exit, so wake it */
unsleep(q);
setrunnable(q);
}
atomic_inc_int(&pr->ps_singlecount);
break;
case SSTOP:
if (mode == SINGLE_EXIT) {
unsleep(q);
setrunnable(q);
atomic_inc_int(&pr->ps_singlecount);
}
break;
case SDEAD:
} else
--pr->ps_singlecnt;
break;
case SONPROC:
atomic_inc_int(&pr->ps_singlecount);
signotify(q);
/* FALLTHROUGH */
case SRUN:
break;
}
SCHED_UNLOCK(s);
}
SCHED_UNLOCK(s);
/* count ourselfs out */
--pr->ps_singlecnt;
mtx_leave(&pr->ps_mtx);
if ((flags & SINGLE_NOWAIT) == 0)
single_thread_wait(pr, 1);
@ -2218,14 +2217,14 @@ single_thread_wait(struct process *pr, int recheck)
int wait;
/* wait until they're all suspended */
wait = pr->ps_singlecount > 0;
while (wait) {
sleep_setup(&pr->ps_singlecount, PWAIT, "suspend");
wait = pr->ps_singlecount > 0;
sleep_finish(0, wait);
mtx_enter(&pr->ps_mtx);
while ((wait = pr->ps_singlecnt > 0)) {
msleep_nsec(&pr->ps_singlecnt, &pr->ps_mtx, PWAIT, "suspend",
INFSLP);
if (!recheck)
break;
}
mtx_leave(&pr->ps_mtx);
return wait;
}
@ -2240,9 +2239,10 @@ single_thread_clear(struct proc *p, int flag)
KASSERT(pr->ps_single == p);
KASSERT(curproc == p);
SCHED_LOCK(s);
mtx_enter(&pr->ps_mtx);
pr->ps_single = NULL;
atomic_clearbits_int(&pr->ps_flags, PS_SINGLEUNWIND | PS_SINGLEEXIT);
TAILQ_FOREACH(q, &pr->ps_threads, p_thr_link) {
if (q == p || (q->p_flag & P_SUSPSINGLE) == 0)
continue;
@ -2253,6 +2253,7 @@ single_thread_clear(struct proc *p, int flag)
* then clearing that either makes it runnable or puts
* it back into some sleep queue
*/
SCHED_LOCK(s);
if (q->p_stat == SSTOP && (q->p_flag & flag) == 0) {
if (q->p_wchan == NULL)
setrunnable(q);
@ -2261,8 +2262,9 @@ single_thread_clear(struct proc *p, int flag)
q->p_stat = SSLEEP;
}
}
SCHED_UNLOCK(s);
}
SCHED_UNLOCK(s);
mtx_leave(&pr->ps_mtx);
}
void

7
sys/kern/kern_synch.c
View file

@ -1,4 +1,4 @@
/* $OpenBSD: kern_synch.c,v 1.202 2024/04/18 08:59:38 claudio Exp $ */
/* $OpenBSD: kern_synch.c,v 1.203 2024/05/20 10:32:20 claudio Exp $ */
/* $NetBSD: kern_synch.c,v 1.37 1996/04/22 01:38:37 christos Exp $ */
/*
@ -581,15 +581,18 @@ sys_sched_yield(struct proc *p, void *v, register_t *retval)
uint8_t newprio;
int s;
SCHED_LOCK(s);
/*
* If one of the threads of a multi-threaded process called
* sched_yield(2), drop its priority to ensure its siblings
* can make some progress.
*/
mtx_enter(&p->p_p->ps_mtx);
newprio = p->p_usrpri;
TAILQ_FOREACH(q, &p->p_p->ps_threads, p_thr_link)
newprio = max(newprio, q->p_runpri);
mtx_leave(&p->p_p->ps_mtx);
SCHED_LOCK(s);
setrunqueue(p->p_cpu, p, newprio);
p->p_ru.ru_nvcsw++;
mi_switch();

4
sys/kern/vfs_init.c
View file

@ -1,4 +1,4 @@
/* $OpenBSD: vfs_init.c,v 1.43 2019/12/26 13:30:54 bluhm Exp $ */
/* $OpenBSD: vfs_init.c,v 1.44 2024/05/20 09:11:21 mvs Exp $ */
/* $NetBSD: vfs_init.c,v 1.6 1996/02/09 19:00:58 christos Exp $ */
/*
@ -92,7 +92,7 @@ static struct vfsconf vfsconflist[] = {
#endif
#ifdef FUSE
{ &fusefs_vfsops, MOUNT_FUSEFS, 18, 0, MNT_LOCAL,
{ &fusefs_vfsops, MOUNT_FUSEFS, 18, 0, 0,
sizeof(struct fusefs_args) },
#endif

4
sys/miscfs/fuse/fuse_vfsops.c
View file

@ -1,4 +1,4 @@
/* $OpenBSD: fuse_vfsops.c,v 1.46 2024/05/07 14:27:11 mvs Exp $ */
/* $OpenBSD: fuse_vfsops.c,v 1.47 2024/05/20 09:11:21 mvs Exp $ */
/*
* Copyright (c) 2012-2013 Sylvestre Gallon <ccna.syl@gmail.com>
*
@ -114,8 +114,6 @@ fusefs_mount(struct mount *mp, const char *path, void *data,
fmp->allow_other = args->allow_other;
mp->mnt_data = fmp;
/* FUSE file system is not truly local. */
mp->mnt_flag &= ~MNT_LOCAL;
vfs_getnewfsid(mp);
memset(mp->mnt_stat.f_mntonname, 0, MNAMELEN);

8
sys/netinet6/in6.c
View file

@ -1,4 +1,4 @@
/* $OpenBSD: in6.c,v 1.265 2024/04/21 17:32:10 florian Exp $ */
/* $OpenBSD: in6.c,v 1.266 2024/05/21 15:12:25 florian Exp $ */
/* $KAME: in6.c,v 1.372 2004/06/14 08:14:21 itojun Exp $ */
/*
@ -743,8 +743,12 @@ in6_update_ifa(struct ifnet *ifp, struct in6_aliasreq *ifra,
/*
* We are done if we have simply modified an existing address.
*/
if (!hostIsNew)
if (!hostIsNew) {
/* DAD sends RTM_CHGADDRATTR when done. */
if (!(ia6->ia6_flags & IN6_IFF_TENTATIVE))
rtm_addr(RTM_CHGADDRATTR, &ia6->ia_ifa);
return (error);
}
/*
* Beyond this point, we should call in6_purgeaddr upon an error,

14
sys/sys/proc.h
View file

@ -1,4 +1,4 @@
/* $OpenBSD: proc.h,v 1.360 2024/04/18 10:29:39 claudio Exp $ */
/* $OpenBSD: proc.h,v 1.361 2024/05/20 10:32:20 claudio Exp $ */
/* $NetBSD: proc.h,v 1.44 1996/04/22 01:23:21 christos Exp $ */
/*-
@ -145,7 +145,7 @@ struct process {
struct ucred *ps_ucred; /* Process owner's identity. */
LIST_ENTRY(process) ps_list; /* List of all processes. */
TAILQ_HEAD(,proc) ps_threads; /* [K|S] Threads in this process. */
TAILQ_HEAD(,proc) ps_threads; /* [K|m] Threads in this process. */
LIST_ENTRY(process) ps_pglist; /* List of processes in pgrp. */
struct process *ps_pptr; /* Pointer to parent process. */
@ -180,8 +180,9 @@ struct process {
u_int ps_flags; /* [a] PS_* flags. */
int ps_siglist; /* Signals pending for the process. */
struct proc *ps_single; /* [S] Thread for single-threading. */
u_int ps_singlecount; /* [a] Not yet suspended threads. */
struct proc *ps_single; /* [m] Thread for single-threading. */
u_int ps_singlecnt; /* [m] Number of threads to suspend. */
u_int ps_exitcnt; /* [m] Number of threads in exit1. */
int ps_traceflag; /* Kernel trace points. */
struct vnode *ps_tracevp; /* Trace to vnode. */
@ -252,7 +253,7 @@ struct process {
/* End area that is copied on creation. */
#define ps_endcopy ps_threadcnt
u_int ps_threadcnt; /* Number of threads. */
u_int ps_threadcnt; /* [m] Number of threads. */
struct timespec ps_start; /* starting uptime. */
struct timeout ps_realit_to; /* [m] ITIMER_REAL timeout */
@ -322,13 +323,14 @@ struct p_inentry {
* U uidinfolk
* l read only reference, see lim_read_enter()
* o owned (modified only) by this thread
* m this proc's' `p->p_p->ps_mtx'
*/
struct proc {
TAILQ_ENTRY(proc) p_runq; /* [S] current run/sleep queue */
LIST_ENTRY(proc) p_list; /* List of all threads. */
struct process *p_p; /* [I] The process of this thread. */
TAILQ_ENTRY(proc) p_thr_link; /* Threads in a process linkage. */
TAILQ_ENTRY(proc) p_thr_link; /* [K|m] Threads in a process linkage. */
TAILQ_ENTRY(proc) p_fut_link; /* Threads in a futex linkage. */
struct futex *p_futex; /* Current sleeping futex. */

4
sys/uvm/uvm_amap.c
View file

@ -1,4 +1,4 @@
/* $OpenBSD: uvm_amap.c,v 1.94 2024/04/17 13:17:31 mpi Exp $ */
/* $OpenBSD: uvm_amap.c,v 1.95 2024/05/20 17:03:36 dv Exp $ */
/* $NetBSD: uvm_amap.c,v 1.27 2000/11/25 06:27:59 chs Exp $ */
/*
@ -450,7 +450,7 @@ amap_free(struct vm_amap *amap)
KASSERT((amap->am_flags & AMAP_SWAPOFF) == 0);
if (amap->am_lock != NULL) {
KASSERT(amap->am_lock == NULL || !rw_write_held(amap->am_lock));
KASSERT(!rw_write_held(amap->am_lock));
rw_obj_free(amap->am_lock);
}