sync with OpenBSD -current
This commit is contained in:
parent
acf2ed1690
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GPG key ID:
F42C07F07E2E35B7
20 changed files with 327 additions and 83 deletions
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@ -1,4 +1,4 @@
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/* $OpenBSD: vmm_machdep.c,v 1.29 2024/07/14 07:57:42 dv Exp $ */
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/* $OpenBSD: vmm_machdep.c,v 1.30 2024/07/24 21:04:12 dv Exp $ */
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/*
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* Copyright (c) 2014 Mike Larkin <mlarkin@openbsd.org>
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*
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@ -1987,10 +1987,8 @@ vcpu_reset_regs_svm(struct vcpu *vcpu, struct vcpu_reg_state *vrs)
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PATENTRY(6, PAT_UCMINUS) | PATENTRY(7, PAT_UC);
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/* NPT */
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if (vmm_softc->mode == VMM_MODE_RVI) {
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vmcb->v_np_enable = 1;
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vmcb->v_n_cr3 = vcpu->vc_parent->vm_map->pmap->pm_pdirpa;
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}
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vmcb->v_np_enable = 1;
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vmcb->v_n_cr3 = vcpu->vc_parent->vm_map->pmap->pm_pdirpa;
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/* Enable SVME in EFER (must always be set) */
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vmcb->v_efer |= EFER_SVME;
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@ -2363,11 +2361,8 @@ vcpu_reset_regs_vmx(struct vcpu *vcpu, struct vcpu_reg_state *vrs)
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IA32_VMX_USE_TPR_SHADOW;
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want0 = 0;
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if (vmm_softc->mode == VMM_MODE_EPT) {
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want1 |= IA32_VMX_ACTIVATE_SECONDARY_CONTROLS;
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want0 |= IA32_VMX_CR3_LOAD_EXITING |
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IA32_VMX_CR3_STORE_EXITING;
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}
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want1 |= IA32_VMX_ACTIVATE_SECONDARY_CONTROLS;
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want0 |= IA32_VMX_CR3_LOAD_EXITING | IA32_VMX_CR3_STORE_EXITING;
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if (vcpu->vc_vmx_basic & IA32_VMX_TRUE_CTLS_AVAIL) {
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ctrl = IA32_VMX_TRUE_PROCBASED_CTLS;
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@ -2403,7 +2398,7 @@ vcpu_reset_regs_vmx(struct vcpu *vcpu, struct vcpu_reg_state *vrs)
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* IA32_VMX_UNRESTRICTED_GUEST - enable unrestricted guest (if caller
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* specified CR0_PG | CR0_PE in %cr0 in the 'vrs' parameter)
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*/
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want1 = 0;
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want1 = IA32_VMX_ENABLE_EPT;
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/* XXX checking for 2ndary controls can be combined here */
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if (vcpu_vmx_check_cap(vcpu, IA32_VMX_PROCBASED_CTLS,
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@ -2415,9 +2410,6 @@ vcpu_reset_regs_vmx(struct vcpu *vcpu, struct vcpu_reg_state *vrs)
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}
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}
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if (vmm_softc->mode == VMM_MODE_EPT)
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want1 |= IA32_VMX_ENABLE_EPT;
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if (vcpu_vmx_check_cap(vcpu, IA32_VMX_PROCBASED_CTLS,
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IA32_VMX_ACTIVATE_SECONDARY_CONTROLS, 1)) {
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if (vcpu_vmx_check_cap(vcpu, IA32_VMX_PROCBASED2_CTLS,
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@ -5419,8 +5411,7 @@ vmx_handle_cr0_write(struct vcpu *vcpu, uint64_t r)
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/* If the guest hasn't enabled paging ... */
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if (!(r & CR0_PG) && (oldcr0 & CR0_PG)) {
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/* Paging was disabled (prev. enabled) - Flush TLB */
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if (vmm_softc->mode == VMM_MODE_EPT &&
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vcpu->vc_vmx_vpid_enabled) {
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if (vcpu->vc_vmx_vpid_enabled) {
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vid.vid_vpid = vcpu->vc_vpid;
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vid.vid_addr = 0;
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invvpid(IA32_VMX_INVVPID_SINGLE_CTX_GLB, &vid);
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@ -1,4 +1,4 @@
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/* $OpenBSD: cpu.c,v 1.129 2024/07/21 18:57:31 kettenis Exp $ */
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/* $OpenBSD: cpu.c,v 1.130 2024/07/24 21:24:18 kettenis Exp $ */
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/*
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* Copyright (c) 2016 Dale Rahn <drahn@dalerahn.com>
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@ -242,6 +242,9 @@ int cpu_node;
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uint64_t cpu_id_aa64isar0;
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uint64_t cpu_id_aa64isar1;
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uint64_t cpu_id_aa64isar2;
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uint64_t cpu_id_aa64mmfr0;
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uint64_t cpu_id_aa64mmfr1;
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uint64_t cpu_id_aa64mmfr2;
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uint64_t cpu_id_aa64pfr0;
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uint64_t cpu_id_aa64pfr1;
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@ -487,6 +490,7 @@ cpu_identify(struct cpu_info *ci)
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static uint64_t prev_id_aa64isar2;
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static uint64_t prev_id_aa64mmfr0;
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static uint64_t prev_id_aa64mmfr1;
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static uint64_t prev_id_aa64mmfr2;
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static uint64_t prev_id_aa64pfr0;
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static uint64_t prev_id_aa64pfr1;
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uint64_t midr, impl, part;
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@ -642,6 +646,7 @@ cpu_identify(struct cpu_info *ci)
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READ_SPECIALREG(id_aa64isar2_el1) == prev_id_aa64isar2 &&
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READ_SPECIALREG(id_aa64mmfr0_el1) == prev_id_aa64mmfr0 &&
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READ_SPECIALREG(id_aa64mmfr1_el1) == prev_id_aa64mmfr1 &&
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READ_SPECIALREG(id_aa64mmfr2_el1) == prev_id_aa64mmfr2 &&
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READ_SPECIALREG(id_aa64pfr0_el1) == prev_id_aa64pfr0 &&
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READ_SPECIALREG(id_aa64pfr1_el1) == prev_id_aa64pfr1)
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return;
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@ -662,6 +667,18 @@ cpu_identify(struct cpu_info *ci)
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printf("\n%s: mismatched ID_AA64ISAR2_EL1",
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ci->ci_dev->dv_xname);
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}
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if (READ_SPECIALREG(id_aa64mmfr0_el1) != cpu_id_aa64mmfr0) {
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printf("\n%s: mismatched ID_AA64MMFR0_EL1",
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ci->ci_dev->dv_xname);
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}
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if (READ_SPECIALREG(id_aa64mmfr1_el1) != cpu_id_aa64mmfr1) {
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printf("\n%s: mismatched ID_AA64MMFR1_EL1",
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ci->ci_dev->dv_xname);
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}
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if (READ_SPECIALREG(id_aa64mmfr2_el1) != cpu_id_aa64mmfr2) {
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printf("\n%s: mismatched ID_AA64MMFR2_EL1",
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ci->ci_dev->dv_xname);
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}
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id = READ_SPECIALREG(id_aa64pfr0_el1);
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/* Allow CSV2/CVS3 to be different. */
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id &= ~ID_AA64PFR0_CSV2_MASK;
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@ -938,6 +955,16 @@ cpu_identify(struct cpu_info *ci)
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sep = ",";
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}
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/*
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* ID_AA64MMFR2
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*/
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id = READ_SPECIALREG(id_aa64mmfr2_el1);
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if (ID_AA64MMFR2_IDS(id) >= ID_AA64MMFR2_IDS_IMPL) {
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printf("%sIDS", sep);
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sep = ",";
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}
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/*
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* ID_AA64PFR0
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*/
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@ -989,6 +1016,7 @@ cpu_identify(struct cpu_info *ci)
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prev_id_aa64isar2 = READ_SPECIALREG(id_aa64isar2_el1);
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prev_id_aa64mmfr0 = READ_SPECIALREG(id_aa64mmfr0_el1);
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prev_id_aa64mmfr1 = READ_SPECIALREG(id_aa64mmfr1_el1);
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prev_id_aa64mmfr2 = READ_SPECIALREG(id_aa64mmfr2_el1);
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prev_id_aa64pfr0 = READ_SPECIALREG(id_aa64pfr0_el1);
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prev_id_aa64pfr1 = READ_SPECIALREG(id_aa64pfr1_el1);
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@ -1023,6 +1051,7 @@ cpu_identify(struct cpu_info *ci)
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void
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cpu_identify_cleanup(void)
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{
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uint64_t id_aa64mmfr2;
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uint64_t value;
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/* ID_AA64ISAR0_EL1 */
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@ -1040,6 +1069,15 @@ cpu_identify_cleanup(void)
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value &= ~ID_AA64ISAR2_CLRBHB_MASK;
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cpu_id_aa64isar2 = value;
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/* ID_AA64MMFR0_EL1 */
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cpu_id_aa64mmfr0 = 0;
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/* ID_AA64MMFR1_EL1 */
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cpu_id_aa64mmfr1 = 0;
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/* ID_AA64MMFR2_EL1 */
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cpu_id_aa64mmfr2 = 0;
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/* ID_AA64PFR0_EL1 */
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value = 0;
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value |= cpu_id_aa64pfr0 & ID_AA64PFR0_FP_MASK;
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@ -1071,7 +1109,9 @@ cpu_identify_cleanup(void)
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hwcap |= HWCAP_ATOMICS;
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/* HWCAP_FPHP */
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/* HWCAP_ASIMDHP */
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/* HWCAP_CPUID */
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id_aa64mmfr2 = READ_SPECIALREG(id_aa64mmfr2_el1);
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if (ID_AA64MMFR2_IDS(id_aa64mmfr2) >= ID_AA64MMFR2_IDS_IMPL)
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hwcap |= HWCAP_CPUID;
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if (ID_AA64ISAR0_RDM(cpu_id_aa64isar0) >= ID_AA64ISAR0_RDM_IMPL)
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hwcap |= HWCAP_ASIMDRDM;
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if (ID_AA64ISAR1_JSCVT(cpu_id_aa64isar1) >= ID_AA64ISAR1_JSCVT_IMPL)
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@ -1271,6 +1311,9 @@ cpu_attach(struct device *parent, struct device *dev, void *aux)
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cpu_id_aa64isar0 = READ_SPECIALREG(id_aa64isar0_el1);
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cpu_id_aa64isar1 = READ_SPECIALREG(id_aa64isar1_el1);
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cpu_id_aa64isar2 = READ_SPECIALREG(id_aa64isar2_el1);
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cpu_id_aa64mmfr0 = READ_SPECIALREG(id_aa64mmfr0_el1);
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cpu_id_aa64mmfr1 = READ_SPECIALREG(id_aa64mmfr1_el1);
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cpu_id_aa64mmfr2 = READ_SPECIALREG(id_aa64mmfr2_el1);
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cpu_id_aa64pfr0 = READ_SPECIALREG(id_aa64pfr0_el1);
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cpu_id_aa64pfr1 = READ_SPECIALREG(id_aa64pfr1_el1);
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@ -1,4 +1,4 @@
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/* $OpenBSD: fpu.c,v 1.1 2022/01/01 18:52:36 kettenis Exp $ */
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/* $OpenBSD: fpu.c,v 1.2 2024/07/26 00:23:57 jsg Exp $ */
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/*
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* Copyright (c) 2022 Mark Kettenis <kettenis@openbsd.org>
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*
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@ -22,6 +22,7 @@
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#include <machine/armreg.h>
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__attribute__((target("+fp")))
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void
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fpu_save(struct proc *p)
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{
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@ -74,6 +75,7 @@ fpu_save(struct proc *p)
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fp->fp_cr = READ_SPECIALREG(fpcr);
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}
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__attribute__((target("+fp")))
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void
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fpu_load(struct proc *p)
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{
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@ -1,4 +1,4 @@
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/* $OpenBSD: machdep.c,v 1.91 2024/07/17 15:21:59 kettenis Exp $ */
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/* $OpenBSD: machdep.c,v 1.92 2024/07/24 21:24:18 kettenis Exp $ */
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/*
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* Copyright (c) 2014 Patrick Wildt <patrick@blueri.se>
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* Copyright (c) 2021 Mark Kettenis <kettenis@openbsd.org>
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@ -360,8 +360,11 @@ cpu_sysctl(int *name, u_int namelen, void *oldp, size_t *oldlenp, void *newp,
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case CPU_ID_AA64PFR1:
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return sysctl_rdquad(oldp, oldlenp, newp, cpu_id_aa64pfr1);
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case CPU_ID_AA64MMFR0:
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return sysctl_rdquad(oldp, oldlenp, newp, cpu_id_aa64mmfr0);
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case CPU_ID_AA64MMFR1:
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return sysctl_rdquad(oldp, oldlenp, newp, cpu_id_aa64mmfr1);
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case CPU_ID_AA64MMFR2:
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return sysctl_rdquad(oldp, oldlenp, newp, cpu_id_aa64mmfr2);
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case CPU_ID_AA64SMFR0:
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case CPU_ID_AA64ZFR0:
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return sysctl_rdquad(oldp, oldlenp, newp, 0);
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@ -1,4 +1,4 @@
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/* $OpenBSD: trap.c,v 1.48 2024/02/21 15:53:07 deraadt Exp $ */
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/* $OpenBSD: trap.c,v 1.49 2024/07/24 21:24:18 kettenis Exp $ */
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/*-
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* Copyright (c) 2014 Andrew Turner
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* All rights reserved.
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@ -187,6 +187,99 @@ kdata_abort(struct trapframe *frame, uint64_t esr, uint64_t far, int exe)
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}
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}
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static int
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emulate_msr(struct trapframe *frame, uint64_t esr)
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{
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u_int rt = ISS_MSR_Rt(esr);
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uint64_t val;
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/* Only emulate reads. */
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if ((esr & ISS_MSR_DIR) == 0)
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return 0;
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/* Only emulate non-debug System register access. */
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if (ISS_MSR_OP0(esr) != 3 || ISS_MSR_OP1(esr) != 0 ||
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ISS_MSR_CRn(esr) != 0)
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return 0;
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switch (ISS_MSR_CRm(esr)) {
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case 0:
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switch (ISS_MSR_OP2(esr)) {
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case 0: /* MIDR_EL1 */
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val = READ_SPECIALREG(midr_el1);
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break;
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case 5: /* MPIDR_EL1 */
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/*
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* Don't reveal the topology to userland. But
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* return a valid value; Bit 31 is RES1.
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*/
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val = 0x80000000;
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break;
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case 6: /* REVIDR_EL1 */
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val = 0;
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break;
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default:
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return 0;
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}
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break;
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case 4:
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switch (ISS_MSR_OP2(esr)) {
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case 0: /* ID_AA64PFR0_EL1 */
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val = cpu_id_aa64pfr0;
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break;
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case 1: /* ID_AA64PFR1_EL1 */
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val = cpu_id_aa64pfr1;
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break;
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case 2: /* ID_AA64PFR2_EL1 */
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case 4: /* ID_AA64ZFR0_EL1 */
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case 5: /* ID_AA64SMFR0_EL1 */
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val = 0;
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break;
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default:
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return 0;
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}
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break;
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case 6:
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switch (ISS_MSR_OP2(esr)) {
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case 0: /* ID_AA64ISAR0_EL1 */
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val = cpu_id_aa64isar0;
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break;
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case 1: /* ID_AA64ISAR1_EL1 */
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val = cpu_id_aa64isar1;
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break;
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case 2: /* ID_AA64ISAR2_EL2 */
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val = cpu_id_aa64isar2;
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break;
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default:
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return 0;
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}
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break;
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case 7:
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switch (ISS_MSR_OP2(esr)) {
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case 0: /* ID_AA64MMFR0_EL1 */
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case 1: /* ID_AA64MMFR1_EL1 */
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case 2: /* ID_AA64MMFR2_EL1 */
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case 3: /* ID_AA64MMFR3_EL1 */
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case 4: /* ID_AA64MMFR4_EL1 */
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val = 0;
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break;
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default:
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return 0;
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}
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break;
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default:
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return 0;
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}
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if (rt < 30)
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frame->tf_x[rt] = val;
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else if (rt == 30)
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frame->tf_lr = val;
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frame->tf_elr += 4;
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return 1;
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}
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void
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do_el1h_sync(struct trapframe *frame)
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{
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@ -288,6 +381,10 @@ do_el0_sync(struct trapframe *frame)
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sv.sival_ptr = (void *)frame->tf_elr;
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trapsignal(p, SIGILL, esr, ILL_BTCFI, sv);
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break;
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case EXCP_MSR:
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if (emulate_msr(frame, esr))
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break;
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/* FALLTHROUGH */
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case EXCP_FPAC:
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curcpu()->ci_flush_bp();
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sv.sival_ptr = (void *)frame->tf_elr;
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@ -1,4 +1,4 @@
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/* $OpenBSD: armreg.h,v 1.35 2024/06/23 10:17:16 kettenis Exp $ */
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/* $OpenBSD: armreg.h,v 1.36 2024/07/24 21:24:18 kettenis Exp $ */
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/*-
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* Copyright (c) 2013, 2014 Andrew Turner
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* Copyright (c) 2015 The FreeBSD Foundation
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@ -171,6 +171,26 @@
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#define ISS_DATA_DFSC_ECC_L3 (0x1f << 0)
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#define ISS_DATA_DFSC_ALIGN (0x21 << 0)
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#define ISS_DATA_DFSC_TLB_CONFLICT (0x30 << 0)
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#define ISS_MSR_DIR_SHIFT 0
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#define ISS_MSR_DIR (0x01 << ISS_MSR_DIR_SHIFT)
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#define ISS_MSR_Rt_SHIFT 5
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#define ISS_MSR_Rt_MASK (0x1f << ISS_MSR_Rt_SHIFT)
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#define ISS_MSR_Rt(x) (((x) & ISS_MSR_Rt_MASK) >> ISS_MSR_Rt_SHIFT)
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#define ISS_MSR_CRm_SHIFT 1
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#define ISS_MSR_CRm_MASK (0xf << ISS_MSR_CRm_SHIFT)
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#define ISS_MSR_CRm(x) (((x) & ISS_MSR_CRm_MASK) >> ISS_MSR_CRm_SHIFT)
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#define ISS_MSR_CRn_SHIFT 10
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#define ISS_MSR_CRn_MASK (0xf << ISS_MSR_CRn_SHIFT)
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#define ISS_MSR_CRn(x) (((x) & ISS_MSR_CRn_MASK) >> ISS_MSR_CRn_SHIFT)
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||||
#define ISS_MSR_OP1_SHIFT 14
|
||||
#define ISS_MSR_OP1_MASK (0x7 << ISS_MSR_OP1_SHIFT)
|
||||
#define ISS_MSR_OP1(x) (((x) & ISS_MSR_OP1_MASK) >> ISS_MSR_OP1_SHIFT)
|
||||
#define ISS_MSR_OP2_SHIFT 17
|
||||
#define ISS_MSR_OP2_MASK (0x7 << ISS_MSR_OP2_SHIFT)
|
||||
#define ISS_MSR_OP2(x) (((x) & ISS_MSR_OP2_MASK) >> ISS_MSR_OP2_SHIFT)
|
||||
#define ISS_MSR_OP0_SHIFT 20
|
||||
#define ISS_MSR_OP0_MASK (0x3 << ISS_MSR_OP0_SHIFT)
|
||||
#define ISS_MSR_OP0(x) (((x) & ISS_MSR_OP0_MASK) >> ISS_MSR_OP0_SHIFT)
|
||||
#define ESR_ELx_IL (0x01 << 25)
|
||||
#define ESR_ELx_EC_SHIFT 26
|
||||
#define ESR_ELx_EC_MASK (0x3f << 26)
|
||||
|
|
@ -537,6 +557,10 @@
|
|||
#define ID_AA64MMFR2_CCIDX_MASK (0xfULL << ID_AA64MMFR2_CCIDX_SHIFT)
|
||||
#define ID_AA64MMFR2_CCIDX(x) ((x) & ID_AA64MMFR2_CCIDX_MASK)
|
||||
#define ID_AA64MMFR2_CCIDX_IMPL (0x1ULL << ID_AA64MMFR2_CCIDX_SHIFT)
|
||||
#define ID_AA64MMFR2_IDS_SHIFT 36
|
||||
#define ID_AA64MMFR2_IDS_MASK (0xfULL << ID_AA64MMFR2_IDS_SHIFT)
|
||||
#define ID_AA64MMFR2_IDS(x) ((x) & ID_AA64MMFR2_IDS_MASK)
|
||||
#define ID_AA64MMFR2_IDS_IMPL (0x1ULL << ID_AA64MMFR2_IDS_SHIFT)
|
||||
|
||||
/* ID_AA64PFR0_EL1 */
|
||||
#define ID_AA64PFR0_MASK 0xff0fffffffffffffULL
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $OpenBSD: cpu.h,v 1.49 2024/07/17 15:21:59 kettenis Exp $ */
|
||||
/* $OpenBSD: cpu.h,v 1.50 2024/07/24 21:24:18 kettenis Exp $ */
|
||||
/*
|
||||
* Copyright (c) 2016 Dale Rahn <drahn@dalerahn.com>
|
||||
*
|
||||
|
|
@ -64,6 +64,9 @@
|
|||
extern uint64_t cpu_id_aa64isar0;
|
||||
extern uint64_t cpu_id_aa64isar1;
|
||||
extern uint64_t cpu_id_aa64isar2;
|
||||
extern uint64_t cpu_id_aa64mmfr0;
|
||||
extern uint64_t cpu_id_aa64mmfr1;
|
||||
extern uint64_t cpu_id_aa64mmfr2;
|
||||
extern uint64_t cpu_id_aa64pfr0;
|
||||
extern uint64_t cpu_id_aa64pfr1;
|
||||
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $OpenBSD: qcpas.c,v 1.2 2023/07/01 15:50:18 drahn Exp $ */
|
||||
/* $OpenBSD: qcpas.c,v 1.3 2024/07/25 20:21:40 kettenis Exp $ */
|
||||
/*
|
||||
* Copyright (c) 2023 Patrick Wildt <patrick@blueri.se>
|
||||
*
|
||||
|
|
@ -795,13 +795,6 @@ qcpas_glink_recv_open(struct qcpas_softc *sc, uint32_t rcid, uint32_t namelen)
|
|||
return;
|
||||
}
|
||||
|
||||
/* Assume we can leave HW dangling if proto init fails */
|
||||
err = proto->init(NULL);
|
||||
if (err) {
|
||||
free(name, M_TEMP, namelen);
|
||||
return;
|
||||
}
|
||||
|
||||
ch = malloc(sizeof(*ch), M_DEVBUF, M_WAITOK | M_ZERO);
|
||||
ch->ch_sc = sc;
|
||||
ch->ch_proto = proto;
|
||||
|
|
@ -811,6 +804,15 @@ qcpas_glink_recv_open(struct qcpas_softc *sc, uint32_t rcid, uint32_t namelen)
|
|||
TAILQ_INIT(&ch->ch_r_intents);
|
||||
TAILQ_INSERT_TAIL(&sc->sc_glink_channels, ch, ch_q);
|
||||
|
||||
/* Assume we can leave HW dangling if proto init fails */
|
||||
err = proto->init(ch);
|
||||
if (err) {
|
||||
TAILQ_REMOVE(&sc->sc_glink_channels, ch, ch_q);
|
||||
free(ch, M_TEMP, sizeof(*ch));
|
||||
free(name, M_TEMP, namelen);
|
||||
return;
|
||||
}
|
||||
|
||||
msg.cmd = GLINK_CMD_OPEN_ACK;
|
||||
msg.param1 = ch->ch_rcid;
|
||||
msg.param2 = 0;
|
||||
|
|
@ -1108,7 +1110,7 @@ struct battmgr_bat_status {
|
|||
#define BATTMGR_BAT_STATE_CHARGING (1 << 1)
|
||||
#define BATTMGR_BAT_STATE_CRITICAL_LOW (1 << 2)
|
||||
uint32_t capacity;
|
||||
uint32_t rate;
|
||||
int32_t rate;
|
||||
uint32_t battery_voltage;
|
||||
uint32_t power_state;
|
||||
#define BATTMGR_PWR_STATE_AC_ON (1 << 0)
|
||||
|
|
@ -1151,7 +1153,7 @@ qcpas_pmic_rtr_battmgr_req_status(void *cookie)
|
|||
|
||||
#if NAPM > 0
|
||||
struct apm_power_info qcpas_pmic_rtr_apm_power_info;
|
||||
uint32_t qcpas_pmic_rtr_last_full_capacity;
|
||||
void *qcpas_pmic_rtr_apm_cookie;
|
||||
#endif
|
||||
|
||||
int
|
||||
|
|
@ -1166,6 +1168,7 @@ qcpas_pmic_rtr_init(void *cookie)
|
|||
info->battery_life = 0;
|
||||
info->minutes_left = -1;
|
||||
|
||||
qcpas_pmic_rtr_apm_cookie = cookie;
|
||||
apm_setinfohook(qcpas_pmic_rtr_apminfo);
|
||||
#endif
|
||||
return 0;
|
||||
|
|
@ -1174,6 +1177,9 @@ qcpas_pmic_rtr_init(void *cookie)
|
|||
int
|
||||
qcpas_pmic_rtr_recv(void *cookie, uint8_t *buf, int len)
|
||||
{
|
||||
#if NAPM > 0
|
||||
static uint32_t last_full_capacity;
|
||||
#endif
|
||||
struct pmic_glink_hdr hdr;
|
||||
uint32_t notification;
|
||||
extern int hw_power;
|
||||
|
|
@ -1221,8 +1227,7 @@ qcpas_pmic_rtr_recv(void *cookie, uint8_t *buf, int len)
|
|||
bat = malloc(sizeof(*bat), M_TEMP, M_WAITOK);
|
||||
memcpy((void *)bat, buf + sizeof(hdr), sizeof(*bat));
|
||||
#if NAPM > 0
|
||||
qcpas_pmic_rtr_last_full_capacity =
|
||||
bat->last_full_capacity;
|
||||
last_full_capacity = bat->last_full_capacity;
|
||||
#endif
|
||||
free(bat, M_TEMP, sizeof(*bat));
|
||||
break;
|
||||
|
|
@ -1231,6 +1236,7 @@ qcpas_pmic_rtr_recv(void *cookie, uint8_t *buf, int len)
|
|||
struct battmgr_bat_status *bat;
|
||||
#if NAPM > 0
|
||||
struct apm_power_info *info;
|
||||
uint32_t delta;
|
||||
#endif
|
||||
if (len - sizeof(hdr) != sizeof(*bat)) {
|
||||
printf("%s: invalid battgmr bat status\n",
|
||||
|
|
@ -1239,15 +1245,17 @@ qcpas_pmic_rtr_recv(void *cookie, uint8_t *buf, int len)
|
|||
}
|
||||
#if NAPM > 0
|
||||
/* Needs BAT_INFO fist */
|
||||
if (!qcpas_pmic_rtr_last_full_capacity)
|
||||
if (last_full_capacity == 0) {
|
||||
wakeup(&qcpas_pmic_rtr_apm_power_info);
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
bat = malloc(sizeof(*bat), M_TEMP, M_WAITOK);
|
||||
memcpy((void *)bat, buf + sizeof(hdr), sizeof(*bat));
|
||||
#if NAPM > 0
|
||||
info = &qcpas_pmic_rtr_apm_power_info;
|
||||
info->battery_life = ((bat->capacity * 100) /
|
||||
qcpas_pmic_rtr_last_full_capacity);
|
||||
last_full_capacity);
|
||||
if (info->battery_life > 50)
|
||||
info->battery_state = APM_BATT_HIGH;
|
||||
else if (info->battery_life > 25)
|
||||
|
|
@ -1259,6 +1267,16 @@ qcpas_pmic_rtr_recv(void *cookie, uint8_t *buf, int len)
|
|||
else if (bat->battery_state & BATTMGR_BAT_STATE_CRITICAL_LOW)
|
||||
info->battery_state = APM_BATT_CRITICAL;
|
||||
|
||||
if (bat->rate < 0)
|
||||
delta = bat->capacity;
|
||||
else
|
||||
delta = last_full_capacity - bat->capacity;
|
||||
if (bat->rate == 0)
|
||||
info->minutes_left = -1;
|
||||
else
|
||||
info->minutes_left =
|
||||
(60 * delta) / abs(bat->rate);
|
||||
|
||||
if (bat->power_state & BATTMGR_PWR_STATE_AC_ON) {
|
||||
info->ac_state = APM_AC_ON;
|
||||
hw_power = 1;
|
||||
|
|
@ -1266,6 +1284,7 @@ qcpas_pmic_rtr_recv(void *cookie, uint8_t *buf, int len)
|
|||
info->ac_state = APM_AC_OFF;
|
||||
hw_power = 0;
|
||||
}
|
||||
wakeup(&qcpas_pmic_rtr_apm_power_info);
|
||||
#endif
|
||||
free(bat, M_TEMP, sizeof(*bat));
|
||||
break;
|
||||
|
|
@ -1289,8 +1308,15 @@ qcpas_pmic_rtr_recv(void *cookie, uint8_t *buf, int len)
|
|||
int
|
||||
qcpas_pmic_rtr_apminfo(struct apm_power_info *info)
|
||||
{
|
||||
memcpy(info, &qcpas_pmic_rtr_apm_power_info, sizeof(*info));
|
||||
int error;
|
||||
|
||||
qcpas_pmic_rtr_battmgr_req_status(qcpas_pmic_rtr_apm_cookie);
|
||||
error = tsleep_nsec(&qcpas_pmic_rtr_apm_power_info, PWAIT | PCATCH,
|
||||
"qcapm", SEC_TO_NSEC(5));
|
||||
if (error)
|
||||
return error;
|
||||
|
||||
memcpy(info, &qcpas_pmic_rtr_apm_power_info, sizeof(*info));
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $OpenBSD: virtio.c,v 1.26 2024/07/23 19:14:05 sf Exp $ */
|
||||
/* $OpenBSD: virtio.c,v 1.27 2024/07/25 08:35:40 sf Exp $ */
|
||||
/* $NetBSD: virtio.c,v 1.3 2011/11/02 23:05:52 njoly Exp $ */
|
||||
|
||||
/*
|
||||
|
|
@ -946,21 +946,43 @@ virtio_nused(struct virtqueue *vq)
|
|||
void
|
||||
virtio_vq_dump(struct virtqueue *vq)
|
||||
{
|
||||
#if VIRTIO_DEBUG >= 2
|
||||
int i;
|
||||
#endif
|
||||
/* Common fields */
|
||||
printf(" + addr: %p\n", vq);
|
||||
printf(" + vq num: %d\n", vq->vq_num);
|
||||
printf(" + vq mask: 0x%X\n", vq->vq_mask);
|
||||
printf(" + vq index: %d\n", vq->vq_index);
|
||||
printf(" + vq used idx: %d\n", vq->vq_used_idx);
|
||||
printf(" + vq avail idx: %d\n", vq->vq_avail_idx);
|
||||
printf(" + vq queued: %d\n",vq->vq_queued);
|
||||
#if VIRTIO_DEBUG >= 2
|
||||
for (i = 0; i < vq->vq_num; i++) {
|
||||
struct vring_desc *desc = &vq->vq_desc[i];
|
||||
printf(" D%-3d len:%d flags:%d next:%d\n", i, desc->len,
|
||||
desc->flags, desc->next);
|
||||
}
|
||||
#endif
|
||||
/* Avail ring fields */
|
||||
printf(" + avail flags: 0x%X\n", vq->vq_avail->flags);
|
||||
printf(" + avail idx: %d\n", vq->vq_avail->idx);
|
||||
printf(" + avail event: %d\n", VQ_AVAIL_EVENT(vq));
|
||||
#if VIRTIO_DEBUG >= 2
|
||||
for (i = 0; i < vq->vq_num; i++)
|
||||
printf(" A%-3d idx:%d\n", i, vq->vq_avail->ring[i]);
|
||||
#endif
|
||||
/* Used ring fields */
|
||||
printf(" + used flags: 0x%X\n",vq->vq_used->flags);
|
||||
printf(" + used idx: %d\n",vq->vq_used->idx);
|
||||
printf(" + used event: %d\n", VQ_USED_EVENT(vq));
|
||||
#if VIRTIO_DEBUG >= 2
|
||||
for (i = 0; i < vq->vq_num; i++) {
|
||||
printf(" U%-3d id:%d len:%d\n", i,
|
||||
vq->vq_used->ring[i].id,
|
||||
vq->vq_used->ring[i].len);
|
||||
}
|
||||
#endif
|
||||
printf(" +++++++++++++++++++++++++++\n");
|
||||
}
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue