2023-09-11 21:36:40 +00:00
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/* $OpenBSD: cy.c,v 1.42 2023/09/11 08:41:26 mvs Exp $ */
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2023-04-30 01:15:27 +00:00
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/*
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* Copyright (c) 1996 Timo Rossi.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the author nor the names of contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*
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* cy.c
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*
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* Driver for Cyclades Cyclom-8/16/32 multiport serial cards
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* (currently not tested with Cyclom-32 cards)
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*
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* Timo Rossi, 1996
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*
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* Supports both ISA and PCI Cyclom cards
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*
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* Uses CD1400 automatic CTS flow control, and
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* if CY_HW_RTS is defined, uses CD1400 automatic input flow control.
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* This requires a special cable that exchanges the RTS and DTR lines.
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*
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* Lots of debug output can be enabled by defining CY_DEBUG
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* Some debugging counters (number of receive/transmit interrupts etc.)
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* can be enabled by defining CY_DEBUG1
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*
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* This version uses the bus_space/io_??() stuff
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*
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*/
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#include <sys/param.h>
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#include <sys/ioctl.h>
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#include <sys/syslog.h>
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#include <sys/fcntl.h>
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#include <sys/tty.h>
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#include <sys/conf.h>
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#include <sys/device.h>
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#include <sys/malloc.h>
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#include <sys/systm.h>
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <dev/ic/cd1400reg.h>
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#include <dev/ic/cyreg.h>
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int cy_intr(void *);
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int cyparam(struct tty *, struct termios *);
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void cystart(struct tty *);
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void cy_poll(void *);
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int cy_modem_control(struct cy_port *, int, int);
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void cy_enable_transmitter(struct cy_port *);
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void cd1400_channel_cmd(struct cy_port *, int);
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int cy_speed(speed_t, int *, int *, int);
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struct cfdriver cy_cd = {
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NULL, "cy", DV_TTY
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};
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/*
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* Common probe routine
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*
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* returns the number of chips found.
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*/
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int
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cy_probe_common(bus_space_tag_t memt, bus_space_handle_t memh, int bustype)
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{
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int cy_chip, chip_offs;
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u_char firmware_ver;
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int nchips;
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/* Cyclom card hardware reset */
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bus_space_write_1(memt, memh, CY16_RESET<<bustype, 0);
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DELAY(500); /* wait for reset to complete */
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bus_space_write_1(memt, memh, CY_CLEAR_INTR<<bustype, 0);
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#ifdef CY_DEBUG
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printf("cy: card reset done\n");
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#endif
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nchips = 0;
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for (cy_chip = 0, chip_offs = 0;
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cy_chip < CY_MAX_CD1400s;
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cy_chip++, chip_offs += (CY_CD1400_MEMSPACING << bustype)) {
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int i;
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/* the last 4 cd1400s are 'interleaved'
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with the first 4 on 32-port boards */
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if (cy_chip == 4)
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chip_offs -= (CY32_ADDR_FIX << bustype);
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#ifdef CY_DEBUG
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printf("cy: probe chip %d offset 0x%x ... ",
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cy_chip, chip_offs);
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#endif
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/* wait until the chip is ready for command */
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DELAY(1000);
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if (bus_space_read_1(memt, memh, chip_offs +
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((CD1400_CCR << 1) << bustype)) != 0) {
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#ifdef CY_DEBUG
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printf("not ready for command\n");
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#endif
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break;
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}
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/* clear the firmware version reg. */
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bus_space_write_1(memt, memh, chip_offs +
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((CD1400_GFRCR << 1) << bustype), 0);
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/*
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* On Cyclom-16 references to non-existent chip 4
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* actually access chip 0 (address line 9 not decoded).
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* Here we check if the clearing of chip 4 GFRCR actually
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* cleared chip 0 GFRCR. In that case we have a 16 port card.
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*/
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if (cy_chip == 4 &&
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bus_space_read_1(memt, memh, chip_offs +
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((CD1400_GFRCR << 1) << bustype)) == 0)
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break;
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/* reset the chip */
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bus_space_write_1(memt, memh, chip_offs +
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((CD1400_CCR << 1) << bustype),
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CD1400_CCR_CMDRESET | CD1400_CCR_FULLRESET);
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/* wait for the chip to initialize itself */
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for (i = 0; i < 200; i++) {
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DELAY(50);
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firmware_ver = bus_space_read_1(memt, memh, chip_offs +
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((CD1400_GFRCR << 1) << bustype));
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if ((firmware_ver & 0xf0) == 0x40) /* found a CD1400 */
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break;
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}
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#ifdef CY_DEBUG
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printf("firmware version 0x%x\n", firmware_ver);
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2023-07-10 00:10:46 +00:00
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#endif
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2023-04-30 01:15:27 +00:00
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if ((firmware_ver & 0xf0) != 0x40)
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break;
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/* firmware version OK, CD1400 found */
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nchips++;
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}
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if (nchips == 0) {
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#ifdef CY_DEBUG
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printf("no CD1400s found\n");
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#endif
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return (0);
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}
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#ifdef CY_DEBUG
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printf("found %d CD1400s\n", nchips);
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#endif
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return (nchips);
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}
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void
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cy_attach(struct device *parent, struct device *self)
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{
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int card, port, cy_chip, num_chips, cdu, chip_offs, cy_clock;
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struct cy_softc *sc = (void *)self;
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card = sc->sc_dev.dv_unit;
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num_chips = sc->sc_nr_cd1400s;
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if (num_chips == 0)
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return;
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timeout_set(&sc->sc_poll_to, cy_poll, sc);
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bzero(sc->sc_ports, sizeof(sc->sc_ports));
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sc->sc_nports = num_chips * CD1400_NO_OF_CHANNELS;
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port = 0;
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for (cy_chip = 0, chip_offs = 0;
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cy_chip < num_chips;
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cy_chip++, chip_offs += (CY_CD1400_MEMSPACING<<sc->sc_bustype)) {
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if (cy_chip == 4)
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chip_offs -= (CY32_ADDR_FIX<<sc->sc_bustype);
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#ifdef CY_DEBUG
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printf("attach CD1400 #%d offset 0x%x\n", cy_chip, chip_offs);
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#endif
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sc->sc_cd1400_offs[cy_chip] = chip_offs;
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/* configure port 0 as serial port
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(should already be after reset) */
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cd_write_reg_sc(sc, cy_chip, CD1400_GCR, 0);
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/* Set cy_clock depending on firmware version */
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if (cd_read_reg_sc(sc, cy_chip, CD1400_GFRCR) <= 0x46)
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cy_clock = CY_CLOCK;
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2023-07-10 00:10:46 +00:00
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else
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2023-04-30 01:15:27 +00:00
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cy_clock = CY_CLOCK_60;
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/* set up a receive timeout period (1ms) */
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cd_write_reg_sc(sc, cy_chip, CD1400_PPR,
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(cy_clock / CD1400_PPR_PRESCALER / 1000) + 1);
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for (cdu = 0; cdu < CD1400_NO_OF_CHANNELS; cdu++) {
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sc->sc_ports[port].cy_port_num = port;
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sc->sc_ports[port].cy_memt = sc->sc_memt;
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sc->sc_ports[port].cy_memh = sc->sc_memh;
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sc->sc_ports[port].cy_chip_offs = chip_offs;
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sc->sc_ports[port].cy_bustype = sc->sc_bustype;
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sc->sc_ports[port].cy_clock = cy_clock;
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/* should we initialize anything else here? */
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port++;
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} /* for(each port on one CD1400...) */
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} /* for(each CD1400 on a card... ) */
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printf(": %d ports\n", port);
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/* ensure an edge for the next interrupt */
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bus_space_write_1(sc->sc_memt, sc->sc_memh,
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CY_CLEAR_INTR<<sc->sc_bustype, 0);
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}
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/*
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* open routine. returns zero if successful, else error code
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*/
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int cyopen(dev_t, int, int, struct proc *);
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int cyclose(dev_t, int, int, struct proc *);
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int cyread(dev_t, struct uio *, int);
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int cywrite(dev_t, struct uio *, int);
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struct tty *cytty(dev_t);
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int cyioctl(dev_t, u_long, caddr_t, int, struct proc *);
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int cystop(struct tty *, int flag);
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int
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cyopen(dev_t dev, int flag, int mode, struct proc *p)
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{
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int card = CY_CARD(dev);
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int port = CY_PORT(dev);
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struct cy_softc *sc;
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struct cy_port *cy;
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struct tty *tp;
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int s, error;
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if (card >= cy_cd.cd_ndevs ||
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(sc = cy_cd.cd_devs[card]) == NULL) {
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return (ENXIO);
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}
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#ifdef CY_DEBUG
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printf("%s open port %d flag 0x%x mode 0x%x\n", sc->sc_dev.dv_xname,
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port, flag, mode);
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#endif
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cy = &sc->sc_ports[port];
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s = spltty();
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if (cy->cy_tty == NULL) {
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cy->cy_tty = ttymalloc(0);
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}
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splx(s);
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tp = cy->cy_tty;
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tp->t_oproc = cystart;
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tp->t_param = cyparam;
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tp->t_dev = dev;
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if (!ISSET(tp->t_state, TS_ISOPEN)) {
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SET(tp->t_state, TS_WOPEN);
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ttychars(tp);
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tp->t_iflag = TTYDEF_IFLAG;
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tp->t_oflag = TTYDEF_OFLAG;
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tp->t_cflag = TTYDEF_CFLAG;
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if (ISSET(cy->cy_openflags, TIOCFLAG_CLOCAL))
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SET(tp->t_cflag, CLOCAL);
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if (ISSET(cy->cy_openflags, TIOCFLAG_CRTSCTS))
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SET(tp->t_cflag, CRTSCTS);
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if (ISSET(cy->cy_openflags, TIOCFLAG_MDMBUF))
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SET(tp->t_cflag, MDMBUF);
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tp->t_lflag = TTYDEF_LFLAG;
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tp->t_ispeed = tp->t_ospeed = TTYDEF_SPEED;
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s = spltty();
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/*
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* Allocate input ring buffer if we don't already have one
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*/
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if (cy->cy_ibuf == NULL) {
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cy->cy_ibuf = malloc(IBUF_SIZE, M_DEVBUF, M_NOWAIT);
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if (cy->cy_ibuf == NULL) {
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printf("%s: (port %d) can't allocate input buffer\n",
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sc->sc_dev.dv_xname, port);
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splx(s);
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return (ENOMEM);
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}
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cy->cy_ibuf_end = cy->cy_ibuf + IBUF_SIZE;
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}
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/* mark the ring buffer as empty */
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cy->cy_ibuf_rd_ptr = cy->cy_ibuf_wr_ptr = cy->cy_ibuf;
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/* select CD1400 channel */
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cd_write_reg(cy, CD1400_CAR, port & CD1400_CAR_CHAN);
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/* reset the channel */
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cd1400_channel_cmd(cy, CD1400_CCR_CMDRESET);
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/* encode unit (port) number in LIVR */
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/* there is just enough space for 5 bits (32 ports) */
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cd_write_reg(cy, CD1400_LIVR, port << 3);
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cy->cy_channel_control = 0;
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if (!timeout_pending(&sc->sc_poll_to))
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timeout_add(&sc->sc_poll_to, 1);
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/* this sets parameters and raises DTR */
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cyparam(tp, &tp->t_termios);
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ttsetwater(tp);
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/* raise RTS too */
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cy_modem_control(cy, TIOCM_RTS, DMBIS);
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cy->cy_carrier_stat = cd_read_reg(cy, CD1400_MSVR2);
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/* enable receiver and modem change interrupts */
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cd_write_reg(cy, CD1400_SRER,
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CD1400_SRER_MDMCH | CD1400_SRER_RXDATA);
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if (CY_DIALOUT(dev) ||
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ISSET(cy->cy_openflags, TIOCFLAG_SOFTCAR) ||
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ISSET(tp->t_cflag, MDMBUF) ||
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|
|
ISSET(cy->cy_carrier_stat, CD1400_MSVR2_CD))
|
|
|
|
SET(tp->t_state, TS_CARR_ON);
|
|
|
|
else
|
|
|
|
CLR(tp->t_state, TS_CARR_ON);
|
|
|
|
} else if (ISSET(tp->t_state, TS_XCLUDE) && suser(p) != 0) {
|
|
|
|
return (EBUSY);
|
|
|
|
} else {
|
|
|
|
s = spltty();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* wait for carrier if necessary */
|
|
|
|
if (!ISSET(flag, O_NONBLOCK)) {
|
|
|
|
while (!ISSET(tp->t_cflag, CLOCAL) &&
|
|
|
|
!ISSET(tp->t_state, TS_CARR_ON)) {
|
|
|
|
SET(tp->t_state, TS_WOPEN);
|
|
|
|
error = ttysleep(tp, &tp->t_rawq, TTIPRI | PCATCH,
|
|
|
|
ttopen);
|
|
|
|
if (error != 0) {
|
|
|
|
splx(s);
|
|
|
|
CLR(tp->t_state, TS_WOPEN);
|
|
|
|
return (error);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
splx(s);
|
|
|
|
|
|
|
|
return (*linesw[tp->t_line].l_open)(dev, tp, p);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* close routine. returns zero if successful, else error code
|
|
|
|
*/
|
|
|
|
int
|
|
|
|
cyclose(dev_t dev, int flag, int mode, struct proc *p)
|
|
|
|
{
|
|
|
|
int card = CY_CARD(dev);
|
|
|
|
int port = CY_PORT(dev);
|
|
|
|
struct cy_softc *sc = cy_cd.cd_devs[card];
|
|
|
|
struct cy_port *cy = &sc->sc_ports[port];
|
|
|
|
struct tty *tp = cy->cy_tty;
|
|
|
|
int s;
|
|
|
|
|
|
|
|
#ifdef CY_DEBUG
|
|
|
|
printf("%s close port %d, flag 0x%x, mode 0x%x\n", sc->sc_dev.dv_xname,
|
|
|
|
port, flag, mode);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
(*linesw[tp->t_line].l_close)(tp, flag, p);
|
|
|
|
s = spltty();
|
|
|
|
|
|
|
|
if (ISSET(tp->t_cflag, HUPCL) &&
|
|
|
|
!ISSET(cy->cy_openflags, TIOCFLAG_SOFTCAR)) {
|
|
|
|
/* drop DTR and RTS
|
|
|
|
(should we wait for output buffer to become empty first?) */
|
|
|
|
cy_modem_control(cy, 0, DMSET);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* XXX should we disable modem change and
|
|
|
|
* receive interrupts here or somewhere ?
|
|
|
|
*/
|
|
|
|
CLR(tp->t_state, TS_BUSY | TS_FLUSH);
|
|
|
|
|
|
|
|
splx(s);
|
|
|
|
ttyclose(tp);
|
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Read routine
|
|
|
|
*/
|
|
|
|
int
|
|
|
|
cyread(dev_t dev, struct uio *uio, int flag)
|
|
|
|
{
|
|
|
|
int card = CY_CARD(dev);
|
|
|
|
int port = CY_PORT(dev);
|
|
|
|
struct cy_softc *sc = cy_cd.cd_devs[card];
|
|
|
|
struct cy_port *cy = &sc->sc_ports[port];
|
|
|
|
struct tty *tp = cy->cy_tty;
|
|
|
|
|
|
|
|
#ifdef CY_DEBUG
|
|
|
|
printf("%s read port %d uio %p flag 0x%x\n", sc->sc_dev.dv_xname,
|
|
|
|
port, uio, flag);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
return ((*linesw[tp->t_line].l_read)(tp, uio, flag));
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Write routine
|
|
|
|
*/
|
|
|
|
int
|
|
|
|
cywrite(dev_t dev, struct uio *uio, int flag)
|
|
|
|
{
|
|
|
|
int card = CY_CARD(dev);
|
|
|
|
int port = CY_PORT(dev);
|
|
|
|
struct cy_softc *sc = cy_cd.cd_devs[card];
|
|
|
|
struct cy_port *cy = &sc->sc_ports[port];
|
|
|
|
struct tty *tp = cy->cy_tty;
|
|
|
|
|
|
|
|
#ifdef CY_DEBUG
|
|
|
|
printf("%s write port %d uio %p flag 0x%x\n", sc->sc_dev.dv_xname,
|
|
|
|
port, uio, flag);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
return ((*linesw[tp->t_line].l_write)(tp, uio, flag));
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* return tty pointer
|
|
|
|
*/
|
|
|
|
struct tty *
|
|
|
|
cytty(dev_t dev)
|
|
|
|
{
|
|
|
|
int card = CY_CARD(dev);
|
|
|
|
int port = CY_PORT(dev);
|
|
|
|
struct cy_softc *sc = cy_cd.cd_devs[card];
|
|
|
|
struct cy_port *cy = &sc->sc_ports[port];
|
|
|
|
struct tty *tp = cy->cy_tty;
|
|
|
|
|
|
|
|
return (tp);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* ioctl routine
|
|
|
|
*/
|
|
|
|
int
|
|
|
|
cyioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p)
|
|
|
|
{
|
|
|
|
int card = CY_CARD(dev);
|
|
|
|
int port = CY_PORT(dev);
|
|
|
|
struct cy_softc *sc = cy_cd.cd_devs[card];
|
|
|
|
struct cy_port *cy = &sc->sc_ports[port];
|
|
|
|
struct tty *tp = cy->cy_tty;
|
|
|
|
int error;
|
|
|
|
|
|
|
|
#ifdef CY_DEBUG
|
|
|
|
printf("%s port %d ioctl cmd 0x%lx data %p flag 0x%x\n",
|
|
|
|
sc->sc_dev.dv_xname, port, cmd, data, flag);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p);
|
|
|
|
if (error >= 0)
|
|
|
|
return (error);
|
|
|
|
|
|
|
|
error = ttioctl(tp, cmd, data, flag, p);
|
|
|
|
if (error >= 0)
|
|
|
|
return (error);
|
|
|
|
|
|
|
|
/* XXX should not allow dropping DTR when dialin? */
|
|
|
|
|
|
|
|
switch (cmd) {
|
|
|
|
case TIOCSBRK: /* start break */
|
|
|
|
SET(cy->cy_flags, CYF_START_BREAK);
|
|
|
|
cy_enable_transmitter(cy);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case TIOCCBRK: /* stop break */
|
|
|
|
SET(cy->cy_flags, CYF_END_BREAK);
|
|
|
|
cy_enable_transmitter(cy);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case TIOCSDTR: /* DTR on */
|
|
|
|
cy_modem_control(cy, TIOCM_DTR, DMBIS);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case TIOCCDTR: /* DTR off */
|
|
|
|
cy_modem_control(cy, TIOCM_DTR, DMBIC);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case TIOCMSET: /* set new modem control line values */
|
|
|
|
cy_modem_control(cy, *((int *)data), DMSET);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case TIOCMBIS: /* turn modem control bits on */
|
|
|
|
cy_modem_control(cy, *((int *)data), DMBIS);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case TIOCMBIC: /* turn modem control bits off */
|
|
|
|
cy_modem_control(cy, *((int *)data), DMBIC);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case TIOCMGET: /* get modem control/status line state */
|
|
|
|
*((int *)data) = cy_modem_control(cy, 0, DMGET);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case TIOCGFLAGS:
|
|
|
|
*((int *)data) = cy->cy_openflags |
|
|
|
|
(CY_DIALOUT(dev) ? TIOCFLAG_SOFTCAR : 0);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case TIOCSFLAGS:
|
|
|
|
error = suser(p);
|
|
|
|
if (error != 0)
|
|
|
|
return (EPERM);
|
|
|
|
|
|
|
|
cy->cy_openflags = *((int *)data) &
|
|
|
|
(TIOCFLAG_SOFTCAR | TIOCFLAG_CLOCAL |
|
|
|
|
TIOCFLAG_CRTSCTS | TIOCFLAG_MDMBUF);
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
return (ENOTTY);
|
|
|
|
}
|
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* start output
|
|
|
|
*/
|
|
|
|
void
|
|
|
|
cystart(struct tty *tp)
|
|
|
|
{
|
|
|
|
int card = CY_CARD(tp->t_dev);
|
|
|
|
int port = CY_PORT(tp->t_dev);
|
|
|
|
struct cy_softc *sc = cy_cd.cd_devs[card];
|
|
|
|
struct cy_port *cy = &sc->sc_ports[port];
|
|
|
|
int s;
|
|
|
|
|
|
|
|
#ifdef CY_DEBUG
|
|
|
|
printf("%s port %d start, tty %p\n", sc->sc_dev.dv_xname, port, tp);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
s = spltty();
|
|
|
|
|
|
|
|
#ifdef CY_DEBUG1
|
|
|
|
cy->cy_start_count++;
|
|
|
|
#endif
|
|
|
|
|
|
|
|
if (!ISSET(tp->t_state, TS_TTSTOP | TS_TIMEOUT | TS_BUSY)) {
|
|
|
|
ttwakeupwr(tp);
|
|
|
|
if (tp->t_outq.c_cc == 0)
|
|
|
|
goto out;
|
|
|
|
|
|
|
|
SET(tp->t_state, TS_BUSY);
|
|
|
|
cy_enable_transmitter(cy);
|
|
|
|
}
|
|
|
|
out:
|
|
|
|
|
|
|
|
splx(s);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* stop output
|
|
|
|
*/
|
|
|
|
int
|
|
|
|
cystop(struct tty *tp, int flag)
|
|
|
|
{
|
|
|
|
int card = CY_CARD(tp->t_dev);
|
|
|
|
int port = CY_PORT(tp->t_dev);
|
|
|
|
struct cy_softc *sc = cy_cd.cd_devs[card];
|
|
|
|
struct cy_port *cy = &sc->sc_ports[port];
|
|
|
|
int s;
|
|
|
|
|
|
|
|
#ifdef CY_DEBUG
|
|
|
|
printf("%s port %d stop tty %p flag 0x%x\n", sc->sc_dev.dv_xname,
|
|
|
|
port, tp, flag);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
s = spltty();
|
|
|
|
|
|
|
|
if (ISSET(tp->t_state, TS_BUSY)) {
|
|
|
|
if (!ISSET(tp->t_state, TS_TTSTOP))
|
|
|
|
SET(tp->t_state, TS_FLUSH);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* the transmit interrupt routine will disable transmit when it
|
|
|
|
* notices that CYF_STOP has been set.
|
|
|
|
*/
|
|
|
|
SET(cy->cy_flags, CYF_STOP);
|
|
|
|
}
|
|
|
|
splx(s);
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* parameter setting routine.
|
|
|
|
* returns 0 if successful, else returns error code
|
|
|
|
*/
|
|
|
|
int
|
|
|
|
cyparam(struct tty *tp, struct termios *t)
|
|
|
|
{
|
|
|
|
int card = CY_CARD(tp->t_dev);
|
|
|
|
int port = CY_PORT(tp->t_dev);
|
|
|
|
struct cy_softc *sc = cy_cd.cd_devs[card];
|
|
|
|
struct cy_port *cy = &sc->sc_ports[port];
|
|
|
|
int ibpr, obpr, i_clk_opt, o_clk_opt;
|
|
|
|
int s, opt;
|
|
|
|
|
|
|
|
#ifdef CY_DEBUG
|
|
|
|
printf("%s port %d param tty %p termios %p\n", sc->sc_dev.dv_xname,
|
|
|
|
port, tp, t);
|
|
|
|
printf("ispeed %d ospeed %d\n", t->c_ispeed, t->c_ospeed);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
if (t->c_ospeed != 0 &&
|
|
|
|
cy_speed(t->c_ospeed, &o_clk_opt, &obpr, cy->cy_clock) < 0)
|
|
|
|
return (EINVAL);
|
|
|
|
|
|
|
|
if (t->c_ispeed != 0 &&
|
|
|
|
cy_speed(t->c_ispeed, &i_clk_opt, &ibpr, cy->cy_clock) < 0)
|
|
|
|
return (EINVAL);
|
|
|
|
|
|
|
|
s = spltty();
|
|
|
|
|
|
|
|
/* hang up the line is ospeed is zero, else turn DTR on */
|
|
|
|
cy_modem_control(cy, TIOCM_DTR, (t->c_ospeed == 0 ? DMBIC : DMBIS));
|
|
|
|
|
|
|
|
/* channel was selected by the above call to cy_modem_control() */
|
|
|
|
/* cd_write_reg(cy, CD1400_CAR, port & CD1400_CAR_CHAN); */
|
|
|
|
|
|
|
|
/* set transmit speed */
|
|
|
|
if (t->c_ospeed != 0) {
|
|
|
|
cd_write_reg(cy, CD1400_TCOR, o_clk_opt);
|
|
|
|
cd_write_reg(cy, CD1400_TBPR, obpr);
|
|
|
|
}
|
|
|
|
/* set receive speed */
|
|
|
|
if (t->c_ispeed != 0) {
|
|
|
|
cd_write_reg(cy, CD1400_RCOR, i_clk_opt);
|
|
|
|
cd_write_reg(cy, CD1400_RBPR, ibpr);
|
|
|
|
}
|
|
|
|
|
|
|
|
opt = CD1400_CCR_CMDCHANCTL | CD1400_CCR_XMTEN
|
|
|
|
| (ISSET(t->c_cflag, CREAD) ? CD1400_CCR_RCVEN : CD1400_CCR_RCVDIS);
|
|
|
|
|
|
|
|
if (opt != cy->cy_channel_control) {
|
|
|
|
cy->cy_channel_control = opt;
|
|
|
|
cd1400_channel_cmd(cy, opt);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* compute COR1 contents */
|
|
|
|
opt = 0;
|
|
|
|
if (ISSET(t->c_cflag, PARENB)) {
|
|
|
|
if (ISSET(t->c_cflag, PARODD))
|
|
|
|
opt |= CD1400_COR1_PARODD;
|
|
|
|
opt |= CD1400_COR1_PARNORMAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!ISSET(t->c_iflag, INPCK))
|
|
|
|
opt |= CD1400_COR1_NOINPCK; /* no parity checking */
|
|
|
|
|
|
|
|
if (ISSET(t->c_cflag, CSTOPB))
|
|
|
|
opt |= CD1400_COR1_STOP2;
|
|
|
|
|
|
|
|
switch (t->c_cflag & CSIZE) {
|
|
|
|
case CS5:
|
|
|
|
opt |= CD1400_COR1_CS5;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case CS6:
|
|
|
|
opt |= CD1400_COR1_CS6;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case CS7:
|
|
|
|
opt |= CD1400_COR1_CS7;
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
opt |= CD1400_COR1_CS8;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
cd_write_reg(cy, CD1400_COR1, opt);
|
|
|
|
|
|
|
|
#ifdef CY_DEBUG
|
|
|
|
printf("cor1 = 0x%x...", opt);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/*
|
|
|
|
* use the CD1400 automatic CTS flow control if CRTSCTS is set
|
|
|
|
*
|
|
|
|
* CD1400_COR2_ETC is used because breaks are generated with
|
|
|
|
* embedded transmit commands
|
|
|
|
*/
|
|
|
|
cd_write_reg(cy, CD1400_COR2,
|
|
|
|
CD1400_COR2_ETC |
|
|
|
|
(ISSET(t->c_cflag, CRTSCTS) ? CD1400_COR2_CCTS_OFLOW : 0));
|
|
|
|
|
|
|
|
cd_write_reg(cy, CD1400_COR3, RX_FIFO_THRESHOLD);
|
|
|
|
|
|
|
|
cd1400_channel_cmd(cy,
|
|
|
|
CD1400_CCR_CMDCORCHG |
|
|
|
|
CD1400_CCR_COR1 | CD1400_CCR_COR2 | CD1400_CCR_COR3);
|
|
|
|
|
|
|
|
cd_write_reg(cy, CD1400_COR4, CD1400_COR4_PFO_EXCEPTION);
|
|
|
|
cd_write_reg(cy, CD1400_COR5, 0);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* set modem change option registers to generate interrupts
|
|
|
|
* on carrier detect changes.
|
|
|
|
*
|
|
|
|
* if hardware RTS handshaking is used (CY_HW_RTS, DTR and RTS lines
|
|
|
|
* exchanged), also set the handshaking threshold.
|
|
|
|
*/
|
|
|
|
#ifdef CY_HW_RTS
|
|
|
|
cd_write_reg(cy, CD1400_MCOR1, CD1400_MCOR1_CDzd |
|
|
|
|
(ISSET(t->c_cflag, CRTSCTS) ? RX_DTR_THRESHOLD : 0));
|
|
|
|
#else
|
|
|
|
cd_write_reg(cy, CD1400_MCOR1, CD1400_MCOR1_CDzd);
|
|
|
|
#endif /* CY_HW_RTS */
|
|
|
|
|
|
|
|
cd_write_reg(cy, CD1400_MCOR2, CD1400_MCOR2_CDod);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* set receive timeout to approx. 2ms
|
|
|
|
* could use more complex logic here...
|
|
|
|
* (but is it actually needed or even useful?)
|
|
|
|
*/
|
|
|
|
cd_write_reg(cy, CD1400_RTPR, 2);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* should do anything else here?
|
|
|
|
* XXX check MDMBUF handshaking like in com.c?
|
|
|
|
*/
|
|
|
|
|
|
|
|
splx(s);
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* set/get modem line status
|
|
|
|
*
|
|
|
|
* bits can be: TIOCM_DTR, TIOCM_RTS, TIOCM_CTS, TIOCM_CD, TIOCM_RI, TIOCM_DSR
|
|
|
|
*
|
|
|
|
* RTS and DTR are exchanged if CY_HW_RTS is set
|
|
|
|
*
|
|
|
|
*/
|
|
|
|
int
|
|
|
|
cy_modem_control(struct cy_port *cy, int bits, int howto)
|
|
|
|
{
|
|
|
|
int s, msvr;
|
|
|
|
|
|
|
|
s = spltty();
|
|
|
|
|
|
|
|
/* select channel */
|
|
|
|
cd_write_reg(cy, CD1400_CAR, cy->cy_port_num & CD1400_CAR_CHAN);
|
|
|
|
|
|
|
|
/* does not manipulate RTS if it is used for flow control */
|
|
|
|
switch (howto) {
|
|
|
|
case DMGET:
|
|
|
|
bits = 0;
|
|
|
|
if (cy->cy_channel_control & CD1400_CCR_RCVEN)
|
|
|
|
bits |= TIOCM_LE;
|
|
|
|
msvr = cd_read_reg(cy, CD1400_MSVR2);
|
|
|
|
#ifdef CY_HW_RTS
|
|
|
|
if (cd_read_reg(cy, CD1400_MSVR1) & CD1400_MSVR1_RTS)
|
|
|
|
bits |= TIOCM_DTR;
|
|
|
|
if (msvr & CD1400_MSVR2_DTR)
|
|
|
|
bits |= TIOCM_RTS;
|
|
|
|
#else
|
|
|
|
if (cd_read_reg(cy, CD1400_MSVR1) & CD1400_MSVR1_RTS)
|
|
|
|
bits |= TIOCM_RTS;
|
|
|
|
if (msvr & CD1400_MSVR2_DTR)
|
|
|
|
bits |= TIOCM_DTR;
|
|
|
|
#endif /* CY_HW_RTS */
|
|
|
|
if (msvr & CD1400_MSVR2_CTS)
|
|
|
|
bits |= TIOCM_CTS;
|
|
|
|
if (msvr & CD1400_MSVR2_CD)
|
|
|
|
bits |= TIOCM_CD;
|
|
|
|
if (msvr & CD1400_MSVR2_DSR) /* not connected on some
|
|
|
|
Cyclom cards? */
|
|
|
|
bits |= TIOCM_DSR;
|
|
|
|
if (msvr & CD1400_MSVR2_RI) /* not connected on
|
|
|
|
Cyclom-8Y cards? */
|
|
|
|
bits |= TIOCM_RI;
|
|
|
|
splx(s);
|
|
|
|
return (bits);
|
|
|
|
|
|
|
|
case DMSET: /* replace old values with new ones */
|
|
|
|
#ifdef CY_HW_RTS
|
|
|
|
if (!ISSET(cy->cy_tty->t_cflag, CRTSCTS))
|
|
|
|
cd_write_reg(cy, CD1400_MSVR2,
|
|
|
|
((bits & TIOCM_RTS) ? CD1400_MSVR2_DTR : 0));
|
|
|
|
cd_write_reg(cy, CD1400_MSVR1,
|
|
|
|
((bits & TIOCM_DTR) ? CD1400_MSVR1_RTS : 0));
|
|
|
|
#else
|
|
|
|
if (!ISSET(cy->cy_tty->t_cflag, CRTSCTS))
|
|
|
|
cd_write_reg(cy, CD1400_MSVR1,
|
|
|
|
((bits & TIOCM_RTS) ? CD1400_MSVR1_RTS : 0));
|
|
|
|
cd_write_reg(cy, CD1400_MSVR2,
|
|
|
|
((bits & TIOCM_DTR) ? CD1400_MSVR2_DTR : 0));
|
|
|
|
#endif /* CY_HW_RTS */
|
|
|
|
break;
|
|
|
|
|
|
|
|
case DMBIS: /* set bits */
|
|
|
|
#ifdef CY_HW_RTS
|
|
|
|
if (!ISSET(cy->cy_tty->t_cflag, CRTSCTS) &&
|
|
|
|
(bits & TIOCM_RTS) != 0)
|
|
|
|
cd_write_reg(cy, CD1400_MSVR2, CD1400_MSVR2_DTR);
|
|
|
|
if (bits & TIOCM_DTR)
|
|
|
|
cd_write_reg(cy, CD1400_MSVR1, CD1400_MSVR1_RTS);
|
|
|
|
#else
|
|
|
|
if (!ISSET(cy->cy_tty->t_cflag, CRTSCTS) &&
|
|
|
|
(bits & TIOCM_RTS) != 0)
|
|
|
|
cd_write_reg(cy, CD1400_MSVR1, CD1400_MSVR1_RTS);
|
|
|
|
if (bits & TIOCM_DTR)
|
|
|
|
cd_write_reg(cy, CD1400_MSVR2, CD1400_MSVR2_DTR);
|
|
|
|
#endif /* CY_HW_RTS */
|
|
|
|
break;
|
|
|
|
|
|
|
|
case DMBIC: /* clear bits */
|
|
|
|
#ifdef CY_HW_RTS
|
|
|
|
if (!ISSET(cy->cy_tty->t_cflag, CRTSCTS) &&
|
|
|
|
(bits & TIOCM_RTS))
|
|
|
|
cd_write_reg(cy, CD1400_MSVR2, 0);
|
|
|
|
if (bits & TIOCM_DTR)
|
|
|
|
cd_write_reg(cy, CD1400_MSVR1, 0);
|
|
|
|
#else
|
|
|
|
if (!ISSET(cy->cy_tty->t_cflag, CRTSCTS) &&
|
|
|
|
(bits & TIOCM_RTS))
|
|
|
|
cd_write_reg(cy, CD1400_MSVR1, 0);
|
|
|
|
if (bits & TIOCM_DTR)
|
|
|
|
cd_write_reg(cy, CD1400_MSVR2, 0);
|
|
|
|
#endif /* CY_HW_RTS */
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
splx(s);
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Upper-level handler loop (called from timer interrupt?)
|
|
|
|
* This routine is common for multiple cards
|
|
|
|
*/
|
|
|
|
void
|
|
|
|
cy_poll(void *arg)
|
|
|
|
{
|
|
|
|
int port;
|
|
|
|
struct cy_softc *sc = arg;
|
|
|
|
struct cy_port *cy;
|
|
|
|
struct tty *tp;
|
|
|
|
static int counter = 0;
|
|
|
|
#ifdef CY_DEBUG1
|
|
|
|
int did_something;
|
|
|
|
#endif
|
|
|
|
|
|
|
|
int s;
|
|
|
|
|
|
|
|
s = spltty();
|
|
|
|
|
|
|
|
if (sc->sc_events == 0 && ++counter < 200) {
|
|
|
|
splx(s);
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
|
|
|
sc->sc_events = 0;
|
|
|
|
splx(s);
|
|
|
|
|
|
|
|
#ifdef CY_DEBUG1
|
|
|
|
sc->sc_poll_count1++;
|
|
|
|
did_something = 0;
|
|
|
|
#endif
|
|
|
|
|
|
|
|
for (port = 0; port < sc->sc_nports; port++) {
|
|
|
|
cy = &sc->sc_ports[port];
|
|
|
|
if ((tp = cy->cy_tty) == NULL || cy->cy_ibuf == NULL ||
|
|
|
|
!ISSET(tp->t_state, TS_ISOPEN | TS_WOPEN))
|
|
|
|
continue;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* handle received data
|
|
|
|
*/
|
|
|
|
while (cy->cy_ibuf_rd_ptr != cy->cy_ibuf_wr_ptr) {
|
|
|
|
u_char line_stat;
|
|
|
|
int chr;
|
|
|
|
|
|
|
|
line_stat = cy->cy_ibuf_rd_ptr[0];
|
|
|
|
chr = cy->cy_ibuf_rd_ptr[1];
|
|
|
|
|
|
|
|
if (line_stat &
|
|
|
|
(CD1400_RDSR_BREAK|CD1400_RDSR_FE))
|
|
|
|
chr |= TTY_FE;
|
|
|
|
if (line_stat & CD1400_RDSR_PE)
|
|
|
|
chr |= TTY_PE;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* on an overrun error the data is treated as
|
|
|
|
* good just as it should be.
|
|
|
|
*/
|
|
|
|
|
|
|
|
#ifdef CY_DEBUG
|
|
|
|
printf("%s port %d ttyinput 0x%x\n",
|
|
|
|
sc->sc_dev.dv_xname, port, chr);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
(*linesw[tp->t_line].l_rint)(chr, tp);
|
|
|
|
|
|
|
|
s = spltty(); /* really necessary? */
|
|
|
|
if ((cy->cy_ibuf_rd_ptr += 2) ==
|
|
|
|
cy->cy_ibuf_end)
|
|
|
|
cy->cy_ibuf_rd_ptr = cy->cy_ibuf;
|
|
|
|
splx(s);
|
|
|
|
|
|
|
|
#ifdef CY_DEBUG1
|
|
|
|
did_something = 1;
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifndef CY_HW_RTS
|
|
|
|
/*
|
|
|
|
* If we don't have any received data in ibuf and
|
|
|
|
* CRTSCTS is on and RTS is turned off, it is time
|
|
|
|
* to turn RTS back on
|
|
|
|
*/
|
|
|
|
if (ISSET(tp->t_cflag, CRTSCTS)) {
|
|
|
|
/* we can't use cy_modem_control() here as it
|
|
|
|
doesn't change RTS if RTSCTS is on */
|
|
|
|
cd_write_reg(cy, CD1400_CAR,
|
|
|
|
port & CD1400_CAR_CHAN);
|
2023-07-10 00:10:46 +00:00
|
|
|
|
2023-04-30 01:15:27 +00:00
|
|
|
if ((cd_read_reg(cy,
|
|
|
|
CD1400_MSVR1) & CD1400_MSVR1_RTS) == 0) {
|
|
|
|
cd_write_reg(cy, CD1400_MSVR1,
|
|
|
|
CD1400_MSVR1_RTS);
|
|
|
|
#ifdef CY_DEBUG1
|
|
|
|
did_something = 1;
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
}
|
|
|
|
#endif /* CY_HW_RTS */
|
|
|
|
|
|
|
|
/*
|
|
|
|
* handle carrier changes
|
|
|
|
*/
|
|
|
|
s = spltty();
|
|
|
|
if (ISSET(cy->cy_flags, CYF_CARRIER_CHANGED)) {
|
|
|
|
int carrier;
|
|
|
|
|
|
|
|
CLR(cy->cy_flags, CYF_CARRIER_CHANGED);
|
|
|
|
splx(s);
|
|
|
|
|
|
|
|
carrier = ((cy->cy_carrier_stat &
|
|
|
|
CD1400_MSVR2_CD) != 0);
|
|
|
|
|
|
|
|
#ifdef CY_DEBUG
|
|
|
|
printf("%s: cy_poll: carrier change "
|
|
|
|
"(port %d, carrier %d)\n",
|
|
|
|
sc->sc_dev.dv_xname, port, carrier);
|
|
|
|
#endif
|
|
|
|
if (CY_DIALIN(tp->t_dev) &&
|
|
|
|
!(*linesw[tp->t_line].l_modem)(tp, carrier))
|
|
|
|
cy_modem_control(cy, TIOCM_DTR, DMBIC);
|
|
|
|
|
|
|
|
#ifdef CY_DEBUG1
|
|
|
|
did_something = 1;
|
|
|
|
#endif
|
|
|
|
} else {
|
|
|
|
splx(s);
|
|
|
|
}
|
|
|
|
|
|
|
|
s = spltty();
|
|
|
|
if (ISSET(cy->cy_flags, CYF_START)) {
|
|
|
|
CLR(cy->cy_flags, CYF_START);
|
|
|
|
splx(s);
|
|
|
|
|
|
|
|
(*linesw[tp->t_line].l_start)(tp);
|
|
|
|
|
|
|
|
#ifdef CY_DEBUG1
|
|
|
|
did_something = 1;
|
|
|
|
#endif
|
|
|
|
} else {
|
|
|
|
splx(s);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* could move this to even upper level... */
|
|
|
|
if (cy->cy_fifo_overruns) {
|
|
|
|
cy->cy_fifo_overruns = 0;
|
|
|
|
/* doesn't report overrun count,
|
|
|
|
but shouldn't really matter */
|
|
|
|
log(LOG_WARNING, "%s: port %d fifo overrun\n",
|
|
|
|
sc->sc_dev.dv_xname, port);
|
|
|
|
}
|
|
|
|
if (cy->cy_ibuf_overruns) {
|
|
|
|
cy->cy_ibuf_overruns = 0;
|
|
|
|
log(LOG_WARNING, "%s: port %d ibuf overrun\n",
|
|
|
|
sc->sc_dev.dv_xname, port);
|
|
|
|
}
|
|
|
|
} /* for(port...) */
|
|
|
|
#ifdef CY_DEBUG1
|
|
|
|
if (did_something && counter >= 200)
|
|
|
|
sc->sc_poll_count2++;
|
|
|
|
#endif
|
|
|
|
|
|
|
|
counter = 0;
|
|
|
|
|
|
|
|
out:
|
|
|
|
timeout_add(&sc->sc_poll_to, 1);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* hardware interrupt routine
|
|
|
|
*/
|
|
|
|
int
|
|
|
|
cy_intr(void *arg)
|
|
|
|
{
|
|
|
|
struct cy_softc *sc = arg;
|
|
|
|
struct cy_port *cy;
|
|
|
|
int cy_chip, stat;
|
|
|
|
int int_serviced = -1;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Check interrupt status of each CD1400 chip on this card
|
|
|
|
* (multiple cards cannot share the same interrupt)
|
|
|
|
*/
|
|
|
|
for (cy_chip = 0; cy_chip < sc->sc_nr_cd1400s; cy_chip++) {
|
|
|
|
|
|
|
|
stat = cd_read_reg_sc(sc, cy_chip, CD1400_SVRR);
|
|
|
|
if (stat == 0)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
if (ISSET(stat, CD1400_SVRR_RXRDY)) {
|
|
|
|
u_char save_car, save_rir, serv_type;
|
|
|
|
u_char line_stat, recv_data, n_chars;
|
|
|
|
u_char *buf_p;
|
|
|
|
|
|
|
|
save_rir = cd_read_reg_sc(sc, cy_chip, CD1400_RIR);
|
|
|
|
save_car = cd_read_reg_sc(sc, cy_chip, CD1400_CAR);
|
|
|
|
/* enter rx service */
|
|
|
|
cd_write_reg_sc(sc, cy_chip, CD1400_CAR, save_rir);
|
|
|
|
|
|
|
|
serv_type = cd_read_reg_sc(sc, cy_chip, CD1400_RIVR);
|
|
|
|
cy = &sc->sc_ports[serv_type >> 3];
|
|
|
|
|
|
|
|
#ifdef CY_DEBUG1
|
|
|
|
cy->cy_rx_int_count++;
|
|
|
|
#endif
|
|
|
|
|
|
|
|
buf_p = cy->cy_ibuf_wr_ptr;
|
|
|
|
|
|
|
|
if (ISSET(serv_type, CD1400_RIVR_EXCEPTION)) {
|
|
|
|
line_stat = cd_read_reg(cy, CD1400_RDSR);
|
|
|
|
recv_data = cd_read_reg(cy, CD1400_RDSR);
|
|
|
|
|
|
|
|
if (cy->cy_tty == NULL ||
|
|
|
|
!ISSET(cy->cy_tty->t_state, TS_ISOPEN))
|
|
|
|
goto end_rx_serv;
|
|
|
|
|
|
|
|
#ifdef CY_DEBUG
|
|
|
|
printf("%s port %d recv exception, "
|
|
|
|
"line_stat 0x%x, char 0x%x\n",
|
|
|
|
sc->sc_dev.dv_xname, cy->cy_port_num,
|
|
|
|
line_stat, recv_data);
|
|
|
|
#endif
|
|
|
|
if (ISSET(line_stat, CD1400_RDSR_OE))
|
|
|
|
cy->cy_fifo_overruns++;
|
|
|
|
|
|
|
|
*buf_p++ = line_stat;
|
|
|
|
*buf_p++ = recv_data;
|
|
|
|
if (buf_p == cy->cy_ibuf_end)
|
|
|
|
buf_p = cy->cy_ibuf;
|
|
|
|
|
|
|
|
if (buf_p == cy->cy_ibuf_rd_ptr) {
|
|
|
|
if (buf_p == cy->cy_ibuf)
|
|
|
|
buf_p = cy->cy_ibuf_end;
|
|
|
|
buf_p -= 2;
|
|
|
|
cy->cy_ibuf_overruns++;
|
|
|
|
}
|
|
|
|
sc->sc_events = 1;
|
|
|
|
} else { /* no exception, received data OK */
|
|
|
|
n_chars = cd_read_reg(cy, CD1400_RDCR);
|
|
|
|
|
|
|
|
/* If no tty or not open, discard data */
|
|
|
|
if (cy->cy_tty == NULL ||
|
|
|
|
!ISSET(cy->cy_tty->t_state, TS_ISOPEN)) {
|
|
|
|
while (n_chars--)
|
|
|
|
cd_read_reg(cy, CD1400_RDSR);
|
|
|
|
goto end_rx_serv;
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef CY_DEBUG
|
|
|
|
printf("%s port %d receive ok %d chars\n",
|
|
|
|
sc->sc_dev.dv_xname, cy->cy_port_num,
|
|
|
|
n_chars);
|
|
|
|
#endif
|
|
|
|
while (n_chars--) {
|
|
|
|
*buf_p++ = 0; /* status: OK */
|
|
|
|
*buf_p++ = cd_read_reg(cy,
|
|
|
|
CD1400_RDSR); /* data byte */
|
|
|
|
if (buf_p == cy->cy_ibuf_end)
|
|
|
|
buf_p = cy->cy_ibuf;
|
|
|
|
if (buf_p == cy->cy_ibuf_rd_ptr) {
|
|
|
|
if (buf_p == cy->cy_ibuf)
|
|
|
|
buf_p = cy->cy_ibuf_end;
|
|
|
|
buf_p -= 2;
|
|
|
|
cy->cy_ibuf_overruns++;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
sc->sc_events = 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
cy->cy_ibuf_wr_ptr = buf_p;
|
|
|
|
|
|
|
|
#ifndef CY_HW_RTS
|
|
|
|
/* RTS handshaking for incoming data */
|
|
|
|
if (ISSET(cy->cy_tty->t_cflag, CRTSCTS)) {
|
|
|
|
int bf;
|
|
|
|
|
|
|
|
bf = buf_p - cy->cy_ibuf_rd_ptr;
|
|
|
|
if (bf < 0)
|
|
|
|
bf += IBUF_SIZE;
|
|
|
|
|
|
|
|
if (bf > (IBUF_SIZE/2)) /* turn RTS off */
|
|
|
|
cd_write_reg(cy, CD1400_MSVR1, 0);
|
|
|
|
}
|
|
|
|
#endif /* CY_HW_RTS */
|
|
|
|
|
|
|
|
end_rx_serv:
|
|
|
|
/* terminate service context */
|
|
|
|
cd_write_reg(cy, CD1400_RIR, save_rir & 0x3f);
|
|
|
|
cd_write_reg(cy, CD1400_CAR, save_car);
|
|
|
|
int_serviced = 1;
|
|
|
|
} /* if(rx_service...) */
|
|
|
|
|
|
|
|
if (ISSET(stat, CD1400_SVRR_MDMCH)) {
|
|
|
|
u_char save_car, save_mir, serv_type, modem_stat;
|
|
|
|
|
|
|
|
save_mir = cd_read_reg_sc(sc, cy_chip, CD1400_MIR);
|
|
|
|
save_car = cd_read_reg_sc(sc, cy_chip, CD1400_CAR);
|
|
|
|
/* enter modem service */
|
|
|
|
cd_write_reg_sc(sc, cy_chip, CD1400_CAR, save_mir);
|
|
|
|
|
|
|
|
serv_type = cd_read_reg_sc(sc, cy_chip, CD1400_MIVR);
|
|
|
|
cy = &sc->sc_ports[serv_type >> 3];
|
|
|
|
|
|
|
|
#ifdef CY_DEBUG1
|
|
|
|
cy->cy_modem_int_count++;
|
|
|
|
#endif
|
|
|
|
|
|
|
|
modem_stat = cd_read_reg(cy, CD1400_MSVR2);
|
|
|
|
|
|
|
|
#ifdef CY_DEBUG
|
|
|
|
printf("%s port %d modem line change, new stat 0x%x\n",
|
|
|
|
sc->sc_dev.dv_xname, cy->cy_port_num, modem_stat);
|
|
|
|
#endif
|
|
|
|
if (ISSET((cy->cy_carrier_stat ^ modem_stat),
|
|
|
|
CD1400_MSVR2_CD)) {
|
|
|
|
SET(cy->cy_flags, CYF_CARRIER_CHANGED);
|
|
|
|
sc->sc_events = 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
cy->cy_carrier_stat = modem_stat;
|
|
|
|
|
|
|
|
/* terminate service context */
|
|
|
|
cd_write_reg(cy, CD1400_MIR, save_mir & 0x3f);
|
|
|
|
cd_write_reg(cy, CD1400_CAR, save_car);
|
|
|
|
int_serviced = 1;
|
|
|
|
} /* if(modem_service...) */
|
|
|
|
|
|
|
|
if (ISSET(stat, CD1400_SVRR_TXRDY)) {
|
|
|
|
u_char save_car, save_tir, serv_type, count, ch;
|
|
|
|
struct tty *tp;
|
|
|
|
|
|
|
|
save_tir = cd_read_reg_sc(sc, cy_chip, CD1400_TIR);
|
|
|
|
save_car = cd_read_reg_sc(sc, cy_chip, CD1400_CAR);
|
|
|
|
/* enter tx service */
|
|
|
|
cd_write_reg_sc(sc, cy_chip, CD1400_CAR, save_tir);
|
|
|
|
|
|
|
|
serv_type = cd_read_reg_sc(sc, cy_chip, CD1400_TIVR);
|
|
|
|
cy = &sc->sc_ports[serv_type >> 3];
|
|
|
|
|
|
|
|
#ifdef CY_DEBUG1
|
|
|
|
cy->cy_tx_int_count++;
|
|
|
|
#endif
|
|
|
|
#ifdef CY_DEBUG
|
|
|
|
printf("%s port %d tx service\n", sc->sc_dev.dv_xname,
|
|
|
|
cy->cy_port_num);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/* stop transmitting if no tty or CYF_STOP set */
|
|
|
|
tp = cy->cy_tty;
|
|
|
|
if (tp == NULL || ISSET(cy->cy_flags, CYF_STOP))
|
|
|
|
goto txdone;
|
|
|
|
|
|
|
|
count = 0;
|
|
|
|
if (ISSET(cy->cy_flags, CYF_SEND_NUL)) {
|
|
|
|
cd_write_reg(cy, CD1400_TDR, 0);
|
|
|
|
cd_write_reg(cy, CD1400_TDR, 0);
|
|
|
|
count += 2;
|
|
|
|
CLR(cy->cy_flags, CYF_SEND_NUL);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (tp->t_outq.c_cc > 0) {
|
|
|
|
SET(tp->t_state, TS_BUSY);
|
|
|
|
while (tp->t_outq.c_cc > 0 &&
|
|
|
|
count < CD1400_TX_FIFO_SIZE) {
|
|
|
|
ch = getc(&tp->t_outq);
|
|
|
|
/* remember to double NUL characters
|
|
|
|
because embedded transmit commands
|
|
|
|
are enabled */
|
|
|
|
if (ch == 0) {
|
|
|
|
if (count >=
|
|
|
|
CD1400_TX_FIFO_SIZE-2) {
|
|
|
|
SET(cy->cy_flags,
|
|
|
|
CYF_SEND_NUL);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
cd_write_reg(cy, CD1400_TDR, ch);
|
|
|
|
count++;
|
|
|
|
}
|
|
|
|
|
|
|
|
cd_write_reg(cy, CD1400_TDR, ch);
|
|
|
|
count++;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
/* no data to send -- check if we should
|
|
|
|
start/stop a break */
|
|
|
|
/* XXX does this cause too much delay before
|
|
|
|
breaks? */
|
|
|
|
if (ISSET(cy->cy_flags, CYF_START_BREAK)) {
|
|
|
|
cd_write_reg(cy, CD1400_TDR, 0);
|
|
|
|
cd_write_reg(cy, CD1400_TDR, 0x81);
|
|
|
|
CLR(cy->cy_flags, CYF_START_BREAK);
|
|
|
|
}
|
|
|
|
if (ISSET(cy->cy_flags, CYF_END_BREAK)) {
|
|
|
|
cd_write_reg(cy, CD1400_TDR, 0);
|
|
|
|
cd_write_reg(cy, CD1400_TDR, 0x83);
|
|
|
|
CLR(cy->cy_flags, CYF_END_BREAK);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (tp->t_outq.c_cc == 0) {
|
|
|
|
txdone:
|
|
|
|
/*
|
|
|
|
* No data to send or requested to stop.
|
|
|
|
* Disable transmit interrupt
|
|
|
|
*/
|
|
|
|
cd_write_reg(cy, CD1400_SRER,
|
|
|
|
cd_read_reg(cy, CD1400_SRER)
|
|
|
|
& ~CD1400_SRER_TXRDY);
|
|
|
|
CLR(cy->cy_flags, CYF_STOP);
|
|
|
|
CLR(tp->t_state, TS_BUSY);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (tp->t_outq.c_cc <= tp->t_lowat) {
|
|
|
|
SET(cy->cy_flags, CYF_START);
|
|
|
|
sc->sc_events = 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* terminate service context */
|
|
|
|
cd_write_reg(cy, CD1400_TIR, save_tir & 0x3f);
|
|
|
|
cd_write_reg(cy, CD1400_CAR, save_car);
|
|
|
|
int_serviced = 1;
|
|
|
|
} /* if(tx_service...) */
|
|
|
|
} /* for(...all CD1400s on a card) */
|
|
|
|
|
|
|
|
/* ensure an edge for next interrupt */
|
|
|
|
bus_space_write_1(sc->sc_memt, sc->sc_memh,
|
|
|
|
CY_CLEAR_INTR<<sc->sc_bustype, 0);
|
|
|
|
return (int_serviced);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* subroutine to enable CD1400 transmitter
|
|
|
|
*/
|
|
|
|
void
|
|
|
|
cy_enable_transmitter(struct cy_port *cy)
|
|
|
|
{
|
|
|
|
int s;
|
|
|
|
s = spltty();
|
|
|
|
cd_write_reg(cy, CD1400_CAR, cy->cy_port_num & CD1400_CAR_CHAN);
|
|
|
|
cd_write_reg(cy, CD1400_SRER, cd_read_reg(cy, CD1400_SRER)
|
|
|
|
| CD1400_SRER_TXRDY);
|
|
|
|
splx(s);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Execute a CD1400 channel command
|
|
|
|
*/
|
|
|
|
void
|
|
|
|
cd1400_channel_cmd(struct cy_port *cy, int cmd)
|
|
|
|
{
|
|
|
|
u_int waitcnt = 5 * 8 * 1024; /* approx 5 ms */
|
|
|
|
|
|
|
|
#ifdef CY_DEBUG
|
|
|
|
printf("c1400_channel_cmd cy %p command 0x%x\n", cy, cmd);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/* wait until cd1400 is ready to process a new command */
|
|
|
|
while (cd_read_reg(cy, CD1400_CCR) != 0 && waitcnt-- > 0)
|
|
|
|
;
|
|
|
|
|
|
|
|
if (waitcnt == 0)
|
|
|
|
log(LOG_ERR, "cy: channel command timeout\n");
|
|
|
|
|
|
|
|
cd_write_reg(cy, CD1400_CCR, cmd);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Compute clock option register and baud rate register values
|
|
|
|
* for a given speed. Return 0 on success, -1 on failure.
|
|
|
|
*
|
|
|
|
* The error between requested and actual speed seems
|
|
|
|
* to be well within allowed limits (less than 3%)
|
|
|
|
* with every speed value between 50 and 150000 bps.
|
|
|
|
*/
|
|
|
|
int
|
|
|
|
cy_speed(speed_t speed, int *cor, int *bpr, int cy_clock)
|
|
|
|
{
|
|
|
|
int c, co, br;
|
|
|
|
|
|
|
|
if (speed < 50 || speed > 150000)
|
|
|
|
return (-1);
|
|
|
|
|
|
|
|
for (c = 0, co = 8; co <= 2048; co <<= 2, c++) {
|
|
|
|
br = (cy_clock + (co * speed) / 2) / (co * speed);
|
|
|
|
if (br < 0x100) {
|
|
|
|
*bpr = br;
|
|
|
|
*cor = c;
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return (-1);
|
|
|
|
}
|