52 lines
2.5 KiB
Text
52 lines
2.5 KiB
Text
Index: v8/src/wasm/jump-table-assembler.cc
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--- v8/src/wasm/jump-table-assembler.cc.orig
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+++ v8/src/wasm/jump-table-assembler.cc
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@@ -52,15 +52,21 @@ void JumpTableAssembler::InitializeJumpsToLazyCompileT
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#if V8_TARGET_ARCH_X64
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void JumpTableAssembler::EmitLazyCompileJumpSlot(uint32_t func_index,
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Address lazy_compile_target) {
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+ intptr_t displacement =
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+ static_cast<intptr_t>(reinterpret_cast<uint8_t*>(lazy_compile_target) -
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+ (pc_ + 9) - kNearJmpInstrSize);
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+ if (!is_int32(displacement)) return;
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+ CodeEntry(); // 4 bytes
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// Use a push, because mov to an extended register takes 6 bytes.
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- pushq_imm32(func_index); // 5 bytes
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- EmitJumpSlot(lazy_compile_target); // 5 bytes
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+ pushq_imm32(func_index); // 5 bytes
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+ near_jmp(displacement, RelocInfo::NO_INFO); // 5 bytes
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}
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bool JumpTableAssembler::EmitJumpSlot(Address target) {
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intptr_t displacement = static_cast<intptr_t>(
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- reinterpret_cast<uint8_t*>(target) - pc_ - kNearJmpInstrSize);
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+ reinterpret_cast<uint8_t*>(target) - (pc_ + 4) - kNearJmpInstrSize);
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if (!is_int32(displacement)) return false;
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+ CodeEntry(); // 4 bytes
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near_jmp(displacement, RelocInfo::NO_INFO); // 5 bytes
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return true;
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}
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@@ -68,11 +74,12 @@ bool JumpTableAssembler::EmitJumpSlot(Address target)
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void JumpTableAssembler::EmitFarJumpSlot(Address target) {
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Label data;
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int start_offset = pc_offset();
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+ CodeEntry(); // 4 bytes
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jmp(Operand(&data)); // 6 bytes
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- Nop(2); // 2 bytes
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+ Nop(6); // 6 bytes
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// The data must be properly aligned, so it can be patched atomically (see
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// {PatchFarJumpSlot}).
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- DCHECK_EQ(start_offset + kSystemPointerSize, pc_offset());
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+ DCHECK_EQ(start_offset + kFarJumpTableSlotOffset, pc_offset());
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USE(start_offset);
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bind(&data);
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dq(target); // 8 bytes
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@@ -83,7 +90,7 @@ void JumpTableAssembler::PatchFarJumpSlot(Address slot
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// The slot needs to be pointer-size aligned so we can atomically update it.
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DCHECK(IsAligned(slot, kSystemPointerSize));
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// Offset of the target is at 8 bytes, see {EmitFarJumpSlot}.
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- reinterpret_cast<std::atomic<Address>*>(slot + kSystemPointerSize)
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+ reinterpret_cast<std::atomic<Address>*>(slot + kFarJumpTableSlotOffset)
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->store(target, std::memory_order_relaxed);
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// The update is atomic because the address is properly aligned.
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// Because of cache coherence, the data update will eventually be seen by all
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