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As we discussed in the last meeting, we reset the ports tree and began from scratch, even though this change involves porting all the packages. Starting small and growing gradually, this approach will reduce build times and consequently lower energy consumption in a world affected by climate change. We will add new ports as users needs arise; ok h3artbl33d@

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This commit is contained in:
purplerain 2024-05-26 03:08:12 +00:00
parent 83a0aaf92c
commit 9a3af55370
Signed by: purplerain
GPG key ID: F42C07F07E2E35B7
59377 changed files with 98673 additions and 4712155 deletions
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6
devel/llvm/16/Makefile
View file

@ -2,9 +2,9 @@ LLVM_MAJOR = 16
LLVM_VERSION = ${LLVM_MAJOR}.0.6
LLVM_PKGSPEC = >=16,<17
REVISION-main = 8
REVISION-lldb = 2
REVISION-python = 1
REVISION-main = 26
REVISION-lldb = 5
REVISION-python = 2
SHARED_LIBS += LTO 0.0 \
Remarks 0.0 \

27
devel/llvm/16/patches/patch-clang_include_clang_Basic_DiagnosticSemaKinds_td
View file

@ -1,6 +1,15 @@
Index: clang/include/clang/Basic/DiagnosticSemaKinds.td
--- clang/include/clang/Basic/DiagnosticSemaKinds.td.orig
+++ clang/include/clang/Basic/DiagnosticSemaKinds.td
@@ -251,7 +251,7 @@ def warn_deprecated_register : Warning<
"and incompatible with C++17">, InGroup<DeprecatedRegister>;
def ext_register_storage_class : ExtWarn<
"ISO C++17 does not allow 'register' storage class specifier">,
- DefaultError, InGroup<Register>;
+ InGroup<Register>;
def err_invalid_decl_spec_combination : Error<
"cannot combine with previous '%0' declaration specifier">;
@@ -419,7 +419,7 @@ def warn_implicit_function_decl : Warning<
InGroup<ImplicitFunctionDeclare>, DefaultIgnore;
def ext_implicit_function_decl_c99 : ExtWarn<
@ -37,6 +46,24 @@ Index: clang/include/clang/Basic/DiagnosticSemaKinds.td
def warn_param_mismatched_alignment : Warning<
"passing %0-byte aligned argument to %1-byte aligned parameter %2%select{| of %4}3 may result in an unaligned pointer access">,
InGroup<DiagGroup<"align-mismatch">>;
@@ -8113,7 +8113,7 @@ def err_typecheck_convert_pointer_int : Error<
"; remove &}3">;
def ext_typecheck_convert_pointer_int : ExtWarn<
err_typecheck_convert_pointer_int.Summary>,
- InGroup<IntConversion>, DefaultError;
+ InGroup<IntConversion>;
def err_typecheck_convert_int_pointer : Error<
"incompatible integer to pointer conversion "
"%select{%diff{assigning to $ from $|assigning to different types}0,1"
@@ -8133,7 +8133,7 @@ def err_typecheck_convert_int_pointer : Error<
"; remove &}3">;
def ext_typecheck_convert_int_pointer : ExtWarn<
err_typecheck_convert_int_pointer.Summary>,
- InGroup<IntConversion>, DefaultError;
+ InGroup<IntConversion>;
def ext_typecheck_convert_pointer_void_func : Extension<
"%select{%diff{assigning to $ from $|assigning to different types}0,1"
"|%diff{passing $ to parameter of type $|"
@@ -8174,7 +8174,7 @@ def ext_typecheck_convert_incompatible_pointer_sign :
"|%diff{casting $ to type $|casting between types}0,1}2"
" converts between pointers to integer types %select{with different sign|"

16
devel/llvm/16/patches/patch-clang_lib_Driver_ToolChains_Arch_X86_cpp
View file

@ -1,16 +0,0 @@
Index: clang/lib/Driver/ToolChains/Arch/X86.cpp
--- clang/lib/Driver/ToolChains/Arch/X86.cpp.orig
+++ clang/lib/Driver/ToolChains/Arch/X86.cpp
@@ -158,6 +158,12 @@ void x86::getX86TargetFeatures(const Driver &D, const
// consider deprecating this and instead warn if the user requests external
// retpoline thunks and *doesn't* request some form of retpolines.
auto SpectreOpt = clang::driver::options::ID::OPT_INVALID;
+ if (Triple.isOSOpenBSD() && Triple.getArch() == llvm::Triple::x86_64 &&
+ Args.hasFlag(options::OPT_mretpoline, options::OPT_mno_retpoline, true)) {
+ Features.push_back("+retpoline-indirect-calls");
+ Features.push_back("+retpoline-indirect-branches");
+ SpectreOpt = options::OPT_mretpoline;
+ } else
if (Args.hasArgNoClaim(options::OPT_mretpoline, options::OPT_mno_retpoline,
options::OPT_mspeculative_load_hardening,
options::OPT_mno_speculative_load_hardening)) {

50
devel/llvm/16/patches/patch-clang_lib_Driver_ToolChains_Clang_cpp
View file

@ -1,21 +1,43 @@
Index: clang/lib/Driver/ToolChains/Clang.cpp
--- clang/lib/Driver/ToolChains/Clang.cpp.orig
+++ clang/lib/Driver/ToolChains/Clang.cpp
@@ -1610,6 +1610,13 @@ static void CollectARMPACBTIOptions(const ToolChain &T
Args.MakeArgString(Twine("-msign-return-address-key=") + Key));
if (IndirectBranches)
CmdArgs.push_back("-mbranch-target-enforce");
+ else {
+ if (Triple.isOSOpenBSD()) {
@@ -1566,15 +1566,21 @@ void AddUnalignedAccessWarning(ArgStringList &CmdArgs)
static void CollectARMPACBTIOptions(const ToolChain &TC, const ArgList &Args,
ArgStringList &CmdArgs, bool isAArch64) {
+ const llvm::Triple &Triple = TC.getEffectiveTriple();
const Arg *A = isAArch64
? Args.getLastArg(options::OPT_msign_return_address_EQ,
options::OPT_mbranch_protection_EQ)
: Args.getLastArg(options::OPT_mbranch_protection_EQ);
- if (!A)
+ if (!A) {
+ if (Triple.isOSOpenBSD() && isAArch64) {
+ CmdArgs.push_back("-msign-return-address=non-leaf");
+ CmdArgs.push_back("-msign-return-address-key=a_key");
+ CmdArgs.push_back("-mbranch-target-enforce");
+ }
return;
+ }
}
void Clang::AddARMTargetArgs(const llvm::Triple &Triple, const ArgList &Args,
@@ -2536,6 +2543,11 @@ static void CollectArgsForIntegratedAssembler(Compilat
const Driver &D = TC.getDriver();
- const llvm::Triple &Triple = TC.getEffectiveTriple();
if (!(isAArch64 || (Triple.isArmT32() && Triple.isArmMClass())))
D.Diag(diag::warn_incompatible_branch_protection_option)
<< Triple.getArchName();
@@ -1588,7 +1594,10 @@ static void CollectARMPACBTIOptions(const ToolChain &T
D.Diag(diag::err_drv_unsupported_option_argument)
<< A->getSpelling() << Scope;
Key = "a_key";
- IndirectBranches = false;
+ if (Triple.isOSOpenBSD() && isAArch64)
+ IndirectBranches = true;
+ else
+ IndirectBranches = false;
} else {
StringRef DiagMsg;
llvm::ARM::ParsedBranchProtection PBP;
@@ -2536,6 +2545,11 @@ static void CollectArgsForIntegratedAssembler(Compilat
CmdArgs.push_back("-soft-float");
continue;
}
@ -27,7 +49,7 @@ Index: clang/lib/Driver/ToolChains/Clang.cpp
MipsTargetFeature = llvm::StringSwitch<const char *>(Value)
.Case("-mips1", "+mips1")
@@ -5289,9 +5301,12 @@ void Clang::ConstructJob(Compilation &C, const JobActi
@@ -5289,9 +5303,12 @@ void Clang::ConstructJob(Compilation &C, const JobActi
OFastEnabled ? options::OPT_Ofast : options::OPT_fstrict_aliasing;
// We turn strict aliasing off by default if we're in CL mode, since MSVC
// doesn't do any TBAA.
@ -42,7 +64,7 @@ Index: clang/lib/Driver/ToolChains/Clang.cpp
CmdArgs.push_back("-relaxed-aliasing");
if (!Args.hasFlag(options::OPT_fstruct_path_tbaa,
options::OPT_fno_struct_path_tbaa, true))
@@ -6321,7 +6336,8 @@ void Clang::ConstructJob(Compilation &C, const JobActi
@@ -6321,7 +6338,8 @@ void Clang::ConstructJob(Compilation &C, const JobActi
options::OPT_fno_strict_overflow)) {
if (A->getOption().matches(options::OPT_fno_strict_overflow))
CmdArgs.push_back("-fwrapv");
@ -52,7 +74,7 @@ Index: clang/lib/Driver/ToolChains/Clang.cpp
if (Arg *A = Args.getLastArg(options::OPT_freroll_loops,
options::OPT_fno_reroll_loops))
@@ -6342,7 +6358,48 @@ void Clang::ConstructJob(Compilation &C, const JobActi
@@ -6342,7 +6360,48 @@ void Clang::ConstructJob(Compilation &C, const JobActi
Args.addOptInFlag(CmdArgs, options::OPT_mspeculative_load_hardening,
options::OPT_mno_speculative_load_hardening);
@ -102,7 +124,7 @@ Index: clang/lib/Driver/ToolChains/Clang.cpp
RenderSCPOptions(TC, Args, CmdArgs);
RenderTrivialAutoVarInitOptions(D, TC, Args, CmdArgs);
@@ -6417,6 +6474,11 @@ void Clang::ConstructJob(Compilation &C, const JobActi
@@ -6417,6 +6476,11 @@ void Clang::ConstructJob(Compilation &C, const JobActi
if (Arg *A = Args.getLastArg(options::OPT_fcf_protection_EQ)) {
CmdArgs.push_back(
Args.MakeArgString(Twine("-fcf-protection=") + A->getValue()));
@ -114,7 +136,7 @@ Index: clang/lib/Driver/ToolChains/Clang.cpp
}
if (Arg *A = Args.getLastArg(options::OPT_mfunction_return_EQ))
@@ -6895,6 +6957,18 @@ void Clang::ConstructJob(Compilation &C, const JobActi
@@ -6895,6 +6959,18 @@ void Clang::ConstructJob(Compilation &C, const JobActi
options::OPT_fno_rewrite_imports, false);
if (RewriteImports)
CmdArgs.push_back("-frewrite-imports");

13
devel/llvm/16/patches/patch-clang_tools_clang-shlib_CMakeLists_txt Normal file
View file

@ -0,0 +1,13 @@
-Bsymbolic-functions is not supported by our ld.bfd version.
Index: clang/tools/clang-shlib/CMakeLists.txt
--- clang/tools/clang-shlib/CMakeLists.txt.orig
+++ clang/tools/clang-shlib/CMakeLists.txt
@@ -50,6 +50,6 @@ add_clang_library(clang-cpp
${_DEPS})
# Optimize function calls for default visibility definitions to avoid PLT and
# reduce dynamic relocations.
-if (NOT APPLE AND NOT MINGW)
+if (NOT APPLE AND NOT MINGW AND ${OPENBSD_LD_IS_LLD})
target_link_options(clang-cpp PRIVATE LINKER:-Bsymbolic-functions)
endif()

18
devel/llvm/16/patches/patch-lld_CMakeLists_txt
View file

@ -1,7 +1,7 @@
Index: lld/CMakeLists.txt
--- lld/CMakeLists.txt.orig
+++ lld/CMakeLists.txt
@@ -161,6 +161,20 @@ list(INSERT CMAKE_MODULE_PATH 0
@@ -161,6 +161,34 @@ list(INSERT CMAKE_MODULE_PATH 0
include(AddLLD)
@ -18,11 +18,25 @@ Index: lld/CMakeLists.txt
+if (LLD_ENABLE_MACHO)
+ add_definitions("-DLLD_ENABLE_MACHO=1")
+endif()
+
+option(LLD_ENABLE_MINGW
+ "Enable support for MINGW."
+ OFF)
+if (LLD_ENABLE_MINGW)
+ add_definitions("-DLLD_ENABLE_MINGW=1")
+endif()
+
+option(LLD_ENABLE_COFF
+ "Enable support for COFF."
+ OFF)
+if (LLD_ENABLE_COFF)
+ add_definitions("-DLLD_ENABLE_COFF=1")
+endif()
+
option(LLD_USE_VTUNE
"Enable VTune user task tracking."
OFF)
@@ -210,7 +224,9 @@ endif()
@@ -210,7 +238,9 @@ endif()
add_subdirectory(docs)
add_subdirectory(COFF)
add_subdirectory(ELF)

14
devel/llvm/16/patches/patch-lld_ELF_Arch_AArch64_cpp
View file

@ -13,7 +13,17 @@ Index: lld/ELF/Arch/AArch64.cpp
// A BTI (Branch Target Indicator) Plt Entry is only required if the
// address of the PLT entry can be taken by the program, which permits an
// indirect jump to the PLT entry. This can happen when the address
@@ -936,6 +940,10 @@ void AArch64BtiPac::writePlt(uint8_t *buf, const Symbo
@@ -912,7 +916,8 @@ void AArch64BtiPac::writePlt(uint8_t *buf, const Symbo
// escape to shared objects. isInIplt indicates a non-preemptible ifunc. Its
// address may escape if referenced by a direct relocation. The condition is
// conservative.
- bool hasBti = btiHeader && (sym.hasFlag(NEEDS_COPY) || sym.isInIplt);
+ bool hasBti = btiHeader &&
+ (sym.hasFlag(NEEDS_COPY) || sym.isInIplt || sym.thunkAccessed);
if (hasBti) {
memcpy(buf, btiData, sizeof(btiData));
buf += sizeof(btiData);
@@ -936,6 +941,10 @@ void AArch64BtiPac::writePlt(uint8_t *buf, const Symbo
}
static TargetInfo *getTargetInfo() {
@ -24,7 +34,7 @@ Index: lld/ELF/Arch/AArch64.cpp
if ((config->andFeatures & GNU_PROPERTY_AARCH64_FEATURE_1_BTI) ||
config->zPacPlt) {
static AArch64BtiPac t;
@@ -943,6 +951,7 @@ static TargetInfo *getTargetInfo() {
@@ -943,6 +952,7 @@ static TargetInfo *getTargetInfo() {
}
static AArch64 t;
return &t;

32
devel/llvm/16/patches/patch-lld_ELF_Arch_RISCV_cpp Normal file
View file

@ -0,0 +1,32 @@
Index: lld/ELF/Arch/RISCV.cpp
--- lld/ELF/Arch/RISCV.cpp.orig
+++ lld/ELF/Arch/RISCV.cpp
@@ -144,7 +144,7 @@ uint32_t RISCV::calcEFlags() const {
target |= EF_RISCV_RVC;
if ((eflags & EF_RISCV_FLOAT_ABI) != (target & EF_RISCV_FLOAT_ABI))
- error(
+ warn(
toString(f) +
": cannot link object files with different floating-point ABI from " +
toString(ctx.objectFiles[0]));
@@ -621,7 +621,7 @@ static bool relax(InputSection &sec) {
// iteration.
DenseMap<const Defined *, uint64_t> valueDelta;
ArrayRef<SymbolAnchor> sa = ArrayRef(aux.anchors);
- uint32_t delta = 0;
+ uint64_t delta = 0;
for (auto [i, r] : llvm::enumerate(sec.relocs())) {
for (; sa.size() && sa[0].offset <= r.offset; sa = sa.slice(1))
if (!sa[0].end)
@@ -688,8 +688,8 @@ static bool relax(InputSection &sec) {
a.d->value -= delta - valueDelta.find(a.d)->second;
}
// Inform assignAddresses that the size has changed.
- if (!isUInt<16>(delta))
- fatal("section size decrease is too large");
+ if (!isUInt<32>(delta))
+ fatal("section size decrease is too large: " + Twine(delta));
sec.bytesDropped = delta;
return changed;
}

19
devel/llvm/16/patches/patch-lld_ELF_Arch_X86_64_cpp
View file

@ -65,3 +65,22 @@ Index: lld/ELF/Arch/X86_64.cpp
}
static TargetInfo *getTargetInfo() {
@@ -1185,6 +1186,10 @@ static TargetInfo *getTargetInfo() {
return &t;
}
+#ifdef __OpenBSD__
+ static IntelIBT t;
+ return &t;
+#else
if (config->andFeatures & GNU_PROPERTY_X86_FEATURE_1_IBT) {
static IntelIBT t;
return &t;
@@ -1192,6 +1197,7 @@ static TargetInfo *getTargetInfo() {
static X86_64 t;
return &t;
+#endif
}
TargetInfo *elf::getX86_64TargetInfo() { return getTargetInfo(); }

62
devel/llvm/16/patches/patch-lld_ELF_Driver_cpp
View file

@ -31,15 +31,7 @@ Index: lld/ELF/Driver.cpp
"nocombreloc",
"nocopyreloc",
"nodefaultlib",
@@ -498,6 +510,7 @@ constexpr const char *knownZFlags[] = {
"nokeep-text-section-prefix",
"nopack-relative-relocs",
"norelro",
+ "noretpolineplt",
"noseparate-code",
"nostart-stop-gc",
"notext",
@@ -1105,8 +1118,6 @@ static void readConfigs(opt::InputArgList &args) {
@@ -1105,8 +1117,6 @@ static void readConfigs(opt::InputArgList &args) {
errorHandler().errorHandlingScript =
args.getLastArgValue(OPT_error_handling_script);
@ -48,7 +40,23 @@ Index: lld/ELF/Driver.cpp
config->exportDynamic =
args.hasFlag(OPT_export_dynamic, OPT_no_export_dynamic, false) ||
args.hasArg(OPT_shared);
@@ -1180,7 +1191,12 @@ static void readConfigs(opt::InputArgList &args) {
@@ -1124,8 +1134,15 @@ static void readConfigs(opt::InputArgList &args) {
config->icf = getICF(args);
config->ignoreDataAddressEquality =
args.hasArg(OPT_ignore_data_address_equality);
+#if defined(__OpenBSD__)
+ // Needed to allow preemption of protected symbols (e.g. memcpy) on at least i386.
config->ignoreFunctionAddressEquality =
+ args.hasFlag(OPT_ignore_function_address_equality,
+ OPT_no_ignore_function_address_equality, true);
+#else
+ config->ignoreFunctionAddressEquality =
args.hasArg(OPT_ignore_function_address_equality);
+#endif
config->init = args.getLastArgValue(OPT_init, "_init");
config->ltoAAPipeline = args.getLastArgValue(OPT_lto_aa_pipeline);
config->ltoCSProfileGenerate = args.hasArg(OPT_lto_cs_profile_generate);
@@ -1180,7 +1197,12 @@ static void readConfigs(opt::InputArgList &args) {
config->orphanHandling = getOrphanHandling(args);
config->outputFile = args.getLastArgValue(OPT_o);
config->packageMetadata = args.getLastArgValue(OPT_package_metadata);
@ -61,7 +69,16 @@ Index: lld/ELF/Driver.cpp
config->printIcfSections =
args.hasFlag(OPT_print_icf_sections, OPT_no_print_icf_sections, false);
config->printGcSections =
@@ -1270,6 +1286,7 @@ static void readConfigs(opt::InputArgList &args) {
@@ -1248,7 +1270,7 @@ static void readConfigs(opt::InputArgList &args) {
config->trace = args.hasArg(OPT_trace);
config->undefined = args::getStrings(args, OPT_undefined);
config->undefinedVersion =
- args.hasFlag(OPT_undefined_version, OPT_no_undefined_version, false);
+ args.hasFlag(OPT_undefined_version, OPT_no_undefined_version, true);
config->unique = args.hasArg(OPT_unique);
config->useAndroidRelrTags = args.hasFlag(
OPT_use_android_relr_tags, OPT_no_use_android_relr_tags, false);
@@ -1270,6 +1292,7 @@ static void readConfigs(opt::InputArgList &args) {
config->zInterpose = hasZOption(args, "interpose");
config->zKeepTextSectionPrefix = getZFlag(
args, "keep-text-section-prefix", "nokeep-text-section-prefix", false);
@ -69,20 +86,7 @@ Index: lld/ELF/Driver.cpp
config->zNodefaultlib = hasZOption(args, "nodefaultlib");
config->zNodelete = hasZOption(args, "nodelete");
config->zNodlopen = hasZOption(args, "nodlopen");
@@ -1277,7 +1294,11 @@ static void readConfigs(opt::InputArgList &args) {
config->zOrigin = hasZOption(args, "origin");
config->zPacPlt = hasZOption(args, "pac-plt");
config->zRelro = getZFlag(args, "relro", "norelro", true);
- config->zRetpolineplt = hasZOption(args, "retpolineplt");
+#ifndef __OpenBSD__
+ config->zRetpolineplt = getZFlag(args, "retpolineplt", "noretpolineplt", false);
+#else
+ config->zRetpolineplt = getZFlag(args, "retpolineplt", "noretpolineplt", true);
+#endif
config->zRodynamic = hasZOption(args, "rodynamic");
config->zSeparate = getZSeparate(args);
config->zShstk = hasZOption(args, "shstk");
@@ -1582,6 +1603,23 @@ static void setConfigs(opt::InputArgList &args) {
@@ -1582,6 +1605,23 @@ static void setConfigs(opt::InputArgList &args) {
args.hasFlag(OPT_toc_optimize, OPT_no_toc_optimize, m == EM_PPC64);
config->pcRelOptimize =
args.hasFlag(OPT_pcrel_optimize, OPT_no_pcrel_optimize, m == EM_PPC64);
@ -106,7 +110,7 @@ Index: lld/ELF/Driver.cpp
}
static bool isFormatBinary(StringRef s) {
@@ -1721,7 +1759,7 @@ void LinkerDriver::inferMachineType() {
@@ -1721,7 +1761,7 @@ void LinkerDriver::inferMachineType() {
}
// Parse -z max-page-size=<value>. The default value is defined by
@ -115,7 +119,7 @@ Index: lld/ELF/Driver.cpp
static uint64_t getMaxPageSize(opt::InputArgList &args) {
uint64_t val = args::getZOptionValue(args, OPT_z, "max-page-size",
target->defaultMaxPageSize);
@@ -1738,7 +1776,7 @@ static uint64_t getMaxPageSize(opt::InputArgList &args
@@ -1738,7 +1778,7 @@ static uint64_t getMaxPageSize(opt::InputArgList &args
}
// Parse -z common-page-size=<value>. The default value is defined by
@ -124,7 +128,7 @@ Index: lld/ELF/Driver.cpp
static uint64_t getCommonPageSize(opt::InputArgList &args) {
uint64_t val = args::getZOptionValue(args, OPT_z, "common-page-size",
target->defaultCommonPageSize);
@@ -1757,6 +1795,16 @@ static uint64_t getCommonPageSize(opt::InputArgList &a
@@ -1757,6 +1797,16 @@ static uint64_t getCommonPageSize(opt::InputArgList &a
return val;
}
@ -141,7 +145,7 @@ Index: lld/ELF/Driver.cpp
// Parses --image-base option.
static std::optional<uint64_t> getImageBase(opt::InputArgList &args) {
// Because we are using "Config->maxPageSize" here, this function has to be
@@ -2784,6 +2832,11 @@ void LinkerDriver::link(opt::InputArgList &args) {
@@ -2784,6 +2834,11 @@ void LinkerDriver::link(opt::InputArgList &args) {
// optimizations such as DATA_SEGMENT_ALIGN in linker scripts. LLD's use of it
// is limited to writing trap instructions on the last executable segment.
config->commonPageSize = getCommonPageSize(args);

10
devel/llvm/16/patches/patch-lld_ELF_InputFiles_cpp
View file

@ -10,13 +10,15 @@ Index: lld/ELF/InputFiles.cpp
// Returns "<internal>", "foo.a(bar.o)" or "baz.o".
std::string lld::toString(const InputFile *f) {
static std::mutex mu;
@@ -63,6 +65,17 @@ std::string lld::toString(const InputFile *f) {
@@ -63,6 +65,19 @@ std::string lld::toString(const InputFile *f) {
return std::string(f->toStringCache);
}
+// .gnu.warning.SYMBOL are treated as warning symbols for the given symbol
+void lld::parseGNUWarning(StringRef name, ArrayRef<char> data, size_t size) {
+ static std::mutex mu;
+ if (!name.empty() && name.startswith(".gnu.warning.")) {
+ std::lock_guard<std::mutex> lock(mu);
+ StringRef wsym = name.substr(13);
+ StringRef s(data.begin());
+ StringRef wng(s.substr(0, size));
@ -28,7 +30,7 @@ Index: lld/ELF/InputFiles.cpp
static ELFKind getELFKind(MemoryBufferRef mb, StringRef archiveName) {
unsigned char size;
unsigned char endian;
@@ -747,6 +760,14 @@ void ObjFile<ELFT>::initializeSections(bool ignoreComd
@@ -747,6 +762,14 @@ void ObjFile<ELFT>::initializeSections(bool ignoreComd
case SHT_RELA:
case SHT_NULL:
break;
@ -43,7 +45,7 @@ Index: lld/ELF/InputFiles.cpp
case SHT_LLVM_SYMPART:
ctx.hasSympart.store(true, std::memory_order_relaxed);
[[fallthrough]];
@@ -1349,6 +1370,9 @@ template <class ELFT> void SharedFile::parse() {
@@ -1349,6 +1372,9 @@ template <class ELFT> void SharedFile::parse() {
const ELFFile<ELFT> obj = this->getObj<ELFT>();
ArrayRef<Elf_Shdr> sections = getELFShdrs<ELFT>();
@ -53,7 +55,7 @@ Index: lld/ELF/InputFiles.cpp
const Elf_Shdr *versymSec = nullptr;
const Elf_Shdr *verdefSec = nullptr;
const Elf_Shdr *verneedSec = nullptr;
@@ -1371,6 +1395,13 @@ template <class ELFT> void SharedFile::parse() {
@@ -1371,6 +1397,13 @@ template <class ELFT> void SharedFile::parse() {
case SHT_GNU_verneed:
verneedSec = &sec;
break;

2
devel/llvm/16/patches/patch-lld_ELF_LinkerScript_cpp
View file

@ -7,7 +7,7 @@ Index: lld/ELF/LinkerScript.cpp
".gcc_except_table", ".init_array", ".fini_array", ".tbss", ".tdata",
- ".ARM.exidx", ".ARM.extab", ".ctors", ".dtors"})
+ ".ARM.exidx", ".ARM.extab", ".ctors", ".dtors",
+ ".openbsd.randomdata.", ".openbsd.mutable."})
+ ".openbsd.randomdata", ".openbsd.mutable"})
if (isSectionPrefix(v, s->name))
return v;

19
devel/llvm/16/patches/patch-lld_ELF_Relocations_cpp
View file

@ -1,12 +1,13 @@
Index: lld/ELF/Relocations.cpp
--- lld/ELF/Relocations.cpp.orig
+++ lld/ELF/Relocations.cpp
@@ -790,6 +790,18 @@ void elf::reportUndefinedSymbols() {
@@ -790,6 +790,19 @@ void elf::reportUndefinedSymbols() {
undefs.clear();
}
+static void reportGNUWarning(Symbol &sym, InputSectionBase &sec,
+ uint64_t offset) {
+ std::lock_guard<std::mutex> lock(relocMutex);
+ if (sym.gwarn) {
+ StringRef gnuWarning = gnuWarnings.lookup(sym.getName());
+ // report first occurance only
@ -20,7 +21,21 @@ Index: lld/ELF/Relocations.cpp
// Report an undefined symbol if necessary.
// Returns true if the undefined symbol will produce an error message.
static bool maybeReportUndefined(Undefined &sym, InputSectionBase &sec,
@@ -1351,6 +1363,8 @@ template <class ELFT, class RelTy> void RelocationScan
@@ -820,6 +833,13 @@ static bool maybeReportUndefined(Undefined &sym, Input
if (sym.discardedSecIdx != 0 && (sec.name == ".got2" || sec.name == ".toc"))
return false;
+#ifdef __OpenBSD__
+ // GCC (at least 8 and 11) can produce a ".gcc_except_table" with relocations
+ // to discarded sections on riscv64
+ if (sym.discardedSecIdx != 0 && sec.name == ".gcc_except_table")
+ return false;
+#endif
+
bool isWarning =
(config->unresolvedSymbols == UnresolvedPolicy::Warn && canBeExternal) ||
config->noinhibitExec;
@@ -1351,6 +1371,8 @@ template <class ELFT, class RelTy> void RelocationScan
uint64_t offset = getter.get(rel.r_offset);
if (offset == uint64_t(-1))
return;

4
devel/llvm/16/patches/patch-lld_ELF_ScriptParser_cpp
View file

@ -1,11 +1,13 @@
Index: lld/ELF/ScriptParser.cpp
--- lld/ELF/ScriptParser.cpp.orig
+++ lld/ELF/ScriptParser.cpp
@@ -1575,6 +1575,7 @@ unsigned ScriptParser::readPhdrType() {
@@ -1575,7 +1575,9 @@ unsigned ScriptParser::readPhdrType() {
.Case("PT_GNU_EH_FRAME", PT_GNU_EH_FRAME)
.Case("PT_GNU_STACK", PT_GNU_STACK)
.Case("PT_GNU_RELRO", PT_GNU_RELRO)
+ .Case("PT_OPENBSD_MUTABLE", PT_OPENBSD_MUTABLE)
.Case("PT_OPENBSD_RANDOMIZE", PT_OPENBSD_RANDOMIZE)
+ .Case("PT_OPENBSD_SYSCALLS", PT_OPENBSD_SYSCALLS)
.Case("PT_OPENBSD_WXNEEDED", PT_OPENBSD_WXNEEDED)
.Case("PT_OPENBSD_BOOTDATA", PT_OPENBSD_BOOTDATA)
.Default(-1);

9
devel/llvm/16/patches/patch-lld_ELF_Symbols_cpp
View file

@ -1,6 +1,15 @@
Index: lld/ELF/Symbols.cpp
--- lld/ELF/Symbols.cpp.orig
+++ lld/ELF/Symbols.cpp
@@ -25,7 +25,7 @@ using namespace llvm::ELF;
using namespace lld;
using namespace lld::elf;
-static_assert(sizeof(SymbolUnion) <= 64, "SymbolUnion too large");
+static_assert(sizeof(SymbolUnion) <= 72, "SymbolUnion too large");
template <typename T> struct AssertSymbol {
static_assert(std::is_trivially_destructible<T>(),
@@ -61,6 +61,7 @@ std::string lld::toString(const elf::Symbol &sym) {
}

14
devel/llvm/16/patches/patch-lld_ELF_Symbols_h
View file

@ -20,7 +20,17 @@ Index: lld/ELF/Symbols.h
void overwrite(Symbol &sym, Kind k) const {
if (sym.traced)
@@ -490,6 +493,9 @@ struct ElfSym {
@@ -292,6 +295,9 @@ class Symbol { (public)
// True if defined in a DSO as protected visibility.
uint8_t dsoProtected : 1;
+ // True if targeted by a range extension thunk.
+ uint8_t thunkAccessed : 1;
+
// Temporary flags used to communicate which symbol entries need PLT and GOT
// entries during postScanRelocations();
std::atomic<uint16_t> flags;
@@ -490,6 +496,9 @@ struct ElfSym {
// __bss_start
static Defined *bss;
@ -30,7 +40,7 @@ Index: lld/ELF/Symbols.h
// etext and _etext
static Defined *etext1;
static Defined *etext2;
@@ -546,6 +552,8 @@ void reportDuplicate(const Symbol &sym, const InputFil
@@ -546,6 +555,8 @@ void reportDuplicate(const Symbol &sym, const InputFil
InputSectionBase *errSec, uint64_t errOffset);
void maybeWarnUnorderableSymbol(const Symbol *sym);
bool computeIsPreemptible(const Symbol &sym);

14
devel/llvm/16/patches/patch-lld_ELF_SyntheticSections_cpp Normal file
View file

@ -0,0 +1,14 @@
Index: lld/ELF/SyntheticSections.cpp
--- lld/ELF/SyntheticSections.cpp.orig
+++ lld/ELF/SyntheticSections.cpp
@@ -2500,6 +2500,10 @@ PltSection::PltSection()
if ((config->emachine == EM_386 || config->emachine == EM_X86_64) &&
(config->andFeatures & GNU_PROPERTY_X86_FEATURE_1_IBT))
name = ".plt.sec";
+#ifdef __OpenBSD__
+ else if (config->emachine == EM_X86_64)
+ name = ".plt.sec";
+#endif
// The PLT needs to be writable on SPARC as the dynamic linker will
// modify the instructions in the PLT entries.

14
devel/llvm/16/patches/patch-lld_ELF_Thunks_cpp Normal file
View file

@ -0,0 +1,14 @@
Index: lld/ELF/Thunks.cpp
--- lld/ELF/Thunks.cpp.orig
+++ lld/ELF/Thunks.cpp
@@ -1217,7 +1217,9 @@ bool PPC64LongBranchThunk::isCompatibleWith(const Inpu
return rel.type == R_PPC64_REL24 || rel.type == R_PPC64_REL14;
}
-Thunk::Thunk(Symbol &d, int64_t a) : destination(d), addend(a), offset(0) {}
+Thunk::Thunk(Symbol &d, int64_t a) : destination(d), addend(a), offset(0) {
+ destination.thunkAccessed = true;
+}
Thunk::~Thunk() = default;

42
devel/llvm/16/patches/patch-lld_ELF_Writer_cpp
View file

@ -9,7 +9,29 @@ Index: lld/ELF/Writer.cpp
ElfSym::end1 = add("end", -1);
ElfSym::end2 = add("_end", -1);
ElfSym::etext1 = add("etext", -1);
@@ -798,7 +799,11 @@ static bool isRelroSection(const OutputSection *sec) {
@@ -488,6 +489,12 @@ template <class ELFT> void elf::createSyntheticSection
in.ibtPlt = std::make_unique<IBTPltSection>();
add(*in.ibtPlt);
}
+#ifdef __OpenBSD__
+ else if (config->emachine == EM_X86_64) {
+ in.ibtPlt = std::make_unique<IBTPltSection>();
+ add(*in.ibtPlt);
+ }
+#endif
if (config->emachine == EM_PPC)
in.plt = std::make_unique<PPC32GlinkSection>();
@@ -652,7 +659,7 @@ static bool shouldKeepInSymtab(const Defined &sym) {
// * --discard-locals is used.
// * The symbol is in a SHF_MERGE section, which is normally the reason for
// the assembler keeping the .L symbol.
- if (sym.getName().startswith(".L") &&
+ if ((sym.getName().startswith(".L") || sym.getName().empty()) &&
(config->discard == DiscardPolicy::Locals ||
(sym.section && (sym.section->flags & SHF_MERGE))))
return false;
@@ -798,7 +805,11 @@ static bool isRelroSection(const OutputSection *sec) {
// However, if "-z now" is given, the lazy symbol resolution is
// disabled, which enables us to put it into RELRO.
if (sec == in.gotPlt->getParent())
@ -21,7 +43,7 @@ Index: lld/ELF/Writer.cpp
// .dynamic section contains data for the dynamic linker, and
// there's no need to write to it at runtime, so it's better to put
@@ -1089,6 +1094,9 @@ template <class ELFT> void Writer<ELFT>::setReservedSy
@@ -1089,6 +1100,9 @@ template <class ELFT> void Writer<ELFT>::setReservedSy
if (ElfSym::bss)
ElfSym::bss->section = findSection(".bss");
@ -31,7 +53,7 @@ Index: lld/ELF/Writer.cpp
// Setup MIPS _gp_disp/__gnu_local_gp symbols which should
// be equal to the _gp symbol's value.
if (ElfSym::mipsGp) {
@@ -2369,6 +2377,12 @@ SmallVector<PhdrEntry *, 0> Writer<ELFT>::createPhdrs(
@@ -2369,11 +2383,22 @@ SmallVector<PhdrEntry *, 0> Writer<ELFT>::createPhdrs(
addHdr(PT_GNU_EH_FRAME, part.ehFrameHdr->getParent()->getPhdrFlags())
->add(part.ehFrameHdr->getParent());
@ -44,7 +66,17 @@ Index: lld/ELF/Writer.cpp
// PT_OPENBSD_RANDOMIZE is an OpenBSD-specific feature. That makes
// the dynamic linker fill the segment with random data.
if (OutputSection *cmd = findSection(".openbsd.randomdata", partNo))
@@ -2392,6 +2406,11 @@ SmallVector<PhdrEntry *, 0> Writer<ELFT>::createPhdrs(
addHdr(PT_OPENBSD_RANDOMIZE, cmd->getPhdrFlags())->add(cmd);
+ // PT_OPENBSD_SYSCALLS is an OpenBSD-specific feature. That makes
+ // the kernel and dynamic linker register system call sites.
+ if (OutputSection *cmd = findSection(".openbsd.syscalls", partNo))
+ addHdr(PT_OPENBSD_SYSCALLS, cmd->getPhdrFlags())->add(cmd);
+
if (config->zGnustack != GnuStackKind::None) {
// PT_GNU_STACK is a special section to tell the loader to make the
// pages for the stack non-executable. If you really want an executable
@@ -2392,6 +2417,11 @@ SmallVector<PhdrEntry *, 0> Writer<ELFT>::createPhdrs(
if (config->zWxneeded)
addHdr(PT_OPENBSD_WXNEEDED, PF_X);
@ -56,7 +88,7 @@ Index: lld/ELF/Writer.cpp
if (OutputSection *cmd = findSection(".note.gnu.property", partNo))
addHdr(PT_GNU_PROPERTY, PF_R)->add(cmd);
@@ -2484,6 +2503,31 @@ template <class ELFT> void Writer<ELFT>::fixSectionAli
@@ -2484,6 +2514,31 @@ template <class ELFT> void Writer<ELFT>::fixSectionAli
};
}
};

58
devel/llvm/16/patches/patch-lld_test_ELF_aarch64-feature-bti-plt_s Normal file
View file

@ -0,0 +1,58 @@
Index: lld/test/ELF/aarch64-feature-bti-plt.s
--- lld/test/ELF/aarch64-feature-bti-plt.s.orig
+++ lld/test/ELF/aarch64-feature-bti-plt.s
@@ -0,0 +1,54 @@
+# REQUIRES: aarch64
+
+# RUN: rm -rf %t && split-file %s %t
+
+# RUN: llvm-mc --triple=aarch64 --filetype=obj -o %t.o %t/a.s
+# RUN: ld.lld --shared -T %t/largegap.lds -z force-bti %t.o -o %t.elf
+# RUN: llvm-objdump -d %t.elf | FileCheck %s
+
+#--- largegap.lds
+SECTIONS {
+ .plt : { *(.plt) }
+ .text.near 0x1000 : AT(0x1000) { *(.text.near) }
+ .text.far 0xf0000000 : AT(0xf0000000) { *(.text.far) }
+}
+
+#--- a.s
+# CHECK: <.plt>:
+# CHECK-NEXT: bti c
+
+## foo@plt is targeted by a range extension thunk with an indirect branch.
+## Add a bti c instruction.
+# CHECK: <foo@plt>:
+# CHECK-NEXT: bti c
+
+## biz is not targeted by a thunk using an indirect branch, so no need for bti c.
+# CHECK: <biz@plt>:
+# CHECK-NEXT: adrp x16, {{.*}} <func>
+
+# CHECK: <bar>:
+# CHECK-NEXT: bl {{.*}} <foo@plt>
+# CHECK-NEXT: bl {{.*}} <biz@plt>
+
+# CHECK: <func>:
+# CHECK-NEXT: bl {{.*}} <__AArch64ADRPThunk_foo>
+
+# CHECK: <__AArch64ADRPThunk_foo>:
+# CHECK-NEXT: adrp x16, 0x0 <foo>
+# CHECK-NEXT: add x16, x16, {{.*}}
+# CHECK-NEXT: br x16
+
+ .global foo
+ .global biz
+ .section .text.near, "ax", %progbits
+bar:
+ .type bar, %function
+ bl foo
+ bl biz
+ ret
+
+ .section .text.far, "ax", %progbits
+func:
+ .type func, %function
+ bl foo
+ ret

30
devel/llvm/16/patches/patch-lld_tools_lld_lld_cpp
View file

@ -1,10 +1,38 @@
Index: lld/tools/lld/lld.cpp
--- lld/tools/lld/lld.cpp.orig
+++ lld/tools/lld/lld.cpp
@@ -155,10 +155,14 @@ static int lldMain(int argc, const char **argv, llvm::
@@ -70,6 +70,7 @@ static Flavor getFlavor(StringRef s) {
.Default(Invalid);
}
+#ifdef LLD_ENABLE_MINGW
static cl::TokenizerCallback getDefaultQuotingStyle() {
if (Triple(sys::getProcessTriple()).getOS() == Triple::Win32)
return cl::TokenizeWindowsCommandLine;
@@ -106,6 +107,7 @@ static bool isPETarget(std::vector<const char *> &v) {
return false;
#endif
}
+#endif
static Flavor parseProgname(StringRef progname) {
// Use GNU driver for "ld" by default.
@@ -149,16 +151,26 @@ static int lldMain(int argc, const char **argv, llvm::
std::vector<const char *> args(argv, argv + argc);
auto link = [&args]() {
Flavor f = parseFlavor(args);
+#ifdef LLD_ENABLE_MINGW
if (f == Gnu && isPETarget(args))
return mingw::link;
else if (f == Gnu)
+#else
+ if (f == Gnu)
+#endif
return elf::link;
+#ifdef LLD_ENABLE_COFF
else if (f == WinLink)
return coff::link;
+#endif
+#ifdef LLD_ENABLE_MACHO
else if (f == Darwin)
return macho::link;

59
devel/llvm/16/patches/patch-lldb_source_Plugins_ABI_AArch64_ABISysV_arm64_cpp Normal file
View file

@ -0,0 +1,59 @@
Index: lldb/source/Plugins/ABI/AArch64/ABISysV_arm64.cpp
--- lldb/source/Plugins/ABI/AArch64/ABISysV_arm64.cpp.orig
+++ lldb/source/Plugins/ABI/AArch64/ABISysV_arm64.cpp
@@ -820,6 +820,31 @@ static lldb::addr_t ReadLinuxProcessAddressMask(lldb::
return address_mask;
}
+// Reads code or data address mask for the current OpenBSD process.
+static lldb::addr_t ReadOpenBSDProcessAddressMask(lldb::ProcessSP process_sp,
+ llvm::StringRef reg_name) {
+ // We set default value of mask such that no bits are masked out.
+ uint64_t address_mask = 0ULL;
+ // If Pointer Authentication feature is enabled then OpenBSD exposes
+ // PAC data and code mask register. Try reading relevant register
+ // below and merge it with default address mask calculated above.
+ lldb::ThreadSP thread_sp = process_sp->GetThreadList().GetSelectedThread();
+ if (thread_sp) {
+ lldb::RegisterContextSP reg_ctx_sp = thread_sp->GetRegisterContext();
+ if (reg_ctx_sp) {
+ const RegisterInfo *reg_info =
+ reg_ctx_sp->GetRegisterInfoByName(reg_name, 0);
+ if (reg_info) {
+ lldb::addr_t mask_reg_val = reg_ctx_sp->ReadRegisterAsUnsigned(
+ reg_info->kinds[eRegisterKindLLDB], LLDB_INVALID_ADDRESS);
+ if (mask_reg_val != LLDB_INVALID_ADDRESS)
+ address_mask |= mask_reg_val;
+ }
+ }
+ }
+ return address_mask;
+}
+
lldb::addr_t ABISysV_arm64::FixCodeAddress(lldb::addr_t pc) {
if (lldb::ProcessSP process_sp = GetProcessSP()) {
if (process_sp->GetTarget().GetArchitecture().GetTriple().isOSLinux() &&
@@ -827,6 +852,11 @@ lldb::addr_t ABISysV_arm64::FixCodeAddress(lldb::addr_
process_sp->SetCodeAddressMask(
ReadLinuxProcessAddressMask(process_sp, "code_mask"));
+ if (process_sp->GetTarget().GetArchitecture().GetTriple().isOSOpenBSD() &&
+ !process_sp->GetCodeAddressMask())
+ process_sp->SetCodeAddressMask(
+ ReadOpenBSDProcessAddressMask(process_sp, "code_mask"));
+
return FixAddress(pc, process_sp->GetCodeAddressMask());
}
return pc;
@@ -838,6 +868,11 @@ lldb::addr_t ABISysV_arm64::FixDataAddress(lldb::addr_
!process_sp->GetDataAddressMask())
process_sp->SetDataAddressMask(
ReadLinuxProcessAddressMask(process_sp, "data_mask"));
+
+ if (process_sp->GetTarget().GetArchitecture().GetTriple().isOSOpenBSD() &&
+ !process_sp->GetDataAddressMask())
+ process_sp->SetDataAddressMask(
+ ReadOpenBSDProcessAddressMask(process_sp, "data_mask"));
return FixAddress(pc, process_sp->GetDataAddressMask());
}

127
devel/llvm/16/patches/patch-lldb_source_Plugins_Process_OpenBSD_NativeRegisterContextOpenBSD_arm64_cpp
View file

@ -1,7 +1,7 @@
Index: lldb/source/Plugins/Process/OpenBSD/NativeRegisterContextOpenBSD_arm64.cpp
--- lldb/source/Plugins/Process/OpenBSD/NativeRegisterContextOpenBSD_arm64.cpp.orig
+++ lldb/source/Plugins/Process/OpenBSD/NativeRegisterContextOpenBSD_arm64.cpp
@@ -0,0 +1,561 @@
@@ -0,0 +1,524 @@
+//===-- NativeRegisterContextOpenBSD_arm64.cpp ---------------*- C++ -*-===//
+//
+// The LLVM Compiler Infrastructure
@ -31,6 +31,7 @@ Index: lldb/source/Plugins/Process/OpenBSD/NativeRegisterContextOpenBSD_arm64.cp
+
+// clang-format off
+#include <sys/types.h>
+#include <sys/ptrace.h>
+#include <sys/sysctl.h>
+#include <sys/time.h>
+#include <machine/cpu.h>
@ -41,77 +42,6 @@ Index: lldb/source/Plugins/Process/OpenBSD/NativeRegisterContextOpenBSD_arm64.cp
+
+#define REG_CONTEXT_SIZE (GetGPRSize() + GetFPRSize())
+
+// ARM64 general purpose registers.
+static const uint32_t g_gpr_regnums_arm64[] = {
+ gpr_x0_arm64, gpr_x1_arm64, gpr_x2_arm64, gpr_x3_arm64,
+ gpr_x4_arm64, gpr_x5_arm64, gpr_x6_arm64, gpr_x7_arm64,
+ gpr_x8_arm64, gpr_x9_arm64, gpr_x10_arm64, gpr_x11_arm64,
+ gpr_x12_arm64, gpr_x13_arm64, gpr_x14_arm64, gpr_x15_arm64,
+ gpr_x16_arm64, gpr_x17_arm64, gpr_x18_arm64, gpr_x19_arm64,
+ gpr_x20_arm64, gpr_x21_arm64, gpr_x22_arm64, gpr_x23_arm64,
+ gpr_x24_arm64, gpr_x25_arm64, gpr_x26_arm64, gpr_x27_arm64,
+ gpr_x28_arm64, gpr_fp_arm64, gpr_lr_arm64, gpr_sp_arm64,
+ gpr_pc_arm64, gpr_cpsr_arm64, gpr_w0_arm64, gpr_w1_arm64,
+ gpr_w2_arm64, gpr_w3_arm64, gpr_w4_arm64, gpr_w5_arm64,
+ gpr_w6_arm64, gpr_w7_arm64, gpr_w8_arm64, gpr_w9_arm64,
+ gpr_w10_arm64, gpr_w11_arm64, gpr_w12_arm64, gpr_w13_arm64,
+ gpr_w14_arm64, gpr_w15_arm64, gpr_w16_arm64, gpr_w17_arm64,
+ gpr_w18_arm64, gpr_w19_arm64, gpr_w20_arm64, gpr_w21_arm64,
+ gpr_w22_arm64, gpr_w23_arm64, gpr_w24_arm64, gpr_w25_arm64,
+ gpr_w26_arm64, gpr_w27_arm64, gpr_w28_arm64,
+ LLDB_INVALID_REGNUM // register sets need to end with this flag
+};
+static_assert(((sizeof g_gpr_regnums_arm64 / sizeof g_gpr_regnums_arm64[0]) -
+ 1) == k_num_gpr_registers_arm64,
+ "g_gpr_regnums_arm64 has wrong number of register infos");
+
+// ARM64 floating point registers.
+static const uint32_t g_fpu_regnums_arm64[] = {
+ fpu_v0_arm64, fpu_v1_arm64, fpu_v2_arm64, fpu_v3_arm64,
+ fpu_v4_arm64, fpu_v5_arm64, fpu_v6_arm64, fpu_v7_arm64,
+ fpu_v8_arm64, fpu_v9_arm64, fpu_v10_arm64, fpu_v11_arm64,
+ fpu_v12_arm64, fpu_v13_arm64, fpu_v14_arm64, fpu_v15_arm64,
+ fpu_v16_arm64, fpu_v17_arm64, fpu_v18_arm64, fpu_v19_arm64,
+ fpu_v20_arm64, fpu_v21_arm64, fpu_v22_arm64, fpu_v23_arm64,
+ fpu_v24_arm64, fpu_v25_arm64, fpu_v26_arm64, fpu_v27_arm64,
+ fpu_v28_arm64, fpu_v29_arm64, fpu_v30_arm64, fpu_v31_arm64,
+
+ fpu_s0_arm64, fpu_s1_arm64, fpu_s2_arm64, fpu_s3_arm64,
+ fpu_s4_arm64, fpu_s5_arm64, fpu_s6_arm64, fpu_s7_arm64,
+ fpu_s8_arm64, fpu_s9_arm64, fpu_s10_arm64, fpu_s11_arm64,
+ fpu_s12_arm64, fpu_s13_arm64, fpu_s14_arm64, fpu_s15_arm64,
+ fpu_s16_arm64, fpu_s17_arm64, fpu_s18_arm64, fpu_s19_arm64,
+ fpu_s20_arm64, fpu_s21_arm64, fpu_s22_arm64, fpu_s23_arm64,
+ fpu_s24_arm64, fpu_s25_arm64, fpu_s26_arm64, fpu_s27_arm64,
+ fpu_s28_arm64, fpu_s29_arm64, fpu_s30_arm64, fpu_s31_arm64,
+
+ fpu_d0_arm64, fpu_d1_arm64, fpu_d2_arm64, fpu_d3_arm64,
+ fpu_d4_arm64, fpu_d5_arm64, fpu_d6_arm64, fpu_d7_arm64,
+ fpu_d8_arm64, fpu_d9_arm64, fpu_d10_arm64, fpu_d11_arm64,
+ fpu_d12_arm64, fpu_d13_arm64, fpu_d14_arm64, fpu_d15_arm64,
+ fpu_d16_arm64, fpu_d17_arm64, fpu_d18_arm64, fpu_d19_arm64,
+ fpu_d20_arm64, fpu_d21_arm64, fpu_d22_arm64, fpu_d23_arm64,
+ fpu_d24_arm64, fpu_d25_arm64, fpu_d26_arm64, fpu_d27_arm64,
+ fpu_d28_arm64, fpu_d29_arm64, fpu_d30_arm64, fpu_d31_arm64,
+ fpu_fpsr_arm64, fpu_fpcr_arm64,
+ LLDB_INVALID_REGNUM // register sets need to end with this flag
+};
+static_assert(((sizeof g_fpu_regnums_arm64 / sizeof g_fpu_regnums_arm64[0]) -
+ 1) == k_num_fpr_registers_arm64,
+ "g_fpu_regnums_arm64 has wrong number of register infos");
+
+namespace {
+// Number of register sets provided by this context.
+enum { k_num_register_sets = 2 };
+}
+
+// Register sets for ARM64.
+static const RegisterSet g_reg_sets_arm64[k_num_register_sets] = {
+ {"General Purpose Registers", "gpr", k_num_gpr_registers_arm64,
+ g_gpr_regnums_arm64},
+ {"Floating Point Registers", "fpu", k_num_fpr_registers_arm64,
+ g_fpu_regnums_arm64}};
+
+std::unique_ptr<NativeRegisterContextOpenBSD>
+NativeRegisterContextOpenBSD::CreateHostNativeRegisterContextOpenBSD(
+ const ArchSpec &target_arch, NativeThreadProtocol &native_thread) {
@ -126,7 +56,9 @@ Index: lldb/source/Plugins/Process/OpenBSD/NativeRegisterContextOpenBSD_arm64.cp
+CreateRegisterInfoInterface(const ArchSpec &target_arch) {
+ assert((HostInfo::GetArchitecture().GetAddressByteSize() == 8) &&
+ "Register setting path assumes this is a 64-bit host");
+ return new RegisterInfoPOSIX_arm64(target_arch, 0);
+
+ Flags opt_regsets = RegisterInfoPOSIX_arm64::eRegsetMaskPAuth;
+ return new RegisterInfoPOSIX_arm64(target_arch, opt_regsets);
+}
+
+static llvm::APInt uint128ToAPInt(__uint128_t in) {
@ -149,23 +81,25 @@ Index: lldb/source/Plugins/Process/OpenBSD/NativeRegisterContextOpenBSD_arm64.cp
+ CreateRegisterInfoInterface(target_arch)),
+ m_gpr(), m_fpr() {}
+
+uint32_t NativeRegisterContextOpenBSD_arm64::GetUserRegisterCount() const {
+ uint32_t count = 0;
+ for (uint32_t set_index = 0; set_index < k_num_register_sets; ++set_index)
+ count += g_reg_sets_arm64[set_index].num_registers;
+ return count;
+RegisterInfoPOSIX_arm64 &
+NativeRegisterContextOpenBSD_arm64::GetRegisterInfo() const {
+ return static_cast<RegisterInfoPOSIX_arm64 &>(*m_register_info_interface_up);
+}
+
+uint32_t NativeRegisterContextOpenBSD_arm64::GetRegisterSetCount() const {
+ return k_num_register_sets;
+ return GetRegisterInfo().GetRegisterSetCount();
+}
+
+const RegisterSet *
+NativeRegisterContextOpenBSD_arm64::GetRegisterSet(uint32_t set_index) const {
+ if (set_index < k_num_register_sets)
+ return &g_reg_sets_arm64[set_index];
+ return GetRegisterInfo().GetRegisterSet(set_index);
+}
+
+ return nullptr;
+uint32_t NativeRegisterContextOpenBSD_arm64::GetUserRegisterCount() const {
+ uint32_t count = 0;
+ for (uint32_t set_index = 0; set_index < GetRegisterSetCount(); ++set_index)
+ count += GetRegisterSet(set_index)->num_registers;
+ return count;
+}
+
+Status
@ -206,6 +140,18 @@ Index: lldb/source/Plugins/Process/OpenBSD/NativeRegisterContextOpenBSD_arm64.cp
+ return error;
+ }
+
+ if (GetRegisterInfo().IsPAuthReg(reg)) {
+ uint32_t offset;
+
+ offset = reg_info->byte_offset - GetRegisterInfo().GetPAuthOffset();
+ reg_value = (uint64_t)m_pacmask[offset > 0];
+ if (reg_value.GetByteSize() > reg_info->byte_size) {
+ reg_value.SetType(*reg_info);
+ }
+
+ return error;
+ }
+
+ switch (reg) {
+ case gpr_x0_arm64:
+ case gpr_x1_arm64:
@ -531,6 +477,8 @@ Index: lldb/source/Plugins/Process/OpenBSD/NativeRegisterContextOpenBSD_arm64.cp
+ return GPRegSet;
+ else if (reg_num >= k_first_fpr_arm64 && reg_num <= k_last_fpr_arm64)
+ return FPRegSet;
+ else if (GetRegisterInfo().IsPAuthReg(reg_num))
+ return PACMaskRegSet;
+ else
+ return -1;
+}
@ -543,6 +491,9 @@ Index: lldb/source/Plugins/Process/OpenBSD/NativeRegisterContextOpenBSD_arm64.cp
+ case FPRegSet:
+ ReadFPR();
+ return 0;
+ case PACMaskRegSet:
+ ReadPACMask();
+ return 0;
+ default:
+ break;
+ }
@ -562,4 +513,16 @@ Index: lldb/source/Plugins/Process/OpenBSD/NativeRegisterContextOpenBSD_arm64.cp
+ }
+ return -1;
+}
+
+Status NativeRegisterContextOpenBSD_arm64::ReadPACMask() {
+#ifdef PT_PACMASK
+ return NativeProcessOpenBSD::PtraceWrapper(PT_PACMASK, GetProcessPid(),
+ &m_pacmask, sizeof(m_pacmask));
+#else
+ Status error;
+ ::memset(&m_pacmask, 0, sizeof(m_pacmask));
+ return error;
+#endif
+}
+
+#endif

10
devel/llvm/16/patches/patch-lldb_source_Plugins_Process_OpenBSD_NativeRegisterContextOpenBSD_arm64_h
View file

@ -1,7 +1,7 @@
Index: lldb/source/Plugins/Process/OpenBSD/NativeRegisterContextOpenBSD_arm64.h
--- lldb/source/Plugins/Process/OpenBSD/NativeRegisterContextOpenBSD_arm64.h.orig
+++ lldb/source/Plugins/Process/OpenBSD/NativeRegisterContextOpenBSD_arm64.h
@@ -0,0 +1,83 @@
@@ -0,0 +1,89 @@
+//===-- NativeRegisterContextOpenBSD_arm64.h --------------------*- C++ -*-===//
+//
+// The LLVM Compiler Infrastructure
@ -20,6 +20,7 @@ Index: lldb/source/Plugins/Process/OpenBSD/NativeRegisterContextOpenBSD_arm64.h
+// clang-format on
+
+#include "Plugins/Process/OpenBSD/NativeRegisterContextOpenBSD.h"
+#include "Plugins/Process/Utility/RegisterInfoPOSIX_arm64.h"
+#include "Plugins/Process/Utility/lldb-arm64-register-enums.h"
+
+namespace lldb_private {
@ -69,16 +70,21 @@ Index: lldb/source/Plugins/Process/OpenBSD/NativeRegisterContextOpenBSD_arm64.h
+
+private:
+ // Private member types.
+ enum { GPRegSet, FPRegSet };
+ enum { GPRegSet, FPRegSet, PACMaskRegSet };
+
+ // Private member variables.
+ struct reg m_gpr;
+ struct fpreg m_fpr;
+ register_t m_pacmask[2];
+
+ int GetSetForNativeRegNum(int reg_num) const;
+
+ int ReadRegisterSet(uint32_t set);
+ int WriteRegisterSet(uint32_t set);
+
+ RegisterInfoPOSIX_arm64 &GetRegisterInfo() const;
+
+ Status ReadPACMask();
+};
+
+} // namespace process_openbsd

19
devel/llvm/16/patches/patch-lldb_source_Plugins_Process_elf-core_RegisterUtilities_h Normal file
View file

@ -0,0 +1,19 @@
Index: lldb/source/Plugins/Process/elf-core/RegisterUtilities.h
--- lldb/source/Plugins/Process/elf-core/RegisterUtilities.h.orig
+++ lldb/source/Plugins/Process/elf-core/RegisterUtilities.h
@@ -67,6 +67,7 @@ enum {
NT_AUXV = 11,
NT_REGS = 20,
NT_FPREGS = 21,
+ NT_PACMASK = 24,
};
}
@@ -121,6 +122,7 @@ constexpr RegsetDesc AARCH64_SVE_Desc[] = {
constexpr RegsetDesc AARCH64_PAC_Desc[] = {
{llvm::Triple::Linux, llvm::Triple::aarch64, llvm::ELF::NT_ARM_PAC_MASK},
+ {llvm::Triple::OpenBSD, llvm::Triple::aarch64, OPENBSD::NT_PACMASK},
};
constexpr RegsetDesc PPC_VMX_Desc[] = {

3
devel/llvm/16/patches/patch-llvm_include_llvm_BinaryFormat_ELF_h
View file

@ -1,11 +1,12 @@
Index: llvm/include/llvm/BinaryFormat/ELF.h
--- llvm/include/llvm/BinaryFormat/ELF.h.orig
+++ llvm/include/llvm/BinaryFormat/ELF.h
@@ -1404,6 +1404,7 @@ enum {
@@ -1404,6 +1404,8 @@ enum {
PT_OPENBSD_MUTABLE = 0x65a3dbe5, // Like bss, but not immutable.
PT_OPENBSD_RANDOMIZE = 0x65a3dbe6, // Fill with random data.
PT_OPENBSD_WXNEEDED = 0x65a3dbe7, // Program does W^X violations.
+ PT_OPENBSD_NOBTCFI = 0x65a3dbe8, // Do not enforce branch target CFI
+ PT_OPENBSD_SYSCALLS = 0x65a3dbe9, // System call sites.
PT_OPENBSD_BOOTDATA = 0x65a41be6, // Section for boot arguments.
// ARM program header types.

12
devel/llvm/16/patches/patch-llvm_lib_Target_ARM_ARMISelLowering_cpp Normal file
View file

@ -0,0 +1,12 @@
Index: llvm/lib/Target/ARM/ARMISelLowering.cpp
--- llvm/lib/Target/ARM/ARMISelLowering.cpp.orig
+++ llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -21198,6 +21198,8 @@ bool ARMTargetLowering::shouldInsertFencesForAtomic(
}
bool ARMTargetLowering::useLoadStackGuardNode() const {
+ if (Subtarget->getTargetTriple().isOSOpenBSD())
+ return false;
// ROPI/RWPI are not supported currently.
return !Subtarget->isROPI() && !Subtarget->isRWPI();
}

15
devel/llvm/16/patches/patch-llvm_lib_Target_PowerPC_PPCFrameLowering_cpp
View file

@ -9,7 +9,20 @@ Index: llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
#include "PPCSubtarget.h"
#include "PPCTargetMachine.h"
#include "llvm/ADT/Statistic.h"
@@ -2711,4 +2712,8 @@ bool PPCFrameLowering::enableShrinkWrapping(const Mach
@@ -1192,12 +1193,6 @@ void PPCFrameLowering::emitPrologue(MachineFunction &M
if ((Reg == PPC::X2 || Reg == PPC::R2) && MustSaveTOC)
continue;
- // For SVR4, don't emit a move for the CR spill slot if we haven't
- // spilled CRs.
- if (isSVR4ABI && (PPC::CR2 <= Reg && Reg <= PPC::CR4)
- && !MustSaveCR)
- continue;
-
// For 64-bit SVR4 when we have spilled CRs, the spill location
// is SP+8, not a frame-relative slot.
if (isSVR4ABI && isPPC64 && (PPC::CR2 <= Reg && Reg <= PPC::CR4)) {
@@ -2711,4 +2706,8 @@ bool PPCFrameLowering::enableShrinkWrapping(const Mach
if (MF.getInfo<PPCFunctionInfo>()->shrinkWrapDisabled())
return false;
return !MF.getSubtarget<PPCSubtarget>().is32BitELFABI();

13
devel/llvm/16/patches/patch-llvm_lib_Target_PowerPC_PPCISelDAGToDAG_cpp Normal file
View file

@ -0,0 +1,13 @@
Index: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
--- llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp.orig
+++ llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
@@ -5293,7 +5293,8 @@ void PPCDAGToDAGISel::Select(SDNode *N) {
// generate secure plt code for TLS symbols.
getGlobalBaseReg();
} break;
- case PPCISD::CALL: {
+ case PPCISD::CALL:
+ case PPCISD::CALL_RM: {
if (PPCLowering->getPointerTy(CurDAG->getDataLayout()) != MVT::i32 ||
!TM.isPositionIndependent() || !Subtarget->isSecurePlt() ||
!Subtarget->isTargetELF())

7
devel/llvm/16/patches/patch-llvm_tools_llvm-objdump_ELFDump_cpp
View file

@ -1,7 +1,7 @@
Index: llvm/tools/llvm-objdump/ELFDump.cpp
--- llvm/tools/llvm-objdump/ELFDump.cpp.orig
+++ llvm/tools/llvm-objdump/ELFDump.cpp
@@ -253,6 +253,9 @@ static void printProgramHeaders(const ELFFile<ELFT> &O
@@ -253,8 +253,14 @@ static void printProgramHeaders(const ELFFile<ELFT> &O
case ELF::PT_OPENBSD_MUTABLE:
outs() << "OPENBSD_MUTABLE ";
break;
@ -10,4 +10,9 @@ Index: llvm/tools/llvm-objdump/ELFDump.cpp
+ break;
case ELF::PT_OPENBSD_RANDOMIZE:
outs() << "OPENBSD_RANDOMIZE ";
+ break;
+ case ELF::PT_OPENBSD_SYSCALLS:
+ outs() << "OPENBSD_SYSCALLS ";
break;
case ELF::PT_OPENBSD_WXNEEDED:
outs() << "OPENBSD_WXNEEDED ";

4
devel/llvm/16/patches/patch-llvm_tools_llvm-readobj_ELFDumper_cpp
View file

@ -1,9 +1,11 @@
Index: llvm/tools/llvm-readobj/ELFDumper.cpp
--- llvm/tools/llvm-readobj/ELFDumper.cpp.orig
+++ llvm/tools/llvm-readobj/ELFDumper.cpp
@@ -1412,6 +1412,7 @@ static StringRef segmentTypeToString(unsigned Arch, un
@@ -1411,7 +1411,9 @@ static StringRef segmentTypeToString(unsigned Arch, un
LLVM_READOBJ_ENUM_CASE(ELF, PT_OPENBSD_MUTABLE);
LLVM_READOBJ_ENUM_CASE(ELF, PT_OPENBSD_RANDOMIZE);
+ LLVM_READOBJ_ENUM_CASE(ELF, PT_OPENBSD_SYSCALLS);
LLVM_READOBJ_ENUM_CASE(ELF, PT_OPENBSD_WXNEEDED);
+ LLVM_READOBJ_ENUM_CASE(ELF, PT_OPENBSD_NOBTCFI);
LLVM_READOBJ_ENUM_CASE(ELF, PT_OPENBSD_BOOTDATA);

14
devel/llvm/16/patches/patch-llvm_tools_llvm-shlib_CMakeLists_txt Normal file
View file

@ -0,0 +1,14 @@
-Bsymbolic-functions is not supported by our ld.bfd version.
Index: llvm/tools/llvm-shlib/CMakeLists.txt
--- llvm/tools/llvm-shlib/CMakeLists.txt.orig
+++ llvm/tools/llvm-shlib/CMakeLists.txt
@@ -51,7 +51,7 @@ if(LLVM_BUILD_LLVM_DYLIB)
# Solaris ld does not accept global: *; so there is no way to version *all* global symbols
set(LIB_NAMES -Wl,--version-script,${LLVM_LIBRARY_DIR}/tools/llvm-shlib/simple_version_script.map ${LIB_NAMES})
endif()
- if (NOT MINGW)
+ if (NOT MINGW AND ${OPENBSD_LD_IS_LLD})
# Optimize function calls for default visibility definitions to avoid PLT and
# reduce dynamic relocations.
# Note: for -fno-pic default, the address of a function may be different from

2
devel/llvm/16/pkg/PLIST-lldb
View file

@ -1,8 +1,6 @@
@option no-default-conflict
@option is-branch
@conflict lldb-${LLVM_PKGSPEC}
@conflict ${MODPY_PY_PREFIX}llvm-<6.0.1p3
@conflict llvm-<10.0.0p0
bin/lldb-${LLVM_MAJOR}
bin/lldb-argdumper-${LLVM_MAJOR}
bin/lldb-vscode-${LLVM_MAJOR}

3
devel/llvm/16/pkg/PLIST-main
View file

@ -1,7 +1,6 @@
@option no-default-conflict
@option is-branch
@conflict llvm-${LLVM_PKGSPEC}
@conflict lldb-<10.0.0p0
@pkgpath devel/llvm/${LLVM_MAJOR},-main
bin/amdgpu-arch-${LLVM_MAJOR}
bin/analyze-build-${LLVM_MAJOR}
@ -3138,7 +3137,7 @@ ${CLANG_INCLUDE_PATH}/stdatomic.h
@comment ${CLANG_INCLUDE_PATH}/stdint.h
${CLANG_INCLUDE_PATH}/stdnoreturn.h
${CLANG_INCLUDE_PATH}/tbmintrin.h
@comment ${CLANG_INCLUDE_PATH}/tgmath.h
${CLANG_INCLUDE_PATH}/tgmath.h
${CLANG_INCLUDE_PATH}/tmmintrin.h
${CLANG_INCLUDE_PATH}/tsxldtrkintrin.h
${CLANG_INCLUDE_PATH}/uintrintrin.h