38 lines
1.6 KiB
Text
38 lines
1.6 KiB
Text
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- Add retguard for octeon/mips64.
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Index: lib/Target/Mips/MipsInstrInfo.td
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--- lib/Target/Mips/MipsInstrInfo.td.orig
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+++ lib/Target/Mips/MipsInstrInfo.td
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@@ -2012,6 +2012,31 @@ def LONG_BRANCH_ADDiu2Op : PseudoSE<(outs GPR32Opnd:$d
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bit hasNoSchedulingInfo = 1;
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}
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+// Pseudo instructions used by retguard. In order to calculste the PC
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+// for PIC code, we use a pair of pseudos to get the function address
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+// into T9, which is normally used to hold this value but is trashed
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+// by function epilogue.
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+let isCodeGenOnly = 1, hasNoSchedulingInfo = 1 in {
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+
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+ // Use BAL to get the PC into RA, then calculate the address of the
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+ // current function and save this value in $rd. $rs and $rt are used
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+ // as scratch registers and are trashed by this pseudo. $tgt is the
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+ // symbol to branch to when calling BAL.
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+ let Size = 32 in {
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+ def RETGUARD_GET_FUNCTION_ADDR: PseudoSE<(outs GPR64:$rd),
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+ (ins GPR64:$rs, GPR64:$rt, brtarget:$tgt), []>;
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+ }
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+
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+ // Emit the symbol used for $tgt in RETGUARD_GET_FUNCTION_ADDR. We
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+ // emit this symbol immediately before the usual function return, with
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+ // the effect that the BAL branches to an immediate return and resumes
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+ // execution through the rest of the RETGUARD epilogue. We pair BAL
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+ // with RET to satisfy return branch predictors.
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+ let Size = 0 in {
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+ def RETGUARD_EMIT_SYMBOL: PseudoSE<(outs), (ins brtarget:$tgt), []>;
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+ }
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+}
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+
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//===----------------------------------------------------------------------===//
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// Instruction definition
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//===----------------------------------------------------------------------===//
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